1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2021 Corentin Labbe <clabbe@baylibre.com> 4 * Device Tree file for SSI 1328 5 */ 6 7/dts-v1/; 8 9#include "gemini.dtsi" 10 11/ { 12 model = "SSI 1328"; 13 compatible = "ssi,1328", "cortina,gemini"; 14 #address-cells = <1>; 15 #size-cells = <1>; 16 17 memory@0 { 18 /* 128 MB */ 19 device_type = "memory"; 20 reg = <0x00000000 0x8000000>; 21 }; 22 23 aliases { 24 mdio-gpio0 = &mdio0; 25 }; 26 27 chosen { 28 bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M"; 29 stdout-path = &uart0; 30 }; 31 32 mdio0: mdio { 33 compatible = "virtual,mdio-gpio"; 34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ 35 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 /* LAN Marvell 88E1118 */ 40 phy0: ethernet-phy@1 { 41 reg = <1>; 42 device_type = "ethernet-phy"; 43 /* We lack the knowledge of necessary GPIO to achieve 44 * Gigabit 45 */ 46 max-speed = <100>; 47 }; 48 /* WAN ICPlus IP101A */ 49 phy1: ethernet-phy@2 { 50 reg = <2>; 51 device_type = "ethernet-phy"; 52 }; 53 }; 54}; 55 56ðernet { 57 status = "okay"; 58 ethernet-port@0 { 59 phy-mode = "rgmii"; 60 phy-handle = <&phy0>; 61 }; 62 ethernet-port@1 { 63 phy-mode = "rgmii"; 64 phy-handle = <&phy1>; 65 }; 66}; 67 68&flash { 69 status = "okay"; 70 /* 32MB of flash */ 71 reg = <0x30000000 0x03200000>; 72 73 pinctrl-names = "enabled", "disabled"; 74 pinctrl-0 = <&pflash_default_pins>; 75 pinctrl-1 = <&pflash_disabled_pins>; 76 77 partitions { 78 compatible = "redboot-fis"; 79 /* Eraseblock at 0xfe0000 */ 80 fis-index-block = <0x7F>; 81 }; 82}; 83 84&gpio0 { 85 pinctrl-names = "default"; 86 pinctrl-0 = <&gpio0_default_pins>; 87}; 88 89&ide0 { 90 status = "okay"; 91}; 92 93&ide1 { 94 status = "okay"; 95}; 96 97&sata { 98 cortina,gemini-ata-muxmode = <0>; 99 cortina,gemini-enable-sata-bridge; 100 status = "okay"; 101}; 102 103&syscon { 104 pinctrl { 105 /* 106 * gpio0agrp cover line 0-4 107 * gpio0bgrp cover line 5 108 */ 109 gpio0_default_pins: pinctrl-gpio0 { 110 mux { 111 function = "gpio0"; 112 groups = "gpio0agrp", "gpio0bgrp"; 113 }; 114 }; 115 pflash_disabled_pins: pinctrl-pflash-disabled { 116 mux { 117 function = "gpio0"; 118 groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp", 119 "gpio0kgrp"; 120 }; 121 }; 122 pinctrl-gmii { 123 /* This platform use both the ethernet ports */ 124 mux { 125 function = "gmii"; 126 groups = "gmii_gmac0_grp", "gmii_gmac1_grp"; 127 }; 128 }; 129 }; 130}; 131 132&usb0 { 133 status = "okay"; 134}; 135 136&usb1 { 137 status = "okay"; 138}; 139