1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 *  Copyright (C) 2012-2013 Linaro Ltd.
4 *  Author: Haojian Zhuang <haojian.zhuang@linaro.org>
5 */
6
7/dts-v1/;
8
9#include "hi3620.dtsi"
10
11/ {
12	model = "Hisilicon Hi4511 Development Board";
13	compatible = "hisilicon,hi3620-hi4511";
14
15	chosen {
16		bootargs = "root=/dev/ram0";
17		stdout-path = "serial0:115200n8";
18	};
19
20	memory@40000000 {
21		device_type = "memory";
22		reg = <0x40000000 0x20000000>;
23	};
24
25	amba-bus {
26		dual_timer0: dual_timer@800000 {
27			status = "ok";
28		};
29
30		uart0: serial@b00000 {	/* console */
31			pinctrl-names = "default", "sleep";
32			pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33			pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
34			status = "ok";
35		};
36
37		uart1: serial@b01000 { /* modem */
38			pinctrl-names = "default", "sleep";
39			pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
40			pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
41			status = "ok";
42		};
43
44		uart2: serial@b02000 { /* audience */
45			pinctrl-names = "default", "sleep";
46			pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
47			pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
48			status = "ok";
49		};
50
51		uart3: serial@b03000 {
52			pinctrl-names = "default", "sleep";
53			pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
54			pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
55			status = "ok";
56		};
57
58		uart4: serial@b04000 {
59			pinctrl-names = "default", "sleep";
60			pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
61			pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
62			status = "ok";
63		};
64
65		pmx0: pinmux@803000 {
66			pinctrl-names = "default";
67			pinctrl-0 = <&board_pmx_pins>;
68
69			board_pmx_pins: board_pmx_pins {
70				pinctrl-single,pins = <
71					0x008 0x0	/* GPIO -- eFUSE_DOUT */
72					0x100 0x0	/* USIM_CLK & USIM_DATA (IOMG63) */
73				>;
74			};
75			uart0_pmx_func: uart0_pmx_func {
76				pinctrl-single,pins = <
77					0x0f0 0x0
78					0x0f4 0x0	/* UART0_RX & UART0_TX */
79				>;
80			};
81			uart0_pmx_idle: uart0_pmx_idle {
82				pinctrl-single,pins = <
83					/*0x0f0 0x1*/	/* UART0_CTS & UART0_RTS */
84					0x0f4 0x1	/* UART0_RX & UART0_TX */
85				>;
86			};
87			uart1_pmx_func: uart1_pmx_func {
88				pinctrl-single,pins = <
89					0x0f8 0x0	/* UART1_CTS & UART1_RTS (IOMG61) */
90					0x0fc 0x0	/* UART1_RX & UART1_TX (IOMG62) */
91				>;
92			};
93			uart1_pmx_idle: uart1_pmx_idle {
94				pinctrl-single,pins = <
95					0x0f8 0x1	/* GPIO (IOMG61) */
96					0x0fc 0x1	/* GPIO (IOMG62) */
97				>;
98			};
99			uart2_pmx_func: uart2_pmx_func {
100				pinctrl-single,pins = <
101					0x104 0x2	/* UART2_RXD (IOMG96) */
102					0x108 0x2	/* UART2_TXD (IOMG64) */
103				>;
104			};
105			uart2_pmx_idle: uart2_pmx_idle {
106				pinctrl-single,pins = <
107					0x104 0x1	/* GPIO (IOMG96) */
108					0x108 0x1	/* GPIO (IOMG64) */
109				>;
110			};
111			uart3_pmx_func: uart3_pmx_func {
112				pinctrl-single,pins = <
113					0x160 0x2	/* UART3_CTS & UART3_RTS (IOMG85) */
114					0x164 0x2	/* UART3_RXD & UART3_TXD (IOMG86) */
115				>;
116			};
117			uart3_pmx_idle: uart3_pmx_idle {
118				pinctrl-single,pins = <
119					0x160 0x1	/* GPIO (IOMG85) */
120					0x164 0x1	/* GPIO (IOMG86) */
121				>;
122			};
123			uart4_pmx_func: uart4_pmx_func {
124				pinctrl-single,pins = <
125					0x168 0x0	/* UART4_CTS & UART4_RTS (IOMG87) */
126					0x16c 0x0	/* UART4_RXD (IOMG88) */
127					0x170 0x0	/* UART4_TXD (IOMG93) */
128				>;
129			};
130			uart4_pmx_idle: uart4_pmx_idle {
131				pinctrl-single,pins = <
132					0x168 0x1	/* GPIO (IOMG87) */
133					0x16c 0x1	/* GPIO (IOMG88) */
134					0x170 0x1	/* GPIO (IOMG93) */
135				>;
136			};
137			i2c0_pmx_func: i2c0_pmx_func {
138				pinctrl-single,pins = <
139					0x0b4 0x0	/* I2C0_SCL & I2C0_SDA (IOMG45) */
140				>;
141			};
142			i2c0_pmx_idle: i2c0_pmx_idle {
143				pinctrl-single,pins = <
144					0x0b4 0x1	/* GPIO (IOMG45) */
145				>;
146			};
147			i2c1_pmx_func: i2c1_pmx_func {
148				pinctrl-single,pins = <
149					0x0b8 0x0	/* I2C1_SCL & I2C1_SDA (IOMG46) */
150				>;
151			};
152			i2c1_pmx_idle: i2c1_pmx_idle {
153				pinctrl-single,pins = <
154					0x0b8 0x1	/* GPIO (IOMG46) */
155				>;
156			};
157			i2c2_pmx_func: i2c2_pmx_func {
158				pinctrl-single,pins = <
159					0x068 0x0	/* I2C2_SCL (IOMG26) */
160					0x06c 0x0	/* I2C2_SDA (IOMG27) */
161				>;
162			};
163			i2c2_pmx_idle: i2c2_pmx_idle {
164				pinctrl-single,pins = <
165					0x068 0x1	/* GPIO (IOMG26) */
166					0x06c 0x1	/* GPIO (IOMG27) */
167				>;
168			};
169			i2c3_pmx_func: i2c3_pmx_func {
170				pinctrl-single,pins = <
171					0x050 0x2	/* I2C3_SCL (IOMG20) */
172					0x054 0x2	/* I2C3_SDA (IOMG21) */
173				>;
174			};
175			i2c3_pmx_idle: i2c3_pmx_idle {
176				pinctrl-single,pins = <
177					0x050 0x1	/* GPIO (IOMG20) */
178					0x054 0x1	/* GPIO (IOMG21) */
179				>;
180			};
181			spi0_pmx_func: spi0_pmx_func {
182				pinctrl-single,pins = <
183					0x0d4 0x0	/* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
184					0x0d8 0x0	/* SPI0_CS0 (IOMG54) */
185					0x0dc 0x0	/* SPI0_CS1 (IOMG55) */
186					0x0e0 0x0	/* SPI0_CS2 (IOMG56) */
187					0x0e4 0x0	/* SPI0_CS3 (IOMG57) */
188				>;
189			};
190			spi0_pmx_idle: spi0_pmx_idle {
191				pinctrl-single,pins = <
192					0x0d4 0x1	/* GPIO (IOMG53) */
193					0x0d8 0x1	/* GPIO (IOMG54) */
194					0x0dc 0x1	/* GPIO (IOMG55) */
195					0x0e0 0x1	/* GPIO (IOMG56) */
196					0x0e4 0x1	/* GPIO (IOMG57) */
197				>;
198			};
199			spi1_pmx_func: spi1_pmx_func {
200				pinctrl-single,pins = <
201					0x184 0x0	/* SPI1_CLK/SPI1_DI (IOMG98) */
202					0x0e8 0x0	/* SPI1_DO (IOMG58) */
203					0x0ec 0x0	/* SPI1_CS (IOMG95) */
204				>;
205			};
206			spi1_pmx_idle: spi1_pmx_idle {
207				pinctrl-single,pins = <
208					0x184 0x1	/* GPIO (IOMG98) */
209					0x0e8 0x1	/* GPIO (IOMG58) */
210					0x0ec 0x1	/* GPIO (IOMG95) */
211				>;
212			};
213			kpc_pmx_func: kpc_pmx_func {
214				pinctrl-single,pins = <
215					0x12c 0x0	/* KEY_IN0 (IOMG73) */
216					0x130 0x0	/* KEY_IN1 (IOMG74) */
217					0x134 0x0	/* KEY_IN2 (IOMG75) */
218					0x10c 0x0	/* KEY_OUT0 (IOMG65) */
219					0x110 0x0	/* KEY_OUT1 (IOMG66) */
220					0x114 0x0	/* KEY_OUT2 (IOMG67) */
221				>;
222			};
223			kpc_pmx_idle: kpc_pmx_idle {
224				pinctrl-single,pins = <
225					0x12c 0x1	/* GPIO (IOMG73) */
226					0x130 0x1	/* GPIO (IOMG74) */
227					0x134 0x1	/* GPIO (IOMG75) */
228					0x10c 0x1	/* GPIO (IOMG65) */
229					0x110 0x1	/* GPIO (IOMG66) */
230					0x114 0x1	/* GPIO (IOMG67) */
231				>;
232			};
233			gpio_key_func: gpio_key_func {
234				pinctrl-single,pins = <
235					0x10c 0x1	/* KEY_OUT0/GPIO (IOMG65) */
236					0x130 0x1	/* KEY_IN1/GPIO (IOMG74) */
237				>;
238			};
239			emmc_pmx_func: emmc_pmx_func {
240				pinctrl-single,pins = <
241					0x030 0x2	/* eMMC_CMD/eMMC_CLK (IOMG12) */
242					0x018 0x0	/* NAND_CS3_N (IOMG6) */
243					0x024 0x0	/* NAND_BUSY2_N (IOMG8) */
244					0x028 0x0	/* NAND_BUSY3_N (IOMG9) */
245					0x02c 0x2	/* eMMC_DATA[0:7] (IOMG10) */
246				>;
247			};
248			emmc_pmx_idle: emmc_pmx_idle {
249				pinctrl-single,pins = <
250					0x030 0x0	/* GPIO (IOMG12) */
251					0x018 0x1	/* GPIO (IOMG6) */
252					0x024 0x1	/* GPIO (IOMG8) */
253					0x028 0x1	/* GPIO (IOMG9) */
254					0x02c 0x1	/* GPIO (IOMG10) */
255				>;
256			};
257			sd_pmx_func: sd_pmx_func {
258				pinctrl-single,pins = <
259					0x0bc 0x0	/* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
260					0x0c0 0x0	/* SD_DATA3 (IOMG48) */
261				>;
262			};
263			sd_pmx_idle: sd_pmx_idle {
264				pinctrl-single,pins = <
265					0x0bc 0x1	/* GPIO (IOMG47) */
266					0x0c0 0x1	/* GPIO (IOMG48) */
267				>;
268			};
269			nand_pmx_func: nand_pmx_func {
270				pinctrl-single,pins = <
271					0x00c 0x0	/* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
272					0x010 0x0	/* NAND_CS1_N (IOMG4) */
273					0x014 0x0	/* NAND_CS2_N (IOMG5) */
274					0x018 0x0	/* NAND_CS3_N (IOMG6) */
275					0x01c 0x0	/* NAND_BUSY0_N (IOMG94) */
276					0x020 0x0	/* NAND_BUSY1_N (IOMG7) */
277					0x024 0x0	/* NAND_BUSY2_N (IOMG8) */
278					0x028 0x0	/* NAND_BUSY3_N (IOMG9) */
279					0x02c 0x0	/* NAND_DATA[8:15] (IOMG10) */
280				>;
281			};
282			nand_pmx_idle: nand_pmx_idle {
283				pinctrl-single,pins = <
284					0x00c 0x1	/* GPIO (IOMG3) */
285					0x010 0x1	/* GPIO (IOMG4) */
286					0x014 0x1	/* GPIO (IOMG5) */
287					0x018 0x1	/* GPIO (IOMG6) */
288					0x01c 0x1	/* GPIO (IOMG94) */
289					0x020 0x1	/* GPIO (IOMG7) */
290					0x024 0x1	/* GPIO (IOMG8) */
291					0x028 0x1	/* GPIO (IOMG9) */
292					0x02c 0x1	/* GPIO (IOMG10) */
293				>;
294			};
295			sdio_pmx_func: sdio_pmx_func {
296				pinctrl-single,pins = <
297					0x0c4 0x0	/* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
298				>;
299			};
300			sdio_pmx_idle: sdio_pmx_idle {
301				pinctrl-single,pins = <
302					0x0c4 0x1	/* GPIO (IOMG49) */
303				>;
304			};
305			audio_out_pmx_func: audio_out_pmx_func {
306				pinctrl-single,pins = <
307					0x0f0 0x1	/* GPIO (IOMG59), audio spk & earphone */
308				>;
309			};
310		};
311
312		pmx1: pinmux@803800 {
313			pinctrl-names = "default";
314			pinctrl-0 = <	&board_pu_pins &board_pd_pins &board_pd_ps_pins
315					&board_np_pins &board_ps_pins &kpc_cfg_func
316					&audio_out_cfg_func>;
317			board_pu_pins: board_pu_pins {
318				pinctrl-single,pins = <
319					0x014 0		/* GPIO_158 (IOCFG2) */
320					0x018 0		/* GPIO_159 (IOCFG3) */
321					0x01c 0		/* BOOT_MODE0 (IOCFG4) */
322					0x020 0		/* BOOT_MODE1 (IOCFG5) */
323				>;
324				pinctrl-single,bias-pulldown = <0 2 0 2>;
325				pinctrl-single,bias-pullup = <1 1 0 1>;
326			};
327			board_pd_pins: board_pd_pins {
328				pinctrl-single,pins = <
329					0x038 0		/* eFUSE_DOUT (IOCFG11) */
330					0x150 0		/* ISP_GPIO8 (IOCFG93) */
331					0x154 0		/* ISP_GPIO9 (IOCFG94) */
332				>;
333				pinctrl-single,bias-pulldown = <2 2 0 2>;
334				pinctrl-single,bias-pullup = <0 1 0 1>;
335			};
336			board_pd_ps_pins: board_pd_ps_pins {
337				pinctrl-single,pins = <
338					0x2d8 0		/* CLK_OUT0 (IOCFG190) */
339					0x004 0		/* PMU_SPI_DATA (IOCFG192) */
340				>;
341				pinctrl-single,bias-pulldown = <2 2 0 2>;
342				pinctrl-single,bias-pullup = <0 1 0 1>;
343				pinctrl-single,drive-strength = <0x30 0xf0>;
344			};
345			board_np_pins: board_np_pins {
346				pinctrl-single,pins = <
347					0x24c 0		/* KEYPAD_OUT7 (IOCFG155) */
348				>;
349				pinctrl-single,bias-pulldown = <0 2 0 2>;
350				pinctrl-single,bias-pullup = <0 1 0 1>;
351			};
352			board_ps_pins: board_ps_pins {
353				pinctrl-single,pins = <
354					0x000 0		/* PMU_SPI_CLK (IOCFG191) */
355					0x008 0		/* PMU_SPI_CS_N (IOCFG193) */
356				>;
357				pinctrl-single,drive-strength = <0x30 0xf0>;
358			};
359			uart0_cfg_func: uart0_cfg_func {
360				pinctrl-single,pins = <
361					0x208 0		/* UART0_RXD (IOCFG138) */
362					0x20c 0		/* UART0_TXD (IOCFG139) */
363				>;
364				pinctrl-single,bias-pulldown = <0 2 0 2>;
365				pinctrl-single,bias-pullup = <0 1 0 1>;
366			};
367			uart0_cfg_idle: uart0_cfg_idle {
368				pinctrl-single,pins = <
369					0x208 0		/* UART0_RXD (IOCFG138) */
370					0x20c 0		/* UART0_TXD (IOCFG139) */
371				>;
372				pinctrl-single,bias-pulldown = <2 2 0 2>;
373				pinctrl-single,bias-pullup = <0 1 0 1>;
374			};
375			uart1_cfg_func: uart1_cfg_func {
376				pinctrl-single,pins = <
377					0x210 0		/* UART1_CTS (IOCFG140) */
378					0x214 0		/* UART1_RTS (IOCFG141) */
379					0x218 0		/* UART1_RXD (IOCFG142) */
380					0x21c 0		/* UART1_TXD (IOCFG143) */
381				>;
382				pinctrl-single,bias-pulldown = <0 2 0 2>;
383				pinctrl-single,bias-pullup = <0 1 0 1>;
384			};
385			uart1_cfg_idle: uart1_cfg_idle {
386				pinctrl-single,pins = <
387					0x210 0		/* UART1_CTS (IOCFG140) */
388					0x214 0		/* UART1_RTS (IOCFG141) */
389					0x218 0		/* UART1_RXD (IOCFG142) */
390					0x21c 0		/* UART1_TXD (IOCFG143) */
391				>;
392				pinctrl-single,bias-pulldown = <2 2 0 2>;
393				pinctrl-single,bias-pullup = <0 1 0 1>;
394			};
395			uart2_cfg_func: uart2_cfg_func {
396				pinctrl-single,pins = <
397					0x220 0		/* UART2_CTS (IOCFG144) */
398					0x224 0		/* UART2_RTS (IOCFG145) */
399					0x228 0		/* UART2_RXD (IOCFG146) */
400					0x22c 0		/* UART2_TXD (IOCFG147) */
401				>;
402				pinctrl-single,bias-pulldown = <0 2 0 2>;
403				pinctrl-single,bias-pullup = <0 1 0 1>;
404			};
405			uart2_cfg_idle: uart2_cfg_idle {
406				pinctrl-single,pins = <
407					0x220 0		/* GPIO (IOCFG144) */
408					0x224 0		/* GPIO (IOCFG145) */
409					0x228 0		/* GPIO (IOCFG146) */
410					0x22c 0		/* GPIO (IOCFG147) */
411				>;
412				pinctrl-single,bias-pulldown = <2 2 0 2>;
413				pinctrl-single,bias-pullup = <0 1 0 1>;
414			};
415			uart3_cfg_func: uart3_cfg_func {
416				pinctrl-single,pins = <
417					0x294 0		/* UART3_CTS (IOCFG173) */
418					0x298 0		/* UART3_RTS (IOCFG174) */
419					0x29c 0		/* UART3_RXD (IOCFG175) */
420					0x2a0 0		/* UART3_TXD (IOCFG176) */
421				>;
422				pinctrl-single,bias-pulldown = <0 2 0 2>;
423				pinctrl-single,bias-pullup = <0 1 0 1>;
424			};
425			uart3_cfg_idle: uart3_cfg_idle {
426				pinctrl-single,pins = <
427					0x294 0		/* UART3_CTS (IOCFG173) */
428					0x298 0		/* UART3_RTS (IOCFG174) */
429					0x29c 0		/* UART3_RXD (IOCFG175) */
430					0x2a0 0		/* UART3_TXD (IOCFG176) */
431				>;
432				pinctrl-single,bias-pulldown = <2 2 0 2>;
433				pinctrl-single,bias-pullup = <0 1 0 1>;
434			};
435			uart4_cfg_func: uart4_cfg_func {
436				pinctrl-single,pins = <
437					0x2a4 0		/* UART4_CTS (IOCFG177) */
438					0x2a8 0		/* UART4_RTS (IOCFG178) */
439					0x2ac 0		/* UART4_RXD (IOCFG179) */
440					0x2b0 0		/* UART4_TXD (IOCFG180) */
441				>;
442				pinctrl-single,bias-pulldown = <0 2 0 2>;
443				pinctrl-single,bias-pullup = <0 1 0 1>;
444			};
445			i2c0_cfg_func: i2c0_cfg_func {
446				pinctrl-single,pins = <
447					0x17c 0		/* I2C0_SCL (IOCFG103) */
448					0x180 0		/* I2C0_SDA (IOCFG104) */
449				>;
450				pinctrl-single,bias-pulldown = <0 2 0 2>;
451				pinctrl-single,bias-pullup = <0 1 0 1>;
452				pinctrl-single,drive-strength = <0x30 0xf0>;
453			};
454			i2c1_cfg_func: i2c1_cfg_func {
455				pinctrl-single,pins = <
456					0x184 0		/* I2C1_SCL (IOCFG105) */
457					0x188 0		/* I2C1_SDA (IOCFG106) */
458				>;
459				pinctrl-single,bias-pulldown = <0 2 0 2>;
460				pinctrl-single,bias-pullup = <0 1 0 1>;
461				pinctrl-single,drive-strength = <0x30 0xf0>;
462			};
463			i2c2_cfg_func: i2c2_cfg_func {
464				pinctrl-single,pins = <
465					0x118 0		/* I2C2_SCL (IOCFG79) */
466					0x11c 0		/* I2C2_SDA (IOCFG80) */
467				>;
468				pinctrl-single,bias-pulldown = <0 2 0 2>;
469				pinctrl-single,bias-pullup = <0 1 0 1>;
470				pinctrl-single,drive-strength = <0x30 0xf0>;
471			};
472			i2c3_cfg_func: i2c3_cfg_func {
473				pinctrl-single,pins = <
474					0x100 0		/* I2C3_SCL (IOCFG73) */
475					0x104 0		/* I2C3_SDA (IOCFG74) */
476				>;
477				pinctrl-single,bias-pulldown = <0 2 0 2>;
478				pinctrl-single,bias-pullup = <0 1 0 1>;
479				pinctrl-single,drive-strength = <0x30 0xf0>;
480			};
481			spi0_cfg_func1: spi0_cfg_func1 {
482				pinctrl-single,pins = <
483					0x1d4 0		/* SPI0_CLK (IOCFG125) */
484					0x1d8 0		/* SPI0_DI (IOCFG126) */
485					0x1dc 0		/* SPI0_DO (IOCFG127) */
486				>;
487				pinctrl-single,bias-pulldown = <2 2 0 2>;
488				pinctrl-single,bias-pullup = <0 1 0 1>;
489				pinctrl-single,drive-strength = <0x30 0xf0>;
490			};
491			spi0_cfg_func2: spi0_cfg_func2 {
492				pinctrl-single,pins = <
493					0x1e0 0		/* SPI0_CS0 (IOCFG128) */
494					0x1e4 0		/* SPI0_CS1 (IOCFG129) */
495					0x1e8 0		/* SPI0_CS2 (IOCFG130 */
496					0x1ec 0		/* SPI0_CS3 (IOCFG131) */
497				>;
498				pinctrl-single,bias-pulldown = <0 2 0 2>;
499				pinctrl-single,bias-pullup = <1 1 0 1>;
500				pinctrl-single,drive-strength = <0x30 0xf0>;
501			};
502			spi1_cfg_func1: spi1_cfg_func1 {
503				pinctrl-single,pins = <
504					0x1f0 0		/* SPI1_CLK (IOCFG132) */
505					0x1f4 0		/* SPI1_DI (IOCFG133) */
506					0x1f8 0		/* SPI1_DO (IOCFG134) */
507				>;
508				pinctrl-single,bias-pulldown = <2 2 0 2>;
509				pinctrl-single,bias-pullup = <0 1 0 1>;
510				pinctrl-single,drive-strength = <0x30 0xf0>;
511			};
512			spi1_cfg_func2: spi1_cfg_func2 {
513				pinctrl-single,pins = <
514					0x1fc 0		/* SPI1_CS (IOCFG135) */
515				>;
516				pinctrl-single,bias-pulldown = <0 2 0 2>;
517				pinctrl-single,bias-pullup = <1 1 0 1>;
518				pinctrl-single,drive-strength = <0x30 0xf0>;
519			};
520			kpc_cfg_func: kpc_cfg_func {
521				pinctrl-single,pins = <
522					0x250 0		/* KEY_IN0 (IOCFG156) */
523					0x254 0		/* KEY_IN1 (IOCFG157) */
524					0x258 0		/* KEY_IN2 (IOCFG158) */
525					0x230 0		/* KEY_OUT0 (IOCFG148) */
526					0x234 0		/* KEY_OUT1 (IOCFG149) */
527					0x238 0		/* KEY_OUT2 (IOCFG150) */
528				>;
529				pinctrl-single,bias-pulldown = <2 2 0 2>;
530				pinctrl-single,bias-pullup = <0 1 0 1>;
531			};
532			emmc_cfg_func: emmc_cfg_func {
533				pinctrl-single,pins = <
534					0x0ac 0		/* eMMC_CMD (IOCFG40) */
535					0x0b0 0		/* eMMC_CLK (IOCFG41) */
536					0x058 0		/* NAND_CS3_N (IOCFG19) */
537					0x064 0		/* NAND_BUSY2_N (IOCFG22) */
538					0x068 0		/* NAND_BUSY3_N (IOCFG23) */
539					0x08c 0		/* NAND_DATA8 (IOCFG32) */
540					0x090 0		/* NAND_DATA9 (IOCFG33) */
541					0x094 0		/* NAND_DATA10 (IOCFG34) */
542					0x098 0		/* NAND_DATA11 (IOCFG35) */
543					0x09c 0		/* NAND_DATA12 (IOCFG36) */
544					0x0a0 0		/* NAND_DATA13 (IOCFG37) */
545					0x0a4 0		/* NAND_DATA14 (IOCFG38) */
546					0x0a8 0		/* NAND_DATA15 (IOCFG39) */
547				>;
548				pinctrl-single,bias-pulldown = <0 2 0 2>;
549				pinctrl-single,bias-pullup = <1 1 0 1>;
550				pinctrl-single,drive-strength = <0x30 0xf0>;
551			};
552			sd_cfg_func1: sd_cfg_func1 {
553				pinctrl-single,pins = <
554					0x18c 0		/* SD_CLK (IOCFG107) */
555					0x190 0		/* SD_CMD (IOCFG108) */
556				>;
557				pinctrl-single,bias-pulldown = <2 2 0 2>;
558				pinctrl-single,bias-pullup = <0 1 0 1>;
559				pinctrl-single,drive-strength = <0x30 0xf0>;
560			};
561			sd_cfg_func2: sd_cfg_func2 {
562				pinctrl-single,pins = <
563					0x194 0		/* SD_DATA0 (IOCFG109) */
564					0x198 0		/* SD_DATA1 (IOCFG110) */
565					0x19c 0		/* SD_DATA2 (IOCFG111) */
566					0x1a0 0		/* SD_DATA3 (IOCFG112) */
567				>;
568				pinctrl-single,bias-pulldown = <2 2 0 2>;
569				pinctrl-single,bias-pullup = <0 1 0 1>;
570				pinctrl-single,drive-strength = <0x70 0xf0>;
571			};
572			nand_cfg_func1: nand_cfg_func1 {
573				pinctrl-single,pins = <
574					0x03c 0		/* NAND_ALE (IOCFG12) */
575					0x040 0		/* NAND_CLE (IOCFG13) */
576					0x06c 0		/* NAND_DATA0 (IOCFG24) */
577					0x070 0		/* NAND_DATA1 (IOCFG25) */
578					0x074 0		/* NAND_DATA2 (IOCFG26) */
579					0x078 0		/* NAND_DATA3 (IOCFG27) */
580					0x07c 0		/* NAND_DATA4 (IOCFG28) */
581					0x080 0		/* NAND_DATA5 (IOCFG29) */
582					0x084 0		/* NAND_DATA6 (IOCFG30) */
583					0x088 0		/* NAND_DATA7 (IOCFG31) */
584					0x08c 0		/* NAND_DATA8 (IOCFG32) */
585					0x090 0		/* NAND_DATA9 (IOCFG33) */
586					0x094 0		/* NAND_DATA10 (IOCFG34) */
587					0x098 0		/* NAND_DATA11 (IOCFG35) */
588					0x09c 0		/* NAND_DATA12 (IOCFG36) */
589					0x0a0 0		/* NAND_DATA13 (IOCFG37) */
590					0x0a4 0		/* NAND_DATA14 (IOCFG38) */
591					0x0a8 0		/* NAND_DATA15 (IOCFG39) */
592				>;
593				pinctrl-single,bias-pulldown = <2 2 0 2>;
594				pinctrl-single,bias-pullup = <0 1 0 1>;
595				pinctrl-single,drive-strength = <0x30 0xf0>;
596			};
597			nand_cfg_func2: nand_cfg_func2 {
598				pinctrl-single,pins = <
599					0x044 0		/* NAND_RE_N (IOCFG14) */
600					0x048 0		/* NAND_WE_N (IOCFG15) */
601					0x04c 0		/* NAND_CS0_N (IOCFG16) */
602					0x050 0		/* NAND_CS1_N (IOCFG17) */
603					0x054 0		/* NAND_CS2_N (IOCFG18) */
604					0x058 0		/* NAND_CS3_N (IOCFG19) */
605					0x05c 0		/* NAND_BUSY0_N (IOCFG20) */
606					0x060 0		/* NAND_BUSY1_N (IOCFG21) */
607					0x064 0		/* NAND_BUSY2_N (IOCFG22) */
608					0x068 0		/* NAND_BUSY3_N (IOCFG23) */
609				>;
610				pinctrl-single,bias-pulldown = <0 2 0 2>;
611				pinctrl-single,bias-pullup = <1 1 0 1>;
612				pinctrl-single,drive-strength = <0x30 0xf0>;
613			};
614			sdio_cfg_func: sdio_cfg_func {
615				pinctrl-single,pins = <
616					0x1a4 0		/* SDIO0_CLK (IOCG113) */
617					0x1a8 0		/* SDIO0_CMD (IOCG114) */
618					0x1ac 0		/* SDIO0_DATA0 (IOCG115) */
619					0x1b0 0		/* SDIO0_DATA1 (IOCG116) */
620					0x1b4 0		/* SDIO0_DATA2 (IOCG117) */
621					0x1b8 0		/* SDIO0_DATA3 (IOCG118) */
622				>;
623				pinctrl-single,bias-pulldown = <2 2 0 2>;
624				pinctrl-single,bias-pullup = <0 1 0 1>;
625				pinctrl-single,drive-strength = <0x30 0xf0>;
626			};
627			audio_out_cfg_func: audio_out_cfg_func {
628				pinctrl-single,pins = <
629					0x200 0		/* GPIO (IOCFG136) */
630					0x204 0		/* GPIO (IOCFG137) */
631				>;
632				pinctrl-single,bias-pulldown = <2 2 0 2>;
633				pinctrl-single,bias-pullup = <0 1 0 1>;
634			};
635		};
636	};
637
638	gpio-keys {
639		compatible = "gpio-keys";
640
641		call {
642			label = "call";
643			gpios = <&gpio17 2 0>;
644			linux,code = <169>;	/* KEY_PHONE */
645		};
646	};
647};
648