1// SPDX-License-Identifier: GPL-2.0 OR X11
2/*
3 * Copyright 2015 Boundary Devices, Inc.
4 */
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/input.h>
7
8/ {
9	chosen {
10		stdout-path = &uart2;
11	};
12
13	memory@10000000 {
14		device_type = "memory";
15		reg = <0x10000000 0x20000000>;
16	};
17
18	regulators {
19		compatible = "simple-bus";
20		#address-cells = <1>;
21		#size-cells = <0>;
22
23		reg_2p5v: regulator@0 {
24			compatible = "regulator-fixed";
25			reg = <0>;
26			regulator-name = "2P5V";
27			regulator-min-microvolt = <2500000>;
28			regulator-max-microvolt = <2500000>;
29			regulator-always-on;
30		};
31
32		reg_3p3v: regulator@1 {
33			compatible = "regulator-fixed";
34			reg = <1>;
35			regulator-name = "3P3V";
36			regulator-min-microvolt = <3300000>;
37			regulator-max-microvolt = <3300000>;
38			regulator-always-on;
39		};
40
41		reg_usb_otg_vbus: regulator@2 {
42			compatible = "regulator-fixed";
43			reg = <2>;
44			regulator-name = "usb_otg_vbus";
45			regulator-min-microvolt = <5000000>;
46			regulator-max-microvolt = <5000000>;
47			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
48			enable-active-high;
49		};
50
51		reg_wlan_vmmc: regulator@3 {
52			compatible = "regulator-fixed";
53			reg = <3>;
54			pinctrl-names = "default";
55			pinctrl-0 = <&pinctrl_wlan_vmmc>;
56			regulator-name = "reg_wlan_vmmc";
57			regulator-min-microvolt = <1800000>;
58			regulator-max-microvolt = <1800000>;
59			gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
60			startup-delay-us = <70000>;
61			enable-active-high;
62		};
63	};
64
65	gpio-keys {
66		compatible = "gpio-keys";
67		pinctrl-names = "default";
68		pinctrl-0 = <&pinctrl_gpio_keys>;
69
70		home {
71			label = "Home";
72			gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
73			linux,code = <102>;
74		};
75
76		back {
77			label = "Back";
78			gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
79			linux,code = <158>;
80		};
81	};
82
83	leds {
84		compatible = "gpio-leds";
85		pinctrl-names = "default";
86		pinctrl-0 = <&pinctrl_leds>;
87
88		j14-pin1 {
89			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
90			retain-state-suspended;
91			default-state = "off";
92		};
93
94		j14-pin3 {
95			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
96			retain-state-suspended;
97			default-state = "off";
98		};
99
100		j14-pins8-9 {
101			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
102			retain-state-suspended;
103			default-state = "off";
104		};
105
106		j46-pin2 {
107			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
108			retain-state-suspended;
109			default-state = "off";
110		};
111
112		j46-pin3 {
113			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
114			retain-state-suspended;
115			default-state = "off";
116		};
117	};
118
119	backlight-lcd {
120		compatible = "pwm-backlight";
121		pwms = <&pwm1 0 5000000>;
122		brightness-levels = <0 4 8 16 32 64 128 255>;
123		default-brightness-level = <7>;
124		power-supply = <&reg_3p3v>;
125		status = "okay";
126	};
127
128	backlight_lvds0: backlight-lvds0 {
129		compatible = "pwm-backlight";
130		pwms = <&pwm4 0 5000000>;
131		brightness-levels = <0 4 8 16 32 64 128 255>;
132		default-brightness-level = <7>;
133		power-supply = <&reg_3p3v>;
134		status = "okay";
135	};
136
137	panel-lvds0 {
138		compatible = "hannstar,hsd100pxn1";
139		backlight = <&backlight_lvds0>;
140
141		port {
142			panel_in_lvds0: endpoint {
143				remote-endpoint = <&lvds0_out>;
144			};
145		};
146	};
147
148	sound {
149		compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
150			     "fsl,imx-audio-sgtl5000";
151		model = "imx6dl-nit6xlite-sgtl5000";
152		ssi-controller = <&ssi1>;
153		audio-codec = <&codec>;
154		audio-routing =
155			"MIC_IN", "Mic Jack",
156			"Mic Jack", "Mic Bias",
157			"Headphone Jack", "HP_OUT";
158		mux-int-port = <1>;
159		mux-ext-port = <3>;
160	};
161};
162
163&audmux {
164	pinctrl-names = "default";
165	pinctrl-0 = <&pinctrl_audmux>;
166	status = "okay";
167};
168
169&clks {
170	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
171			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
172	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
173				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
174};
175
176&ecspi1 {
177	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
178	pinctrl-names = "default";
179	pinctrl-0 = <&pinctrl_ecspi1>;
180	status = "okay";
181
182	flash: m25p80@0 {
183		compatible = "microchip,sst25vf016b";
184		spi-max-frequency = <20000000>;
185		reg = <0>;
186	};
187};
188
189&fec {
190	pinctrl-names = "default";
191	pinctrl-0 = <&pinctrl_enet>;
192	phy-mode = "rgmii";
193	phy-handle = <&ethphy>;
194	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
195	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
196			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
197	fsl,err006687-workaround-present;
198	status = "okay";
199
200	mdio {
201		#address-cells = <1>;
202		#size-cells = <0>;
203
204		ethphy: ethernet-phy {
205			compatible = "ethernet-phy-ieee802.3-c22";
206			txen-skew-ps = <0>;
207			txc-skew-ps = <3000>;
208			rxdv-skew-ps = <0>;
209			rxc-skew-ps = <3000>;
210			rxd0-skew-ps = <0>;
211			rxd1-skew-ps = <0>;
212			rxd2-skew-ps = <0>;
213			rxd3-skew-ps = <0>;
214			txd0-skew-ps = <0>;
215			txd1-skew-ps = <0>;
216			txd2-skew-ps = <0>;
217			txd3-skew-ps = <0>;
218		};
219	};
220};
221
222&hdmi {
223	ddc-i2c-bus = <&i2c2>;
224	status = "okay";
225};
226
227&i2c1 {
228	clock-frequency = <100000>;
229	pinctrl-names = "default";
230	pinctrl-0 = <&pinctrl_i2c1>;
231	status = "okay";
232
233	codec: sgtl5000@a {
234		compatible = "fsl,sgtl5000";
235		pinctrl-names = "default";
236		pinctrl-0 = <&pinctrl_sgtl5000>;
237		reg = <0x0a>;
238		clocks = <&clks IMX6QDL_CLK_CKO>;
239		VDDA-supply = <&reg_2p5v>;
240		VDDIO-supply = <&reg_3p3v>;
241	};
242};
243
244&i2c2 {
245	clock-frequency = <100000>;
246	pinctrl-names = "default";
247	pinctrl-0 = <&pinctrl_i2c2>;
248	status = "okay";
249};
250
251&i2c3 {
252	clock-frequency = <100000>;
253	pinctrl-names = "default";
254	pinctrl-0 = <&pinctrl_i2c3>;
255	status = "okay";
256
257	touchscreen@4 {
258		compatible = "eeti,egalax_ts";
259		reg = <0x04>;
260		interrupt-parent = <&gpio1>;
261		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
262		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
263	};
264
265	touchscreen@38 {
266		compatible = "edt,edt-ft5x06";
267		reg = <0x38>;
268		interrupt-parent = <&gpio1>;
269		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
270		wakeup-source;
271	};
272
273	rtc@6f {
274		compatible = "isil,isl1208";
275		pinctrl-names = "default";
276		pinctrl-0 = <&pinctrl_rtc>;
277		reg = <0x6f>;
278		interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
279	};
280};
281
282&iomuxc {
283	pinctrl-names = "default";
284	pinctrl-0 = <&pinctrl_j10>;
285	pinctrl-1 = <&pinctrl_j28>;
286
287	imx6dl-nit6xlite {
288		pinctrl_audmux: audmuxgrp {
289			fsl,pins = <
290				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
291				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
292				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
293				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
294			>;
295		};
296
297		pinctrl_ecspi1: ecspi1grp {
298			fsl,pins = <
299				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
300				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
301				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
302				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
303			>;
304		};
305
306		pinctrl_enet: enetgrp {
307			fsl,pins = <
308				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
309				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
310				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0
311				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0
312				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0
313				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0
314				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0
315				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0
316				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
317				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
318				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
319				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
320				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
321				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
322				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
323				/* Phy reset */
324				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0
325				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
326				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
327			>;
328		};
329
330		pinctrl_gpio_keys: gpio-keysgrp {
331			fsl,pins = <
332				/* Home Button: J14 pin 5 */
333				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
334				/* Back Button: J14 pin 7 */
335				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
336			>;
337		};
338
339		pinctrl_i2c1: i2c1grp {
340			fsl,pins = <
341				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
342				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
343			>;
344		};
345
346		pinctrl_i2c2: i2c2grp {
347			fsl,pins = <
348				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
349				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
350			>;
351		};
352
353		pinctrl_i2c3: i2c3grp {
354			fsl,pins = <
355				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
356				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
357				/* Touch IRQ: J7 pin 4 */
358				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
359				/* tcs2004 IRQ */
360				MX6QDL_PAD_EIM_LBA__GPIO2_IO27	0x1b0b0
361				/* tsc2004 reset */
362				MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x0b0b0
363			>;
364		};
365
366		pinctrl_j10: j10grp {
367			fsl,pins = <
368				/* Broadcom WiFi module pins */
369				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
370				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
371				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
372				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
373				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x0b0b0
374				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0
375				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
376			>;
377		};
378
379		pinctrl_j28: j28grp {
380			fsl,pins = <
381				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0
382			>;
383		};
384
385		pinctrl_leds: ledsgrp {
386			fsl,pins = <
387				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0
388				MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x0b0b0
389				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x030b0
390				MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x0b0b0
391				MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0
392			>;
393		};
394
395		pinctrl_pwm1: pwm1grp {
396			fsl,pins = <
397				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
398			>;
399		};
400
401		pinctrl_pwm3: pwm3grp {
402			fsl,pins = <
403				MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
404			>;
405		};
406
407		pinctrl_pwm4: pwm4grp {
408			fsl,pins = <
409				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
410			>;
411		};
412
413		pinctrl_wlan_vmmc: wlan-vmmcgrp {
414			fsl,pins = <
415				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b0
416			>;
417		};
418
419		pinctrl_rtc: rtcgrp {
420			fsl,pins = <
421				MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b0
422			>;
423		};
424
425		pinctrl_sgtl5000: sgtl5000grp {
426			fsl,pins = <
427				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0
428				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0
429			>;
430		};
431
432		pinctrl_uart1: uart1grp {
433			fsl,pins = <
434				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
435				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
436			>;
437		};
438
439		pinctrl_uart2: uart2grp {
440			fsl,pins = <
441				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
442				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
443			>;
444		};
445
446		pinctrl_uart3: uart3grp {
447			fsl,pins = <
448				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
449				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
450				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
451				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
452			>;
453		};
454
455		pinctrl_usbotg: usbotggrp {
456			fsl,pins = <
457				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
458				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
459				/* power enable, high active */
460				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0
461			>;
462		};
463
464		pinctrl_usdhc2: usdhc2grp {
465			fsl,pins = <
466				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
467				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
468				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
469				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
470				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
471				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
472			>;
473		};
474
475		pinctrl_usdhc3: usdhc3grp {
476			fsl,pins = <
477				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
478				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
479				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
480				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
481				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
482				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
483				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
484			>;
485		};
486	};
487};
488
489&ldb {
490	status = "okay";
491
492	lvds-channel@0 {
493		status = "okay";
494
495		port@4 {
496			reg = <4>;
497
498			lvds0_out: endpoint {
499				remote-endpoint = <&panel_in_lvds0>;
500			};
501		};
502	};
503};
504
505&pcie {
506	status = "okay";
507};
508
509&pwm1 {
510	#pwm-cells = <2>;
511	pinctrl-names = "default";
512	pinctrl-0 = <&pinctrl_pwm1>;
513	status = "okay";
514};
515
516&pwm3 {
517	pinctrl-names = "default";
518	pinctrl-0 = <&pinctrl_pwm3>;
519	status = "okay";
520};
521
522&pwm4 {
523	#pwm-cells = <2>;
524	pinctrl-names = "default";
525	pinctrl-0 = <&pinctrl_pwm4>;
526	status = "okay";
527};
528
529&ssi1 {
530	status = "okay";
531};
532
533&uart1 {
534	pinctrl-names = "default";
535	pinctrl-0 = <&pinctrl_uart1>;
536	status = "okay";
537};
538
539&uart2 {
540	pinctrl-names = "default";
541	pinctrl-0 = <&pinctrl_uart2>;
542	status = "okay";
543};
544
545&uart3 {
546	pinctrl-names = "default";
547	pinctrl-0 = <&pinctrl_uart3>;
548	uart-has-rtscts;
549	status = "okay";
550};
551
552&usbh1 {
553	status = "okay";
554};
555
556&usbotg {
557	vbus-supply = <&reg_usb_otg_vbus>;
558	pinctrl-names = "default";
559	pinctrl-0 = <&pinctrl_usbotg>;
560	disable-over-current;
561	status = "okay";
562};
563
564&usdhc2 {
565	pinctrl-names = "default";
566	pinctrl-0 = <&pinctrl_usdhc2>;
567	bus-width = <4>;
568	non-removable;
569	vmmc-supply = <&reg_3p3v>;
570	vqmmc-supply = <&reg_wlan_vmmc>;
571	cap-power-off-card;
572	keep-power-in-suspend;
573	status = "okay";
574};
575
576&usdhc3 {
577	pinctrl-names = "default";
578	pinctrl-0 = <&pinctrl_usdhc3>;
579	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
580	vmmc-supply = <&reg_3p3v>;
581	status = "okay";
582};
583