1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2016 Freescale Semiconductor, Inc. 4 * Copyright 2017-2018 NXP. 5 * 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include "imx6sll.dtsi" 13 14/ { 15 model = "Freescale i.MX6SLL EVK Board"; 16 compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; 17 18 chosen { 19 stdout-path = &uart1; 20 }; 21 22 memory@80000000 { 23 device_type = "memory"; 24 reg = <0x80000000 0x80000000>; 25 }; 26 27 backlight_display: backlight-display { 28 compatible = "pwm-backlight"; 29 pwms = <&pwm1 0 5000000>; 30 brightness-levels = <0 4 8 16 32 64 128 255>; 31 default-brightness-level = <6>; 32 status = "okay"; 33 }; 34 35 leds { 36 compatible = "gpio-leds"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&pinctrl_led>; 39 40 user { 41 label = "debug"; 42 gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; 43 linux,default-trigger = "heartbeat"; 44 }; 45 }; 46 47 reg_usb_otg1_vbus: regulator-otg1-vbus { 48 compatible = "regulator-fixed"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_usb_otg1_vbus>; 51 regulator-name = "usb_otg1_vbus"; 52 regulator-min-microvolt = <5000000>; 53 regulator-max-microvolt = <5000000>; 54 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; 55 enable-active-high; 56 }; 57 58 reg_usb_otg2_vbus: regulator-otg2-vbus { 59 compatible = "regulator-fixed"; 60 pinctrl-names = "default"; 61 pinctrl-0 = <&pinctrl_usb_otg2_vbus>; 62 regulator-name = "usb_otg2_vbus"; 63 regulator-min-microvolt = <5000000>; 64 regulator-max-microvolt = <5000000>; 65 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; 66 enable-active-high; 67 }; 68 69 reg_aud3v: regulator-aud3v { 70 compatible = "regulator-fixed"; 71 regulator-name = "wm8962-supply-3v15"; 72 regulator-min-microvolt = <3150000>; 73 regulator-max-microvolt = <3150000>; 74 regulator-boot-on; 75 }; 76 77 reg_aud4v: regulator-aud4v { 78 compatible = "regulator-fixed"; 79 regulator-name = "wm8962-supply-4v2"; 80 regulator-min-microvolt = <4325000>; 81 regulator-max-microvolt = <4325000>; 82 regulator-boot-on; 83 }; 84 85 reg_lcd_3v3: regulator-lcd-3v3 { 86 compatible = "regulator-fixed"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_reg_lcd_3v3>; 89 regulator-name = "lcd-3v3"; 90 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 }; 93 94 reg_lcd_5v: regulator-lcd-5v { 95 compatible = "regulator-fixed"; 96 regulator-name = "lcd-5v0"; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 }; 100 101 reg_sd1_vmmc: regulator-sd1-vmmc { 102 compatible = "regulator-fixed"; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_reg_sd1_vmmc>; 105 regulator-name = "SD1_SPWR"; 106 regulator-min-microvolt = <3000000>; 107 regulator-max-microvolt = <3000000>; 108 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; 109 enable-active-high; 110 }; 111 112 reg_sd3_vmmc: regulator-sd3-vmmc { 113 compatible = "regulator-fixed"; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_reg_sd3_vmmc>; 116 regulator-name = "SD3_WIFI"; 117 regulator-min-microvolt = <3000000>; 118 regulator-max-microvolt = <3000000>; 119 gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>; 120 enable-active-high; 121 }; 122 123 panel { 124 compatible = "sii,43wvf1g"; 125 backlight = <&backlight_display>; 126 dvdd-supply = <®_lcd_3v3>; 127 avdd-supply = <®_lcd_5v>; 128 129 port { 130 panel_in: endpoint { 131 remote-endpoint = <&display_out>; 132 }; 133 }; 134 }; 135 136 sound { 137 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_hp>; 140 model = "wm8962-audio"; 141 audio-cpu = <&ssi2>; 142 audio-codec = <&wm8962>; 143 audio-routing = 144 "Headphone Jack", "HPOUTL", 145 "Headphone Jack", "HPOUTR", 146 "Ext Spk", "SPKOUTL", 147 "Ext Spk", "SPKOUTR", 148 "AMIC", "MICBIAS", 149 "IN3R", "AMIC"; 150 mux-int-port = <2>; 151 mux-ext-port = <3>; 152 hp-det-gpio = <&gpio4 24 GPIO_ACTIVE_LOW>; 153 }; 154}; 155 156&audmux { 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pinctrl_audmux3>; 159 status = "okay"; 160}; 161 162&cpu0 { 163 arm-supply = <&sw1a_reg>; 164 soc-supply = <&sw1c_reg>; 165}; 166 167&i2c1 { 168 clock-frequency = <100000>; 169 pinctrl-names = "default"; 170 pinctrl-0 = <&pinctrl_i2c1>; 171 status = "okay"; 172 173 pfuze100: pmic@8 { 174 compatible = "fsl,pfuze100"; 175 reg = <0x08>; 176 177 regulators { 178 sw1a_reg: sw1ab { 179 regulator-min-microvolt = <300000>; 180 regulator-max-microvolt = <1875000>; 181 regulator-boot-on; 182 regulator-always-on; 183 regulator-ramp-delay = <6250>; 184 }; 185 186 sw1c_reg: sw1c { 187 regulator-min-microvolt = <300000>; 188 regulator-max-microvolt = <1875000>; 189 regulator-boot-on; 190 regulator-always-on; 191 regulator-ramp-delay = <6250>; 192 }; 193 194 sw2_reg: sw2 { 195 regulator-min-microvolt = <800000>; 196 regulator-max-microvolt = <3300000>; 197 regulator-boot-on; 198 regulator-always-on; 199 }; 200 201 sw3a_reg: sw3a { 202 regulator-min-microvolt = <400000>; 203 regulator-max-microvolt = <1975000>; 204 regulator-boot-on; 205 regulator-always-on; 206 }; 207 208 sw3b_reg: sw3b { 209 regulator-min-microvolt = <400000>; 210 regulator-max-microvolt = <1975000>; 211 regulator-boot-on; 212 regulator-always-on; 213 }; 214 215 sw4_reg: sw4 { 216 regulator-min-microvolt = <800000>; 217 regulator-max-microvolt = <3300000>; 218 regulator-always-on; 219 }; 220 221 swbst_reg: swbst { 222 regulator-min-microvolt = <5000000>; 223 regulator-max-microvolt = <5150000>; 224 }; 225 226 snvs_reg: vsnvs { 227 regulator-min-microvolt = <1000000>; 228 regulator-max-microvolt = <3000000>; 229 regulator-boot-on; 230 regulator-always-on; 231 }; 232 233 vref_reg: vrefddr { 234 regulator-boot-on; 235 regulator-always-on; 236 }; 237 238 vgen1_reg: vgen1 { 239 regulator-min-microvolt = <800000>; 240 regulator-max-microvolt = <1550000>; 241 regulator-always-on; 242 }; 243 244 vgen2_reg: vgen2 { 245 regulator-min-microvolt = <800000>; 246 regulator-max-microvolt = <1550000>; 247 }; 248 249 vgen3_reg: vgen3 { 250 regulator-min-microvolt = <1800000>; 251 regulator-max-microvolt = <3300000>; 252 }; 253 254 vgen4_reg: vgen4 { 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <3300000>; 257 regulator-always-on; 258 }; 259 260 vgen5_reg: vgen5 { 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <3300000>; 263 regulator-always-on; 264 }; 265 266 vgen6_reg: vgen6 { 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <3300000>; 269 regulator-always-on; 270 }; 271 }; 272 }; 273}; 274 275&i2c3 { 276 clock-frequency = <100000>; 277 pinctrl-names = "default"; 278 pinctrl-0 = <&pinctrl_i2c3>; 279 status = "okay"; 280 281 wm8962: audio-codec@1a { 282 compatible = "wlf,wm8962"; 283 reg = <0x1a>; 284 clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>; 285 DCVDD-supply = <&vgen3_reg>; 286 DBVDD-supply = <®_aud3v>; 287 AVDD-supply = <&vgen3_reg>; 288 CPVDD-supply = <&vgen3_reg>; 289 MICVDD-supply = <®_aud3v>; 290 PLLVDD-supply = <&vgen3_reg>; 291 SPKVDD1-supply = <®_aud4v>; 292 SPKVDD2-supply = <®_aud4v>; 293 }; 294}; 295 296&lcdif { 297 pinctrl-names = "default"; 298 pinctrl-0 = <&pinctrl_lcd>; 299 status = "okay"; 300 301 port { 302 display_out: endpoint { 303 remote-endpoint = <&panel_in>; 304 }; 305 }; 306}; 307 308&pwm1 { 309 #pwm-cells = <2>; 310 pinctrl-names = "default"; 311 pinctrl-0 = <&pinctrl_pwm1>; 312 status = "okay"; 313}; 314 315&snvs_poweroff { 316 status = "okay"; 317}; 318 319&snvs_pwrkey { 320 status = "okay"; 321}; 322 323&ssi2 { 324 status = "okay"; 325}; 326 327&uart1 { 328 pinctrl-names = "default"; 329 pinctrl-0 = <&pinctrl_uart1>; 330 status = "okay"; 331}; 332 333&usdhc1 { 334 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 335 pinctrl-0 = <&pinctrl_usdhc1>; 336 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 337 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 338 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 339 wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; 340 keep-power-in-suspend; 341 wakeup-source; 342 vmmc-supply = <®_sd1_vmmc>; 343 status = "okay"; 344}; 345 346&usbotg1 { 347 vbus-supply = <®_usb_otg1_vbus>; 348 pinctrl-names = "default"; 349 pinctrl-0 = <&pinctrl_usbotg1>; 350 disable-over-current; 351 srp-disable; 352 hnp-disable; 353 adp-disable; 354 status = "okay"; 355}; 356 357&usbotg2 { 358 vbus-supply = <®_usb_otg2_vbus>; 359 dr_mode = "host"; 360 disable-over-current; 361 status = "okay"; 362}; 363 364&usdhc3 { 365 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 366 pinctrl-0 = <&pinctrl_usdhc3>; 367 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 368 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 369 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 370 keep-power-in-suspend; 371 wakeup-source; 372 vmmc-supply = <®_sd3_vmmc>; 373 status = "okay"; 374}; 375 376&wdog1 { 377 pinctrl-names = "default"; 378 pinctrl-0 = <&pinctrl_wdog1>; 379 fsl,ext-reset-output; 380}; 381 382&iomuxc { 383 pinctrl_audmux3: audmux3grp { 384 fsl,pins = < 385 MX6SLL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 386 MX6SLL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 387 MX6SLL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 388 MX6SLL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 389 MX6SLL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 390 >; 391 }; 392 393 pinctrl_hp: hpgrp { 394 fsl,pins = < 395 MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* HP DETECT */ 396 >; 397 }; 398 399 pinctrl_reg_sd3_vmmc: sd3vmmcgrp { 400 fsl,pins = < 401 MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059 402 >; 403 }; 404 405 pinctrl_usb_otg1_vbus: vbus1grp { 406 fsl,pins = < 407 MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059 408 >; 409 }; 410 411 pinctrl_usb_otg2_vbus: vbus2grp { 412 fsl,pins = < 413 MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059 414 >; 415 }; 416 417 pinctrl_reg_lcd_3v3: reglcd3v3grp { 418 fsl,pins = < 419 MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059 420 >; 421 }; 422 423 pinctrl_reg_sd1_vmmc: sd1vmmcgrp { 424 fsl,pins = < 425 MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059 426 >; 427 }; 428 429 pinctrl_uart1: uart1grp { 430 fsl,pins = < 431 MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1 432 MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1 433 >; 434 }; 435 436 pinctrl_usdhc1: usdhc1grp { 437 fsl,pins = < 438 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059 439 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059 440 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059 441 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059 442 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059 443 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059 444 >; 445 }; 446 447 pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { 448 fsl,pins = < 449 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9 450 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9 451 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9 452 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9 453 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9 454 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9 455 >; 456 }; 457 458 pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { 459 fsl,pins = < 460 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9 461 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9 462 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9 463 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9 464 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9 465 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9 466 >; 467 }; 468 469 pinctrl_usbotg1: usbotg1grp { 470 fsl,pins = < 471 MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059 472 >; 473 }; 474 475 pinctrl_usdhc3: usdhc3grp { 476 fsl,pins = < 477 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061 478 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061 479 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061 480 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061 481 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061 482 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061 483 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 484 >; 485 }; 486 487 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { 488 fsl,pins = < 489 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1 490 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1 491 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1 492 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1 493 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1 494 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1 495 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 496 >; 497 }; 498 499 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { 500 fsl,pins = < 501 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9 502 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9 503 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9 504 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9 505 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9 506 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9 507 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 508 >; 509 }; 510 511 pinctrl_i2c1: i2c1grp { 512 fsl,pins = < 513 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 514 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 515 >; 516 }; 517 518 pinctrl_i2c3: i2c3grp { 519 fsl,pins = < 520 MX6SLL_PAD_AUD_RXFS__I2C3_SCL 0x4041b8b1 521 MX6SLL_PAD_AUD_RXC__I2C3_SDA 0x4041b8b1 522 >; 523 }; 524 525 pinctrl_lcd: lcdgrp { 526 fsl,pins = < 527 MX6SLL_PAD_LCD_DATA00__LCD_DATA00 0x79 528 MX6SLL_PAD_LCD_DATA01__LCD_DATA01 0x79 529 MX6SLL_PAD_LCD_DATA02__LCD_DATA02 0x79 530 MX6SLL_PAD_LCD_DATA03__LCD_DATA03 0x79 531 MX6SLL_PAD_LCD_DATA04__LCD_DATA04 0x79 532 MX6SLL_PAD_LCD_DATA05__LCD_DATA05 0x79 533 MX6SLL_PAD_LCD_DATA06__LCD_DATA06 0x79 534 MX6SLL_PAD_LCD_DATA07__LCD_DATA07 0x79 535 MX6SLL_PAD_LCD_DATA08__LCD_DATA08 0x79 536 MX6SLL_PAD_LCD_DATA09__LCD_DATA09 0x79 537 MX6SLL_PAD_LCD_DATA10__LCD_DATA10 0x79 538 MX6SLL_PAD_LCD_DATA11__LCD_DATA11 0x79 539 MX6SLL_PAD_LCD_DATA12__LCD_DATA12 0x79 540 MX6SLL_PAD_LCD_DATA13__LCD_DATA13 0x79 541 MX6SLL_PAD_LCD_DATA14__LCD_DATA14 0x79 542 MX6SLL_PAD_LCD_DATA15__LCD_DATA15 0x79 543 MX6SLL_PAD_LCD_DATA16__LCD_DATA16 0x79 544 MX6SLL_PAD_LCD_DATA17__LCD_DATA17 0x79 545 MX6SLL_PAD_LCD_DATA18__LCD_DATA18 0x79 546 MX6SLL_PAD_LCD_DATA19__LCD_DATA19 0x79 547 MX6SLL_PAD_LCD_DATA20__LCD_DATA20 0x79 548 MX6SLL_PAD_LCD_DATA21__LCD_DATA21 0x79 549 MX6SLL_PAD_LCD_DATA22__LCD_DATA22 0x79 550 MX6SLL_PAD_LCD_DATA23__LCD_DATA23 0x79 551 MX6SLL_PAD_LCD_CLK__LCD_CLK 0x79 552 MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE 0x79 553 MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC 0x79 554 MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC 0x79 555 MX6SLL_PAD_LCD_RESET__LCD_RESET 0x79 556 >; 557 }; 558 559 pinctrl_led: ledgrp { 560 fsl,pins = < 561 MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 0x17059 562 >; 563 }; 564 565 pinctrl_pwm1: pmw1grp { 566 fsl,pins = < 567 MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0 568 >; 569 }; 570 571 pinctrl_wdog1: wdog1grp { 572 fsl,pins = < 573 MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0 574 >; 575 }; 576}; 577