1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
5 *
6 */
7
8/dts-v1/;
9
10#include "imx7d.dtsi"
11
12/ {
13	model = "reMarkable 2.0";
14	compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
15
16	chosen {
17		stdout-path = &uart6;
18	};
19
20	memory@80000000 {
21		device_type = "memory";
22		reg = <0x80000000 0x40000000>;
23	};
24
25	reg_brcm: regulator-brcm {
26		compatible = "regulator-fixed";
27		regulator-name = "brcm_reg";
28		regulator-min-microvolt = <3300000>;
29		regulator-max-microvolt = <3300000>;
30		pinctrl-names = "default";
31		pinctrl-0 = <&pinctrl_brcm_reg>;
32		gpio = <&gpio6 13 GPIO_ACTIVE_HIGH>;
33		enable-active-high;
34		startup-delay-us = <150>;
35	};
36
37	wifi_pwrseq: wifi_pwrseq {
38		compatible = "mmc-pwrseq-simple";
39		pinctrl-names = "default";
40		pinctrl-0 = <&pinctrl_wifi>;
41		reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
42		clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
43		clock-names = "ext_clock";
44	};
45};
46
47&clks {
48	assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
49			  <&clks IMX7D_CLKO2_ROOT_DIV>;
50	assigned-clock-parents = <&clks IMX7D_CKIL>;
51	assigned-clock-rates = <0>, <32768>;
52};
53
54&snvs_pwrkey {
55	status = "okay";
56};
57
58&uart1 {
59	pinctrl-names = "default";
60	pinctrl-0 = <&pinctrl_uart1>;
61	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
62	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
63	status = "okay";
64};
65
66&uart6 {
67	pinctrl-names = "default";
68	pinctrl-0 = <&pinctrl_uart6>;
69	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
70	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
71	status = "okay";
72};
73
74&usbotg2 {
75	srp-disable;
76	hnp-disable;
77	status = "okay";
78};
79
80&usdhc2 {
81	#address-cells = <1>;
82	#size-cells = <0>;
83	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
84	pinctrl-0 = <&pinctrl_usdhc2>;
85	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
86	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
87	mmc-pwrseq = <&wifi_pwrseq>;
88	vmmc-supply = <&reg_brcm>;
89	bus-width = <4>;
90	non-removable;
91	keep-power-in-suspend;
92	cap-power-off-card;
93	status = "okay";
94
95	brcmf: bcrmf@1 {
96		reg = <1>;
97		compatible = "brcm,bcm4329-fmac";
98	};
99};
100
101&usdhc3 {
102	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
103	pinctrl-0 = <&pinctrl_usdhc3>;
104	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
105	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
106	pinctrl-3 = <&pinctrl_usdhc3>;
107	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
108	assigned-clock-rates = <400000000>;
109	bus-width = <8>;
110	non-removable;
111	status = "okay";
112};
113
114&wdog1 {
115	pinctrl-names = "default";
116	pinctrl-0 = <&pinctrl_wdog>;
117	fsl,ext-reset-output;
118};
119
120&iomuxc {
121	pinctrl_brcm_reg: brcmreggrp {
122		fsl,pins = <
123			/* WIFI_PWR_EN */
124			MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	0x14
125		>;
126	};
127
128	pinctrl_uart1: uart1grp {
129		fsl,pins = <
130			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
131			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
132		>;
133	};
134
135	pinctrl_uart6: uart6grp {
136		fsl,pins = <
137			MX7D_PAD_EPDC_DATA09__UART6_DCE_TX		0x79
138			MX7D_PAD_EPDC_DATA08__UART6_DCE_RX		0x79
139		>;
140	};
141
142	pinctrl_usdhc2: usdhc2grp {
143		fsl,pins = <
144			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
145			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
146			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
147			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
148			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
149			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
150		>;
151	};
152
153	pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
154		fsl,pins = <
155			MX7D_PAD_SD2_CMD__SD2_CMD		0x5a
156			MX7D_PAD_SD2_CLK__SD2_CLK		0x1a
157			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5a
158			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5a
159			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5a
160			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5a
161		>;
162	};
163
164	pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
165		fsl,pins = <
166			MX7D_PAD_SD2_CMD__SD2_CMD		0x5b
167			MX7D_PAD_SD2_CLK__SD2_CLK		0x1b
168			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x5b
169			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x5b
170			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x5b
171			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x5b
172		>;
173	};
174
175	pinctrl_usdhc3: usdhc3grp {
176		fsl,pins = <
177			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
178			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
179			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
180			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
181			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
182			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
183			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
184			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
185			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
186			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
187			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
188		>;
189	};
190
191	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
192		fsl,pins = <
193			MX7D_PAD_SD3_CMD__SD3_CMD		0x5a
194			MX7D_PAD_SD3_CLK__SD3_CLK		0x1a
195			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5a
196			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5a
197			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5a
198			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5a
199			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5a
200			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5a
201			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5a
202			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5a
203			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1a
204		>;
205	};
206
207	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
208		fsl,pins = <
209			MX7D_PAD_SD3_CMD__SD3_CMD		0x5b
210			MX7D_PAD_SD3_CLK__SD3_CLK		0x1b
211			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x5b
212			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x5b
213			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x5b
214			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x5b
215			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x5b
216			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x5b
217			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x5b
218			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x5b
219			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b
220		>;
221	};
222
223	pinctrl_wdog: wdoggrp {
224		fsl,pins = <
225			MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY	0x74
226		>;
227	};
228
229	pinctrl_wifi: wifigrp {
230		fsl,pins = <
231			/* WiFi Reg On */
232			MX7D_PAD_SD2_CD_B__GPIO5_IO9		0x00000014
233			/* WiFi Sleep 32k */
234			MX7D_PAD_SD1_WP__CCM_CLKO2		0x00000014
235		>;
236	};
237};
238