1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7743 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7743-cpg-mssr.h> 11#include <dt-bindings/power/r8a7743-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7743"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 /* This value must be overridden by the board. */ 46 clock-frequency = <0>; 47 }; 48 49 cpus { 50 #address-cells = <1>; 51 #size-cells = <0>; 52 53 cpu0: cpu@0 { 54 device_type = "cpu"; 55 compatible = "arm,cortex-a15"; 56 reg = <0>; 57 clock-frequency = <1500000000>; 58 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>; 59 clock-latency = <300000>; /* 300 us */ 60 power-domains = <&sysc R8A7743_PD_CA15_CPU0>; 61 enable-method = "renesas,apmu"; 62 next-level-cache = <&L2_CA15>; 63 64 /* kHz - uV - OPPs unknown yet */ 65 operating-points = <1500000 1000000>, 66 <1312500 1000000>, 67 <1125000 1000000>, 68 < 937500 1000000>, 69 < 750000 1000000>, 70 < 375000 1000000>; 71 }; 72 73 cpu1: cpu@1 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <1>; 77 clock-frequency = <1500000000>; 78 clocks = <&cpg CPG_CORE R8A7743_CLK_Z>; 79 clock-latency = <300000>; /* 300 us */ 80 power-domains = <&sysc R8A7743_PD_CA15_CPU1>; 81 enable-method = "renesas,apmu"; 82 next-level-cache = <&L2_CA15>; 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 L2_CA15: cache-controller-0 { 94 compatible = "cache"; 95 cache-unified; 96 cache-level = <2>; 97 power-domains = <&sysc R8A7743_PD_CA15_SCU>; 98 }; 99 }; 100 101 /* External root clock */ 102 extal_clk: extal { 103 compatible = "fixed-clock"; 104 #clock-cells = <0>; 105 /* This value must be overridden by the board. */ 106 clock-frequency = <0>; 107 }; 108 109 /* External PCIe clock - can be overridden by the board */ 110 pcie_bus_clk: pcie_bus { 111 compatible = "fixed-clock"; 112 #clock-cells = <0>; 113 clock-frequency = <0>; 114 }; 115 116 pmu { 117 compatible = "arm,cortex-a15-pmu"; 118 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 119 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 120 interrupt-affinity = <&cpu0>, <&cpu1>; 121 }; 122 123 /* External SCIF clock */ 124 scif_clk: scif { 125 compatible = "fixed-clock"; 126 #clock-cells = <0>; 127 /* This value must be overridden by the board. */ 128 clock-frequency = <0>; 129 }; 130 131 soc { 132 compatible = "simple-bus"; 133 interrupt-parent = <&gic>; 134 135 #address-cells = <2>; 136 #size-cells = <2>; 137 ranges; 138 139 rwdt: watchdog@e6020000 { 140 compatible = "renesas,r8a7743-wdt", 141 "renesas,rcar-gen2-wdt"; 142 reg = <0 0xe6020000 0 0x0c>; 143 clocks = <&cpg CPG_MOD 402>; 144 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 145 resets = <&cpg 402>; 146 status = "disabled"; 147 }; 148 149 gpio0: gpio@e6050000 { 150 compatible = "renesas,gpio-r8a7743", 151 "renesas,rcar-gen2-gpio"; 152 reg = <0 0xe6050000 0 0x50>; 153 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 154 #gpio-cells = <2>; 155 gpio-controller; 156 gpio-ranges = <&pfc 0 0 32>; 157 #interrupt-cells = <2>; 158 interrupt-controller; 159 clocks = <&cpg CPG_MOD 912>; 160 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 161 resets = <&cpg 912>; 162 }; 163 164 gpio1: gpio@e6051000 { 165 compatible = "renesas,gpio-r8a7743", 166 "renesas,rcar-gen2-gpio"; 167 reg = <0 0xe6051000 0 0x50>; 168 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 169 #gpio-cells = <2>; 170 gpio-controller; 171 gpio-ranges = <&pfc 0 32 26>; 172 #interrupt-cells = <2>; 173 interrupt-controller; 174 clocks = <&cpg CPG_MOD 911>; 175 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 176 resets = <&cpg 911>; 177 }; 178 179 gpio2: gpio@e6052000 { 180 compatible = "renesas,gpio-r8a7743", 181 "renesas,rcar-gen2-gpio"; 182 reg = <0 0xe6052000 0 0x50>; 183 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 184 #gpio-cells = <2>; 185 gpio-controller; 186 gpio-ranges = <&pfc 0 64 32>; 187 #interrupt-cells = <2>; 188 interrupt-controller; 189 clocks = <&cpg CPG_MOD 910>; 190 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 191 resets = <&cpg 910>; 192 }; 193 194 gpio3: gpio@e6053000 { 195 compatible = "renesas,gpio-r8a7743", 196 "renesas,rcar-gen2-gpio"; 197 reg = <0 0xe6053000 0 0x50>; 198 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 199 #gpio-cells = <2>; 200 gpio-controller; 201 gpio-ranges = <&pfc 0 96 32>; 202 #interrupt-cells = <2>; 203 interrupt-controller; 204 clocks = <&cpg CPG_MOD 909>; 205 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 206 resets = <&cpg 909>; 207 }; 208 209 gpio4: gpio@e6054000 { 210 compatible = "renesas,gpio-r8a7743", 211 "renesas,rcar-gen2-gpio"; 212 reg = <0 0xe6054000 0 0x50>; 213 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 214 #gpio-cells = <2>; 215 gpio-controller; 216 gpio-ranges = <&pfc 0 128 32>; 217 #interrupt-cells = <2>; 218 interrupt-controller; 219 clocks = <&cpg CPG_MOD 908>; 220 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 221 resets = <&cpg 908>; 222 }; 223 224 gpio5: gpio@e6055000 { 225 compatible = "renesas,gpio-r8a7743", 226 "renesas,rcar-gen2-gpio"; 227 reg = <0 0xe6055000 0 0x50>; 228 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 229 #gpio-cells = <2>; 230 gpio-controller; 231 gpio-ranges = <&pfc 0 160 32>; 232 #interrupt-cells = <2>; 233 interrupt-controller; 234 clocks = <&cpg CPG_MOD 907>; 235 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 236 resets = <&cpg 907>; 237 }; 238 239 gpio6: gpio@e6055400 { 240 compatible = "renesas,gpio-r8a7743", 241 "renesas,rcar-gen2-gpio"; 242 reg = <0 0xe6055400 0 0x50>; 243 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 244 #gpio-cells = <2>; 245 gpio-controller; 246 gpio-ranges = <&pfc 0 192 32>; 247 #interrupt-cells = <2>; 248 interrupt-controller; 249 clocks = <&cpg CPG_MOD 905>; 250 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 251 resets = <&cpg 905>; 252 }; 253 254 gpio7: gpio@e6055800 { 255 compatible = "renesas,gpio-r8a7743", 256 "renesas,rcar-gen2-gpio"; 257 reg = <0 0xe6055800 0 0x50>; 258 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 259 #gpio-cells = <2>; 260 gpio-controller; 261 gpio-ranges = <&pfc 0 224 26>; 262 #interrupt-cells = <2>; 263 interrupt-controller; 264 clocks = <&cpg CPG_MOD 904>; 265 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 266 resets = <&cpg 904>; 267 }; 268 269 pfc: pinctrl@e6060000 { 270 compatible = "renesas,pfc-r8a7743"; 271 reg = <0 0xe6060000 0 0x250>; 272 }; 273 274 tpu: pwm@e60f0000 { 275 compatible = "renesas,tpu-r8a7743", "renesas,tpu"; 276 reg = <0 0xe60f0000 0 0x148>; 277 clocks = <&cpg CPG_MOD 304>; 278 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 279 resets = <&cpg 304>; 280 #pwm-cells = <3>; 281 status = "disabled"; 282 }; 283 284 cpg: clock-controller@e6150000 { 285 compatible = "renesas,r8a7743-cpg-mssr"; 286 reg = <0 0xe6150000 0 0x1000>; 287 clocks = <&extal_clk>, <&usb_extal_clk>; 288 clock-names = "extal", "usb_extal"; 289 #clock-cells = <2>; 290 #power-domain-cells = <0>; 291 #reset-cells = <1>; 292 }; 293 294 apmu@e6152000 { 295 compatible = "renesas,r8a7743-apmu", "renesas,apmu"; 296 reg = <0 0xe6152000 0 0x188>; 297 cpus = <&cpu0>, <&cpu1>; 298 }; 299 300 rst: reset-controller@e6160000 { 301 compatible = "renesas,r8a7743-rst"; 302 reg = <0 0xe6160000 0 0x100>; 303 }; 304 305 sysc: system-controller@e6180000 { 306 compatible = "renesas,r8a7743-sysc"; 307 reg = <0 0xe6180000 0 0x200>; 308 #power-domain-cells = <1>; 309 }; 310 311 irqc: interrupt-controller@e61c0000 { 312 compatible = "renesas,irqc-r8a7743", "renesas,irqc"; 313 #interrupt-cells = <2>; 314 interrupt-controller; 315 reg = <0 0xe61c0000 0 0x200>; 316 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 326 clocks = <&cpg CPG_MOD 407>; 327 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 328 resets = <&cpg 407>; 329 }; 330 331 thermal: thermal@e61f0000 { 332 compatible = "renesas,thermal-r8a7743", 333 "renesas,rcar-gen2-thermal"; 334 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 335 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 336 clocks = <&cpg CPG_MOD 522>; 337 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 338 resets = <&cpg 522>; 339 #thermal-sensor-cells = <0>; 340 }; 341 342 ipmmu_sy0: iommu@e6280000 { 343 compatible = "renesas,ipmmu-r8a7743", 344 "renesas,ipmmu-vmsa"; 345 reg = <0 0xe6280000 0 0x1000>; 346 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 348 #iommu-cells = <1>; 349 status = "disabled"; 350 }; 351 352 ipmmu_sy1: iommu@e6290000 { 353 compatible = "renesas,ipmmu-r8a7743", 354 "renesas,ipmmu-vmsa"; 355 reg = <0 0xe6290000 0 0x1000>; 356 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 357 #iommu-cells = <1>; 358 status = "disabled"; 359 }; 360 361 ipmmu_ds: iommu@e6740000 { 362 compatible = "renesas,ipmmu-r8a7743", 363 "renesas,ipmmu-vmsa"; 364 reg = <0 0xe6740000 0 0x1000>; 365 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 367 #iommu-cells = <1>; 368 status = "disabled"; 369 }; 370 371 ipmmu_mp: iommu@ec680000 { 372 compatible = "renesas,ipmmu-r8a7743", 373 "renesas,ipmmu-vmsa"; 374 reg = <0 0xec680000 0 0x1000>; 375 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 376 #iommu-cells = <1>; 377 status = "disabled"; 378 }; 379 380 ipmmu_mx: iommu@fe951000 { 381 compatible = "renesas,ipmmu-r8a7743", 382 "renesas,ipmmu-vmsa"; 383 reg = <0 0xfe951000 0 0x1000>; 384 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 386 #iommu-cells = <1>; 387 status = "disabled"; 388 }; 389 390 ipmmu_gp: iommu@e62a0000 { 391 compatible = "renesas,ipmmu-r8a7743", 392 "renesas,ipmmu-vmsa"; 393 reg = <0 0xe62a0000 0 0x1000>; 394 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 396 #iommu-cells = <1>; 397 status = "disabled"; 398 }; 399 400 icram0: sram@e63a0000 { 401 compatible = "mmio-sram"; 402 reg = <0 0xe63a0000 0 0x12000>; 403 #address-cells = <1>; 404 #size-cells = <1>; 405 ranges = <0 0 0xe63a0000 0x12000>; 406 }; 407 408 icram1: sram@e63c0000 { 409 compatible = "mmio-sram"; 410 reg = <0 0xe63c0000 0 0x1000>; 411 #address-cells = <1>; 412 #size-cells = <1>; 413 ranges = <0 0 0xe63c0000 0x1000>; 414 415 smp-sram@0 { 416 compatible = "renesas,smp-sram"; 417 reg = <0 0x100>; 418 }; 419 }; 420 421 icram2: sram@e6300000 { 422 compatible = "mmio-sram"; 423 reg = <0 0xe6300000 0 0x40000>; 424 #address-cells = <1>; 425 #size-cells = <1>; 426 ranges = <0 0 0xe6300000 0x40000>; 427 }; 428 429 /* The memory map in the User's Manual maps the cores to 430 * bus numbers 431 */ 432 i2c0: i2c@e6508000 { 433 #address-cells = <1>; 434 #size-cells = <0>; 435 compatible = "renesas,i2c-r8a7743", 436 "renesas,rcar-gen2-i2c"; 437 reg = <0 0xe6508000 0 0x40>; 438 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 439 clocks = <&cpg CPG_MOD 931>; 440 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 441 resets = <&cpg 931>; 442 i2c-scl-internal-delay-ns = <6>; 443 status = "disabled"; 444 }; 445 446 i2c1: i2c@e6518000 { 447 #address-cells = <1>; 448 #size-cells = <0>; 449 compatible = "renesas,i2c-r8a7743", 450 "renesas,rcar-gen2-i2c"; 451 reg = <0 0xe6518000 0 0x40>; 452 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 930>; 454 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 455 resets = <&cpg 930>; 456 i2c-scl-internal-delay-ns = <6>; 457 status = "disabled"; 458 }; 459 460 i2c2: i2c@e6530000 { 461 #address-cells = <1>; 462 #size-cells = <0>; 463 compatible = "renesas,i2c-r8a7743", 464 "renesas,rcar-gen2-i2c"; 465 reg = <0 0xe6530000 0 0x40>; 466 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 929>; 468 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 469 resets = <&cpg 929>; 470 i2c-scl-internal-delay-ns = <6>; 471 status = "disabled"; 472 }; 473 474 i2c3: i2c@e6540000 { 475 #address-cells = <1>; 476 #size-cells = <0>; 477 compatible = "renesas,i2c-r8a7743", 478 "renesas,rcar-gen2-i2c"; 479 reg = <0 0xe6540000 0 0x40>; 480 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 481 clocks = <&cpg CPG_MOD 928>; 482 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 483 resets = <&cpg 928>; 484 i2c-scl-internal-delay-ns = <6>; 485 status = "disabled"; 486 }; 487 488 i2c4: i2c@e6520000 { 489 #address-cells = <1>; 490 #size-cells = <0>; 491 compatible = "renesas,i2c-r8a7743", 492 "renesas,rcar-gen2-i2c"; 493 reg = <0 0xe6520000 0 0x40>; 494 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 495 clocks = <&cpg CPG_MOD 927>; 496 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 497 resets = <&cpg 927>; 498 i2c-scl-internal-delay-ns = <6>; 499 status = "disabled"; 500 }; 501 502 i2c5: i2c@e6528000 { 503 /* doesn't need pinmux */ 504 #address-cells = <1>; 505 #size-cells = <0>; 506 compatible = "renesas,i2c-r8a7743", 507 "renesas,rcar-gen2-i2c"; 508 reg = <0 0xe6528000 0 0x40>; 509 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 510 clocks = <&cpg CPG_MOD 925>; 511 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 512 resets = <&cpg 925>; 513 i2c-scl-internal-delay-ns = <110>; 514 status = "disabled"; 515 }; 516 517 iic0: i2c@e6500000 { 518 #address-cells = <1>; 519 #size-cells = <0>; 520 compatible = "renesas,iic-r8a7743", 521 "renesas,rcar-gen2-iic", 522 "renesas,rmobile-iic"; 523 reg = <0 0xe6500000 0 0x425>; 524 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 525 clocks = <&cpg CPG_MOD 318>; 526 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 527 <&dmac1 0x61>, <&dmac1 0x62>; 528 dma-names = "tx", "rx", "tx", "rx"; 529 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 530 resets = <&cpg 318>; 531 status = "disabled"; 532 }; 533 534 iic1: i2c@e6510000 { 535 #address-cells = <1>; 536 #size-cells = <0>; 537 compatible = "renesas,iic-r8a7743", 538 "renesas,rcar-gen2-iic", 539 "renesas,rmobile-iic"; 540 reg = <0 0xe6510000 0 0x425>; 541 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 542 clocks = <&cpg CPG_MOD 323>; 543 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 544 <&dmac1 0x65>, <&dmac1 0x66>; 545 dma-names = "tx", "rx", "tx", "rx"; 546 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 547 resets = <&cpg 323>; 548 status = "disabled"; 549 }; 550 551 iic3: i2c@e60b0000 { 552 /* doesn't need pinmux */ 553 #address-cells = <1>; 554 #size-cells = <0>; 555 compatible = "renesas,iic-r8a7743", 556 "renesas,rcar-gen2-iic", 557 "renesas,rmobile-iic"; 558 reg = <0 0xe60b0000 0 0x425>; 559 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 560 clocks = <&cpg CPG_MOD 926>; 561 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 562 <&dmac1 0x77>, <&dmac1 0x78>; 563 dma-names = "tx", "rx", "tx", "rx"; 564 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 565 resets = <&cpg 926>; 566 status = "disabled"; 567 }; 568 569 hsusb: usb@e6590000 { 570 compatible = "renesas,usbhs-r8a7743", 571 "renesas,rcar-gen2-usbhs"; 572 reg = <0 0xe6590000 0 0x100>; 573 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 574 clocks = <&cpg CPG_MOD 704>; 575 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 576 <&usb_dmac1 0>, <&usb_dmac1 1>; 577 dma-names = "ch0", "ch1", "ch2", "ch3"; 578 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 579 resets = <&cpg 704>; 580 renesas,buswait = <4>; 581 phys = <&usb0 1>; 582 phy-names = "usb"; 583 status = "disabled"; 584 }; 585 586 usbphy: usb-phy@e6590100 { 587 compatible = "renesas,usb-phy-r8a7743", 588 "renesas,rcar-gen2-usb-phy"; 589 reg = <0 0xe6590100 0 0x100>; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 clocks = <&cpg CPG_MOD 704>; 593 clock-names = "usbhs"; 594 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 595 resets = <&cpg 704>; 596 status = "disabled"; 597 598 usb0: usb-channel@0 { 599 reg = <0>; 600 #phy-cells = <1>; 601 }; 602 usb2: usb-channel@2 { 603 reg = <2>; 604 #phy-cells = <1>; 605 }; 606 }; 607 608 usb_dmac0: dma-controller@e65a0000 { 609 compatible = "renesas,r8a7743-usb-dmac", 610 "renesas,usb-dmac"; 611 reg = <0 0xe65a0000 0 0x100>; 612 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 614 interrupt-names = "ch0", "ch1"; 615 clocks = <&cpg CPG_MOD 330>; 616 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 617 resets = <&cpg 330>; 618 #dma-cells = <1>; 619 dma-channels = <2>; 620 }; 621 622 usb_dmac1: dma-controller@e65b0000 { 623 compatible = "renesas,r8a7743-usb-dmac", 624 "renesas,usb-dmac"; 625 reg = <0 0xe65b0000 0 0x100>; 626 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "ch0", "ch1"; 629 clocks = <&cpg CPG_MOD 331>; 630 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 631 resets = <&cpg 331>; 632 #dma-cells = <1>; 633 dma-channels = <2>; 634 }; 635 636 dmac0: dma-controller@e6700000 { 637 compatible = "renesas,dmac-r8a7743", 638 "renesas,rcar-dmac"; 639 reg = <0 0xe6700000 0 0x20000>; 640 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 653 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 654 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 656 interrupt-names = "error", 657 "ch0", "ch1", "ch2", "ch3", 658 "ch4", "ch5", "ch6", "ch7", 659 "ch8", "ch9", "ch10", "ch11", 660 "ch12", "ch13", "ch14"; 661 clocks = <&cpg CPG_MOD 219>; 662 clock-names = "fck"; 663 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 664 resets = <&cpg 219>; 665 #dma-cells = <1>; 666 dma-channels = <15>; 667 }; 668 669 dmac1: dma-controller@e6720000 { 670 compatible = "renesas,dmac-r8a7743", 671 "renesas,rcar-dmac"; 672 reg = <0 0xe6720000 0 0x20000>; 673 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 689 interrupt-names = "error", 690 "ch0", "ch1", "ch2", "ch3", 691 "ch4", "ch5", "ch6", "ch7", 692 "ch8", "ch9", "ch10", "ch11", 693 "ch12", "ch13", "ch14"; 694 clocks = <&cpg CPG_MOD 218>; 695 clock-names = "fck"; 696 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 697 resets = <&cpg 218>; 698 #dma-cells = <1>; 699 dma-channels = <15>; 700 }; 701 702 avb: ethernet@e6800000 { 703 compatible = "renesas,etheravb-r8a7743", 704 "renesas,etheravb-rcar-gen2"; 705 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 706 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 707 clocks = <&cpg CPG_MOD 812>; 708 clock-names = "fck"; 709 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 710 resets = <&cpg 812>; 711 #address-cells = <1>; 712 #size-cells = <0>; 713 status = "disabled"; 714 }; 715 716 qspi: spi@e6b10000 { 717 compatible = "renesas,qspi-r8a7743", "renesas,qspi"; 718 reg = <0 0xe6b10000 0 0x2c>; 719 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&cpg CPG_MOD 917>; 721 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 722 <&dmac1 0x17>, <&dmac1 0x18>; 723 dma-names = "tx", "rx", "tx", "rx"; 724 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 725 num-cs = <1>; 726 #address-cells = <1>; 727 #size-cells = <0>; 728 resets = <&cpg 917>; 729 status = "disabled"; 730 }; 731 732 scifa0: serial@e6c40000 { 733 compatible = "renesas,scifa-r8a7743", 734 "renesas,rcar-gen2-scifa", "renesas,scifa"; 735 reg = <0 0xe6c40000 0 0x40>; 736 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&cpg CPG_MOD 204>; 738 clock-names = "fck"; 739 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 740 <&dmac1 0x21>, <&dmac1 0x22>; 741 dma-names = "tx", "rx", "tx", "rx"; 742 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 743 resets = <&cpg 204>; 744 status = "disabled"; 745 }; 746 747 scifa1: serial@e6c50000 { 748 compatible = "renesas,scifa-r8a7743", 749 "renesas,rcar-gen2-scifa", "renesas,scifa"; 750 reg = <0 0xe6c50000 0 0x40>; 751 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 752 clocks = <&cpg CPG_MOD 203>; 753 clock-names = "fck"; 754 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 755 <&dmac1 0x25>, <&dmac1 0x26>; 756 dma-names = "tx", "rx", "tx", "rx"; 757 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 758 resets = <&cpg 203>; 759 status = "disabled"; 760 }; 761 762 scifa2: serial@e6c60000 { 763 compatible = "renesas,scifa-r8a7743", 764 "renesas,rcar-gen2-scifa", "renesas,scifa"; 765 reg = <0 0xe6c60000 0 0x40>; 766 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&cpg CPG_MOD 202>; 768 clock-names = "fck"; 769 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 770 <&dmac1 0x27>, <&dmac1 0x28>; 771 dma-names = "tx", "rx", "tx", "rx"; 772 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 773 resets = <&cpg 202>; 774 status = "disabled"; 775 }; 776 777 scifa3: serial@e6c70000 { 778 compatible = "renesas,scifa-r8a7743", 779 "renesas,rcar-gen2-scifa", "renesas,scifa"; 780 reg = <0 0xe6c70000 0 0x40>; 781 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 782 clocks = <&cpg CPG_MOD 1106>; 783 clock-names = "fck"; 784 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 785 <&dmac1 0x1b>, <&dmac1 0x1c>; 786 dma-names = "tx", "rx", "tx", "rx"; 787 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 788 resets = <&cpg 1106>; 789 status = "disabled"; 790 }; 791 792 scifa4: serial@e6c78000 { 793 compatible = "renesas,scifa-r8a7743", 794 "renesas,rcar-gen2-scifa", "renesas,scifa"; 795 reg = <0 0xe6c78000 0 0x40>; 796 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 797 clocks = <&cpg CPG_MOD 1107>; 798 clock-names = "fck"; 799 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 800 <&dmac1 0x1f>, <&dmac1 0x20>; 801 dma-names = "tx", "rx", "tx", "rx"; 802 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 803 resets = <&cpg 1107>; 804 status = "disabled"; 805 }; 806 807 scifa5: serial@e6c80000 { 808 compatible = "renesas,scifa-r8a7743", 809 "renesas,rcar-gen2-scifa", "renesas,scifa"; 810 reg = <0 0xe6c80000 0 0x40>; 811 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 812 clocks = <&cpg CPG_MOD 1108>; 813 clock-names = "fck"; 814 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 815 <&dmac1 0x23>, <&dmac1 0x24>; 816 dma-names = "tx", "rx", "tx", "rx"; 817 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 818 resets = <&cpg 1108>; 819 status = "disabled"; 820 }; 821 822 scifb0: serial@e6c20000 { 823 compatible = "renesas,scifb-r8a7743", 824 "renesas,rcar-gen2-scifb", "renesas,scifb"; 825 reg = <0 0xe6c20000 0 0x100>; 826 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 206>; 828 clock-names = "fck"; 829 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 830 <&dmac1 0x3d>, <&dmac1 0x3e>; 831 dma-names = "tx", "rx", "tx", "rx"; 832 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 833 resets = <&cpg 206>; 834 status = "disabled"; 835 }; 836 837 scifb1: serial@e6c30000 { 838 compatible = "renesas,scifb-r8a7743", 839 "renesas,rcar-gen2-scifb", "renesas,scifb"; 840 reg = <0 0xe6c30000 0 0x100>; 841 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 842 clocks = <&cpg CPG_MOD 207>; 843 clock-names = "fck"; 844 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 845 <&dmac1 0x19>, <&dmac1 0x1a>; 846 dma-names = "tx", "rx", "tx", "rx"; 847 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 848 resets = <&cpg 207>; 849 status = "disabled"; 850 }; 851 852 scifb2: serial@e6ce0000 { 853 compatible = "renesas,scifb-r8a7743", 854 "renesas,rcar-gen2-scifb", "renesas,scifb"; 855 reg = <0 0xe6ce0000 0 0x100>; 856 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 857 clocks = <&cpg CPG_MOD 216>; 858 clock-names = "fck"; 859 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 860 <&dmac1 0x1d>, <&dmac1 0x1e>; 861 dma-names = "tx", "rx", "tx", "rx"; 862 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 863 resets = <&cpg 216>; 864 status = "disabled"; 865 }; 866 867 scif0: serial@e6e60000 { 868 compatible = "renesas,scif-r8a7743", 869 "renesas,rcar-gen2-scif", "renesas,scif"; 870 reg = <0 0xe6e60000 0 0x40>; 871 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 872 clocks = <&cpg CPG_MOD 721>, 873 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 874 clock-names = "fck", "brg_int", "scif_clk"; 875 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 876 <&dmac1 0x29>, <&dmac1 0x2a>; 877 dma-names = "tx", "rx", "tx", "rx"; 878 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 879 resets = <&cpg 721>; 880 status = "disabled"; 881 }; 882 883 scif1: serial@e6e68000 { 884 compatible = "renesas,scif-r8a7743", 885 "renesas,rcar-gen2-scif", "renesas,scif"; 886 reg = <0 0xe6e68000 0 0x40>; 887 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 888 clocks = <&cpg CPG_MOD 720>, 889 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 890 clock-names = "fck", "brg_int", "scif_clk"; 891 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 892 <&dmac1 0x2d>, <&dmac1 0x2e>; 893 dma-names = "tx", "rx", "tx", "rx"; 894 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 895 resets = <&cpg 720>; 896 status = "disabled"; 897 }; 898 899 scif2: serial@e6e58000 { 900 compatible = "renesas,scif-r8a7743", 901 "renesas,rcar-gen2-scif", "renesas,scif"; 902 reg = <0 0xe6e58000 0 0x40>; 903 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 904 clocks = <&cpg CPG_MOD 719>, 905 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 906 clock-names = "fck", "brg_int", "scif_clk"; 907 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 908 <&dmac1 0x2b>, <&dmac1 0x2c>; 909 dma-names = "tx", "rx", "tx", "rx"; 910 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 911 resets = <&cpg 719>; 912 status = "disabled"; 913 }; 914 915 scif3: serial@e6ea8000 { 916 compatible = "renesas,scif-r8a7743", 917 "renesas,rcar-gen2-scif", "renesas,scif"; 918 reg = <0 0xe6ea8000 0 0x40>; 919 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 920 clocks = <&cpg CPG_MOD 718>, 921 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 922 clock-names = "fck", "brg_int", "scif_clk"; 923 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 924 <&dmac1 0x2f>, <&dmac1 0x30>; 925 dma-names = "tx", "rx", "tx", "rx"; 926 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 927 resets = <&cpg 718>; 928 status = "disabled"; 929 }; 930 931 scif4: serial@e6ee0000 { 932 compatible = "renesas,scif-r8a7743", 933 "renesas,rcar-gen2-scif", "renesas,scif"; 934 reg = <0 0xe6ee0000 0 0x40>; 935 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 936 clocks = <&cpg CPG_MOD 715>, 937 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 938 clock-names = "fck", "brg_int", "scif_clk"; 939 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 940 <&dmac1 0xfb>, <&dmac1 0xfc>; 941 dma-names = "tx", "rx", "tx", "rx"; 942 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 943 resets = <&cpg 715>; 944 status = "disabled"; 945 }; 946 947 scif5: serial@e6ee8000 { 948 compatible = "renesas,scif-r8a7743", 949 "renesas,rcar-gen2-scif", "renesas,scif"; 950 reg = <0 0xe6ee8000 0 0x40>; 951 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 952 clocks = <&cpg CPG_MOD 714>, 953 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 954 clock-names = "fck", "brg_int", "scif_clk"; 955 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 956 <&dmac1 0xfd>, <&dmac1 0xfe>; 957 dma-names = "tx", "rx", "tx", "rx"; 958 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 959 resets = <&cpg 714>; 960 status = "disabled"; 961 }; 962 963 hscif0: serial@e62c0000 { 964 compatible = "renesas,hscif-r8a7743", 965 "renesas,rcar-gen2-hscif", "renesas,hscif"; 966 reg = <0 0xe62c0000 0 0x60>; 967 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 968 clocks = <&cpg CPG_MOD 717>, 969 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 970 clock-names = "fck", "brg_int", "scif_clk"; 971 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 972 <&dmac1 0x39>, <&dmac1 0x3a>; 973 dma-names = "tx", "rx", "tx", "rx"; 974 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 975 resets = <&cpg 717>; 976 status = "disabled"; 977 }; 978 979 hscif1: serial@e62c8000 { 980 compatible = "renesas,hscif-r8a7743", 981 "renesas,rcar-gen2-hscif", "renesas,hscif"; 982 reg = <0 0xe62c8000 0 0x60>; 983 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 984 clocks = <&cpg CPG_MOD 716>, 985 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 986 clock-names = "fck", "brg_int", "scif_clk"; 987 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 988 <&dmac1 0x4d>, <&dmac1 0x4e>; 989 dma-names = "tx", "rx", "tx", "rx"; 990 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 991 resets = <&cpg 716>; 992 status = "disabled"; 993 }; 994 995 hscif2: serial@e62d0000 { 996 compatible = "renesas,hscif-r8a7743", 997 "renesas,rcar-gen2-hscif", "renesas,hscif"; 998 reg = <0 0xe62d0000 0 0x60>; 999 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1000 clocks = <&cpg CPG_MOD 713>, 1001 <&cpg CPG_CORE R8A7743_CLK_ZS>, <&scif_clk>; 1002 clock-names = "fck", "brg_int", "scif_clk"; 1003 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1004 <&dmac1 0x3b>, <&dmac1 0x3c>; 1005 dma-names = "tx", "rx", "tx", "rx"; 1006 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1007 resets = <&cpg 713>; 1008 status = "disabled"; 1009 }; 1010 1011 msiof0: spi@e6e20000 { 1012 compatible = "renesas,msiof-r8a7743", 1013 "renesas,rcar-gen2-msiof"; 1014 reg = <0 0xe6e20000 0 0x0064>; 1015 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1016 clocks = <&cpg CPG_MOD 000>; 1017 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1018 <&dmac1 0x51>, <&dmac1 0x52>; 1019 dma-names = "tx", "rx", "tx", "rx"; 1020 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1021 #address-cells = <1>; 1022 #size-cells = <0>; 1023 resets = <&cpg 000>; 1024 status = "disabled"; 1025 }; 1026 1027 msiof1: spi@e6e10000 { 1028 compatible = "renesas,msiof-r8a7743", 1029 "renesas,rcar-gen2-msiof"; 1030 reg = <0 0xe6e10000 0 0x0064>; 1031 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1032 clocks = <&cpg CPG_MOD 208>; 1033 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1034 <&dmac1 0x55>, <&dmac1 0x56>; 1035 dma-names = "tx", "rx", "tx", "rx"; 1036 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1037 #address-cells = <1>; 1038 #size-cells = <0>; 1039 resets = <&cpg 208>; 1040 status = "disabled"; 1041 }; 1042 1043 msiof2: spi@e6e00000 { 1044 compatible = "renesas,msiof-r8a7743", 1045 "renesas,rcar-gen2-msiof"; 1046 reg = <0 0xe6e00000 0 0x0064>; 1047 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1048 clocks = <&cpg CPG_MOD 205>; 1049 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1050 <&dmac1 0x41>, <&dmac1 0x42>; 1051 dma-names = "tx", "rx", "tx", "rx"; 1052 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1053 #address-cells = <1>; 1054 #size-cells = <0>; 1055 resets = <&cpg 205>; 1056 status = "disabled"; 1057 }; 1058 1059 pwm0: pwm@e6e30000 { 1060 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1061 reg = <0 0xe6e30000 0 0x8>; 1062 clocks = <&cpg CPG_MOD 523>; 1063 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1064 resets = <&cpg 523>; 1065 #pwm-cells = <2>; 1066 status = "disabled"; 1067 }; 1068 1069 pwm1: pwm@e6e31000 { 1070 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1071 reg = <0 0xe6e31000 0 0x8>; 1072 clocks = <&cpg CPG_MOD 523>; 1073 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1074 resets = <&cpg 523>; 1075 #pwm-cells = <2>; 1076 status = "disabled"; 1077 }; 1078 1079 pwm2: pwm@e6e32000 { 1080 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1081 reg = <0 0xe6e32000 0 0x8>; 1082 clocks = <&cpg CPG_MOD 523>; 1083 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1084 resets = <&cpg 523>; 1085 #pwm-cells = <2>; 1086 status = "disabled"; 1087 }; 1088 1089 pwm3: pwm@e6e33000 { 1090 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1091 reg = <0 0xe6e33000 0 0x8>; 1092 clocks = <&cpg CPG_MOD 523>; 1093 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1094 resets = <&cpg 523>; 1095 #pwm-cells = <2>; 1096 status = "disabled"; 1097 }; 1098 1099 pwm4: pwm@e6e34000 { 1100 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1101 reg = <0 0xe6e34000 0 0x8>; 1102 clocks = <&cpg CPG_MOD 523>; 1103 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1104 resets = <&cpg 523>; 1105 #pwm-cells = <2>; 1106 status = "disabled"; 1107 }; 1108 1109 pwm5: pwm@e6e35000 { 1110 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1111 reg = <0 0xe6e35000 0 0x8>; 1112 clocks = <&cpg CPG_MOD 523>; 1113 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1114 resets = <&cpg 523>; 1115 #pwm-cells = <2>; 1116 status = "disabled"; 1117 }; 1118 1119 pwm6: pwm@e6e36000 { 1120 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 1121 reg = <0 0xe6e36000 0 0x8>; 1122 clocks = <&cpg CPG_MOD 523>; 1123 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1124 resets = <&cpg 523>; 1125 #pwm-cells = <2>; 1126 status = "disabled"; 1127 }; 1128 1129 can0: can@e6e80000 { 1130 compatible = "renesas,can-r8a7743", 1131 "renesas,rcar-gen2-can"; 1132 reg = <0 0xe6e80000 0 0x1000>; 1133 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1134 clocks = <&cpg CPG_MOD 916>, 1135 <&cpg CPG_CORE R8A7743_CLK_RCAN>, 1136 <&can_clk>; 1137 clock-names = "clkp1", "clkp2", "can_clk"; 1138 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1139 resets = <&cpg 916>; 1140 status = "disabled"; 1141 }; 1142 1143 can1: can@e6e88000 { 1144 compatible = "renesas,can-r8a7743", 1145 "renesas,rcar-gen2-can"; 1146 reg = <0 0xe6e88000 0 0x1000>; 1147 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1148 clocks = <&cpg CPG_MOD 915>, 1149 <&cpg CPG_CORE R8A7743_CLK_RCAN>, 1150 <&can_clk>; 1151 clock-names = "clkp1", "clkp2", "can_clk"; 1152 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1153 resets = <&cpg 915>; 1154 status = "disabled"; 1155 }; 1156 1157 vin0: video@e6ef0000 { 1158 compatible = "renesas,vin-r8a7743", 1159 "renesas,rcar-gen2-vin"; 1160 reg = <0 0xe6ef0000 0 0x1000>; 1161 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 811>; 1163 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1164 resets = <&cpg 811>; 1165 status = "disabled"; 1166 }; 1167 1168 vin1: video@e6ef1000 { 1169 compatible = "renesas,vin-r8a7743", 1170 "renesas,rcar-gen2-vin"; 1171 reg = <0 0xe6ef1000 0 0x1000>; 1172 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1173 clocks = <&cpg CPG_MOD 810>; 1174 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1175 resets = <&cpg 810>; 1176 status = "disabled"; 1177 }; 1178 1179 vin2: video@e6ef2000 { 1180 compatible = "renesas,vin-r8a7743", 1181 "renesas,rcar-gen2-vin"; 1182 reg = <0 0xe6ef2000 0 0x1000>; 1183 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1184 clocks = <&cpg CPG_MOD 809>; 1185 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1186 resets = <&cpg 809>; 1187 status = "disabled"; 1188 }; 1189 1190 rcar_sound: sound@ec500000 { 1191 /* 1192 * #sound-dai-cells is required 1193 * 1194 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1195 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1196 */ 1197 compatible = "renesas,rcar_sound-r8a7743", 1198 "renesas,rcar_sound-gen2"; 1199 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1200 <0 0xec5a0000 0 0x100>, /* ADG */ 1201 <0 0xec540000 0 0x1000>, /* SSIU */ 1202 <0 0xec541000 0 0x280>, /* SSI */ 1203 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1204 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1205 1206 clocks = <&cpg CPG_MOD 1005>, 1207 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1208 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1209 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1210 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1211 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1212 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1213 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1214 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1215 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1216 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1217 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1218 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1219 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1220 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1221 <&cpg CPG_CORE R8A7743_CLK_M2>; 1222 clock-names = "ssi-all", 1223 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1224 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", 1225 "src.9", "src.8", "src.7", "src.6", "src.5", 1226 "src.4", "src.3", "src.2", "src.1", "src.0", 1227 "ctu.0", "ctu.1", 1228 "mix.0", "mix.1", 1229 "dvc.0", "dvc.1", 1230 "clk_a", "clk_b", "clk_c", "clk_i"; 1231 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1232 resets = <&cpg 1005>, 1233 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, 1234 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, 1235 <&cpg 1014>, <&cpg 1015>; 1236 reset-names = "ssi-all", 1237 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1238 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; 1239 status = "disabled"; 1240 1241 rcar_sound,dvc { 1242 dvc0: dvc-0 { 1243 dmas = <&audma1 0xbc>; 1244 dma-names = "tx"; 1245 }; 1246 dvc1: dvc-1 { 1247 dmas = <&audma1 0xbe>; 1248 dma-names = "tx"; 1249 }; 1250 }; 1251 1252 rcar_sound,mix { 1253 mix0: mix-0 { }; 1254 mix1: mix-1 { }; 1255 }; 1256 1257 rcar_sound,ctu { 1258 ctu00: ctu-0 { }; 1259 ctu01: ctu-1 { }; 1260 ctu02: ctu-2 { }; 1261 ctu03: ctu-3 { }; 1262 ctu10: ctu-4 { }; 1263 ctu11: ctu-5 { }; 1264 ctu12: ctu-6 { }; 1265 ctu13: ctu-7 { }; 1266 }; 1267 1268 rcar_sound,src { 1269 src0: src-0 { 1270 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1271 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1272 dma-names = "rx", "tx"; 1273 }; 1274 src1: src-1 { 1275 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1276 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1277 dma-names = "rx", "tx"; 1278 }; 1279 src2: src-2 { 1280 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1281 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1282 dma-names = "rx", "tx"; 1283 }; 1284 src3: src-3 { 1285 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1286 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1287 dma-names = "rx", "tx"; 1288 }; 1289 src4: src-4 { 1290 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1291 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1292 dma-names = "rx", "tx"; 1293 }; 1294 src5: src-5 { 1295 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1296 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1297 dma-names = "rx", "tx"; 1298 }; 1299 src6: src-6 { 1300 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1301 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1302 dma-names = "rx", "tx"; 1303 }; 1304 src7: src-7 { 1305 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1306 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1307 dma-names = "rx", "tx"; 1308 }; 1309 src8: src-8 { 1310 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1311 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1312 dma-names = "rx", "tx"; 1313 }; 1314 src9: src-9 { 1315 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1316 dmas = <&audma0 0x97>, <&audma1 0xba>; 1317 dma-names = "rx", "tx"; 1318 }; 1319 }; 1320 1321 rcar_sound,ssi { 1322 ssi0: ssi-0 { 1323 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1324 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1325 dma-names = "rx", "tx", "rxu", "txu"; 1326 }; 1327 ssi1: ssi-1 { 1328 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1329 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1330 dma-names = "rx", "tx", "rxu", "txu"; 1331 }; 1332 ssi2: ssi-2 { 1333 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1334 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1335 dma-names = "rx", "tx", "rxu", "txu"; 1336 }; 1337 ssi3: ssi-3 { 1338 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1339 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1340 dma-names = "rx", "tx", "rxu", "txu"; 1341 }; 1342 ssi4: ssi-4 { 1343 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1344 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1345 dma-names = "rx", "tx", "rxu", "txu"; 1346 }; 1347 ssi5: ssi-5 { 1348 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1349 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1350 dma-names = "rx", "tx", "rxu", "txu"; 1351 }; 1352 ssi6: ssi-6 { 1353 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1354 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1355 dma-names = "rx", "tx", "rxu", "txu"; 1356 }; 1357 ssi7: ssi-7 { 1358 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1359 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1360 dma-names = "rx", "tx", "rxu", "txu"; 1361 }; 1362 ssi8: ssi-8 { 1363 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1364 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1365 dma-names = "rx", "tx", "rxu", "txu"; 1366 }; 1367 ssi9: ssi-9 { 1368 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1369 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1370 dma-names = "rx", "tx", "rxu", "txu"; 1371 }; 1372 }; 1373 }; 1374 1375 audma0: dma-controller@ec700000 { 1376 compatible = "renesas,dmac-r8a7743", 1377 "renesas,rcar-dmac"; 1378 reg = <0 0xec700000 0 0x10000>; 1379 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1380 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1381 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1382 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1383 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1384 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1385 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1386 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1387 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1388 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1389 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1390 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1391 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1392 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1393 interrupt-names = "error", 1394 "ch0", "ch1", "ch2", "ch3", 1395 "ch4", "ch5", "ch6", "ch7", 1396 "ch8", "ch9", "ch10", "ch11", 1397 "ch12"; 1398 clocks = <&cpg CPG_MOD 502>; 1399 clock-names = "fck"; 1400 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1401 resets = <&cpg 502>; 1402 #dma-cells = <1>; 1403 dma-channels = <13>; 1404 }; 1405 1406 audma1: dma-controller@ec720000 { 1407 compatible = "renesas,dmac-r8a7743", 1408 "renesas,rcar-dmac"; 1409 reg = <0 0xec720000 0 0x10000>; 1410 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1411 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1412 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1413 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1414 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1415 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1416 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1417 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1418 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1419 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1420 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1421 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1422 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1423 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1424 interrupt-names = "error", 1425 "ch0", "ch1", "ch2", "ch3", 1426 "ch4", "ch5", "ch6", "ch7", 1427 "ch8", "ch9", "ch10", "ch11", 1428 "ch12"; 1429 clocks = <&cpg CPG_MOD 501>; 1430 clock-names = "fck"; 1431 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1432 resets = <&cpg 501>; 1433 #dma-cells = <1>; 1434 dma-channels = <13>; 1435 }; 1436 1437 /* 1438 * pci1 and xhci share the same phy, therefore only one of them 1439 * can be active at any one time. If both of them are enabled, 1440 * a race condition will determine who'll control the phy. 1441 * A firmware file is needed by the xhci driver in order for 1442 * USB 3.0 to work properly. 1443 */ 1444 xhci: usb@ee000000 { 1445 compatible = "renesas,xhci-r8a7743", 1446 "renesas,rcar-gen2-xhci"; 1447 reg = <0 0xee000000 0 0xc00>; 1448 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1449 clocks = <&cpg CPG_MOD 328>; 1450 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1451 resets = <&cpg 328>; 1452 phys = <&usb2 1>; 1453 phy-names = "usb"; 1454 status = "disabled"; 1455 }; 1456 1457 pci0: pci@ee090000 { 1458 compatible = "renesas,pci-r8a7743", 1459 "renesas,pci-rcar-gen2"; 1460 device_type = "pci"; 1461 reg = <0 0xee090000 0 0xc00>, 1462 <0 0xee080000 0 0x1100>; 1463 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 703>; 1465 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1466 resets = <&cpg 703>; 1467 status = "disabled"; 1468 1469 bus-range = <0 0>; 1470 #address-cells = <3>; 1471 #size-cells = <2>; 1472 #interrupt-cells = <1>; 1473 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1474 interrupt-map-mask = <0xf800 0 0 0x7>; 1475 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1476 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1477 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1478 1479 usb@1,0 { 1480 reg = <0x800 0 0 0 0>; 1481 phys = <&usb0 0>; 1482 phy-names = "usb"; 1483 }; 1484 1485 usb@2,0 { 1486 reg = <0x1000 0 0 0 0>; 1487 phys = <&usb0 0>; 1488 phy-names = "usb"; 1489 }; 1490 }; 1491 1492 pci1: pci@ee0d0000 { 1493 compatible = "renesas,pci-r8a7743", 1494 "renesas,pci-rcar-gen2"; 1495 device_type = "pci"; 1496 reg = <0 0xee0d0000 0 0xc00>, 1497 <0 0xee0c0000 0 0x1100>; 1498 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1499 clocks = <&cpg CPG_MOD 703>; 1500 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1501 resets = <&cpg 703>; 1502 status = "disabled"; 1503 1504 bus-range = <1 1>; 1505 #address-cells = <3>; 1506 #size-cells = <2>; 1507 #interrupt-cells = <1>; 1508 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1509 interrupt-map-mask = <0xf800 0 0 0x7>; 1510 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1511 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1512 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1513 1514 usb@1,0 { 1515 reg = <0x10800 0 0 0 0>; 1516 phys = <&usb2 0>; 1517 phy-names = "usb"; 1518 }; 1519 1520 usb@2,0 { 1521 reg = <0x11000 0 0 0 0>; 1522 phys = <&usb2 0>; 1523 phy-names = "usb"; 1524 }; 1525 }; 1526 1527 sdhi0: mmc@ee100000 { 1528 compatible = "renesas,sdhi-r8a7743", 1529 "renesas,rcar-gen2-sdhi"; 1530 reg = <0 0xee100000 0 0x328>; 1531 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 314>; 1533 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1534 <&dmac1 0xcd>, <&dmac1 0xce>; 1535 dma-names = "tx", "rx", "tx", "rx"; 1536 max-frequency = <195000000>; 1537 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1538 resets = <&cpg 314>; 1539 status = "disabled"; 1540 }; 1541 1542 sdhi1: mmc@ee140000 { 1543 compatible = "renesas,sdhi-r8a7743", 1544 "renesas,rcar-gen2-sdhi"; 1545 reg = <0 0xee140000 0 0x100>; 1546 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1547 clocks = <&cpg CPG_MOD 312>; 1548 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1549 <&dmac1 0xc1>, <&dmac1 0xc2>; 1550 dma-names = "tx", "rx", "tx", "rx"; 1551 max-frequency = <97500000>; 1552 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1553 resets = <&cpg 312>; 1554 status = "disabled"; 1555 }; 1556 1557 sdhi2: mmc@ee160000 { 1558 compatible = "renesas,sdhi-r8a7743", 1559 "renesas,rcar-gen2-sdhi"; 1560 reg = <0 0xee160000 0 0x100>; 1561 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 311>; 1563 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1564 <&dmac1 0xd3>, <&dmac1 0xd4>; 1565 dma-names = "tx", "rx", "tx", "rx"; 1566 max-frequency = <97500000>; 1567 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1568 resets = <&cpg 311>; 1569 status = "disabled"; 1570 }; 1571 1572 mmcif0: mmc@ee200000 { 1573 compatible = "renesas,mmcif-r8a7743", 1574 "renesas,sh-mmcif"; 1575 reg = <0 0xee200000 0 0x80>; 1576 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1577 clocks = <&cpg CPG_MOD 315>; 1578 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1579 <&dmac1 0xd1>, <&dmac1 0xd2>; 1580 dma-names = "tx", "rx", "tx", "rx"; 1581 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1582 resets = <&cpg 315>; 1583 reg-io-width = <4>; 1584 max-frequency = <97500000>; 1585 status = "disabled"; 1586 }; 1587 1588 ether: ethernet@ee700000 { 1589 compatible = "renesas,ether-r8a7743", 1590 "renesas,rcar-gen2-ether"; 1591 reg = <0 0xee700000 0 0x400>; 1592 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1593 clocks = <&cpg CPG_MOD 813>; 1594 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1595 resets = <&cpg 813>; 1596 phy-mode = "rmii"; 1597 #address-cells = <1>; 1598 #size-cells = <0>; 1599 status = "disabled"; 1600 }; 1601 1602 gic: interrupt-controller@f1001000 { 1603 compatible = "arm,gic-400"; 1604 #interrupt-cells = <3>; 1605 #address-cells = <0>; 1606 interrupt-controller; 1607 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1608 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1609 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1610 clocks = <&cpg CPG_MOD 408>; 1611 clock-names = "clk"; 1612 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1613 resets = <&cpg 408>; 1614 }; 1615 1616 pciec: pcie@fe000000 { 1617 compatible = "renesas,pcie-r8a7743", 1618 "renesas,pcie-rcar-gen2"; 1619 reg = <0 0xfe000000 0 0x80000>; 1620 #address-cells = <3>; 1621 #size-cells = <2>; 1622 bus-range = <0x00 0xff>; 1623 device_type = "pci"; 1624 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1625 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1626 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1627 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1628 /* Map all possible DDR as inbound ranges */ 1629 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1630 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1631 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1633 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1634 #interrupt-cells = <1>; 1635 interrupt-map-mask = <0 0 0 0>; 1636 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1638 clock-names = "pcie", "pcie_bus"; 1639 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1640 resets = <&cpg 319>; 1641 status = "disabled"; 1642 }; 1643 1644 vsp@fe928000 { 1645 compatible = "renesas,vsp1"; 1646 reg = <0 0xfe928000 0 0x8000>; 1647 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1648 clocks = <&cpg CPG_MOD 131>; 1649 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1650 resets = <&cpg 131>; 1651 }; 1652 1653 vsp@fe930000 { 1654 compatible = "renesas,vsp1"; 1655 reg = <0 0xfe930000 0 0x8000>; 1656 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1657 clocks = <&cpg CPG_MOD 128>; 1658 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1659 resets = <&cpg 128>; 1660 }; 1661 1662 vsp@fe938000 { 1663 compatible = "renesas,vsp1"; 1664 reg = <0 0xfe938000 0 0x8000>; 1665 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1666 clocks = <&cpg CPG_MOD 127>; 1667 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1668 resets = <&cpg 127>; 1669 }; 1670 1671 du: display@feb00000 { 1672 compatible = "renesas,du-r8a7743"; 1673 reg = <0 0xfeb00000 0 0x40000>; 1674 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1675 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1676 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1677 clock-names = "du.0", "du.1"; 1678 resets = <&cpg 724>; 1679 reset-names = "du.0"; 1680 status = "disabled"; 1681 1682 ports { 1683 #address-cells = <1>; 1684 #size-cells = <0>; 1685 1686 port@0 { 1687 reg = <0>; 1688 du_out_rgb: endpoint { 1689 }; 1690 }; 1691 port@1 { 1692 reg = <1>; 1693 du_out_lvds0: endpoint { 1694 remote-endpoint = <&lvds0_in>; 1695 }; 1696 }; 1697 }; 1698 }; 1699 1700 lvds0: lvds@feb90000 { 1701 compatible = "renesas,r8a7743-lvds"; 1702 reg = <0 0xfeb90000 0 0x1c>; 1703 clocks = <&cpg CPG_MOD 726>; 1704 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1705 resets = <&cpg 726>; 1706 status = "disabled"; 1707 1708 ports { 1709 #address-cells = <1>; 1710 #size-cells = <0>; 1711 1712 port@0 { 1713 reg = <0>; 1714 lvds0_in: endpoint { 1715 remote-endpoint = <&du_out_lvds0>; 1716 }; 1717 }; 1718 port@1 { 1719 reg = <1>; 1720 lvds0_out: endpoint { 1721 }; 1722 }; 1723 }; 1724 }; 1725 1726 prr: chipid@ff000044 { 1727 compatible = "renesas,prr"; 1728 reg = <0 0xff000044 0 4>; 1729 }; 1730 1731 cmt0: timer@ffca0000 { 1732 compatible = "renesas,r8a7743-cmt0", 1733 "renesas,rcar-gen2-cmt0"; 1734 reg = <0 0xffca0000 0 0x1004>; 1735 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1736 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1737 clocks = <&cpg CPG_MOD 124>; 1738 clock-names = "fck"; 1739 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1740 resets = <&cpg 124>; 1741 status = "disabled"; 1742 }; 1743 1744 cmt1: timer@e6130000 { 1745 compatible = "renesas,r8a7743-cmt1", 1746 "renesas,rcar-gen2-cmt1"; 1747 reg = <0 0xe6130000 0 0x1004>; 1748 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1749 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1750 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1751 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1752 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1753 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1754 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1755 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1756 clocks = <&cpg CPG_MOD 329>; 1757 clock-names = "fck"; 1758 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1759 resets = <&cpg 329>; 1760 status = "disabled"; 1761 }; 1762 }; 1763 1764 thermal-zones { 1765 cpu_thermal: cpu-thermal { 1766 polling-delay-passive = <0>; 1767 polling-delay = <0>; 1768 1769 thermal-sensors = <&thermal>; 1770 1771 trips { 1772 cpu-crit { 1773 temperature = <95000>; 1774 hysteresis = <0>; 1775 type = "critical"; 1776 }; 1777 }; 1778 1779 cooling-maps { 1780 }; 1781 }; 1782 }; 1783 1784 timer { 1785 compatible = "arm,armv7-timer"; 1786 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1787 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1788 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1789 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1790 }; 1791 1792 /* External USB clock - can be overridden by the board */ 1793 usb_extal_clk: usb_extal { 1794 compatible = "fixed-clock"; 1795 #clock-cells = <0>; 1796 clock-frequency = <48000000>; 1797 }; 1798}; 1799