1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2016 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 4 */ 5 6#include "socfpga_cyclone5.dtsi" 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9 10/ { 11 model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board"; 12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga"; 13 14 chosen { 15 bootargs = "earlyprintk"; 16 stdout-path = "serial0:115200n8"; 17 }; 18 19 memory@0 { 20 name = "memory"; 21 device_type = "memory"; 22 reg = <0x0 0x40000000>; 23 }; 24 25 aliases { 26 ethernet0 = &gmac1; 27 }; 28 29 regulator_3_3v: 3-3-v-regulator { 30 compatible = "regulator-fixed"; 31 regulator-name = "3.3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 }; 35 36 leds: gpio-leds { 37 compatible = "gpio-leds"; 38 39 hps_led0 { 40 label = "hps:green:led0"; 41 gpios = <&portb 12 GPIO_ACTIVE_LOW>; 42 }; 43 44 hps_led1 { 45 label = "hps:green:led1"; 46 gpios = <&portb 13 GPIO_ACTIVE_LOW>; 47 }; 48 49 hps_led2 { 50 label = "hps:green:led2"; 51 gpios = <&portb 14 GPIO_ACTIVE_LOW>; 52 }; 53 54 hps_led3 { 55 label = "hps:green:led3"; 56 gpios = <&portb 15 GPIO_ACTIVE_LOW>; 57 }; 58 }; 59}; 60 61&gmac1 { 62 status = "okay"; 63 phy-mode = "rgmii"; 64 phy = <&phy0>; 65 66 mdio0 { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 phy0: ethernet-phy@0 { 70 reg = <0>; 71 rxd0-skew-ps = <0>; 72 rxd1-skew-ps = <0>; 73 rxd2-skew-ps = <0>; 74 rxd3-skew-ps = <0>; 75 rxdv-skew-ps = <0>; 76 rxc-skew-ps = <3000>; 77 txen-skew-ps = <0>; 78 txc-skew-ps = <3000>; 79 }; 80 }; 81}; 82 83&gpio1 { 84 status = "okay"; 85}; 86 87&i2c0 { 88 status = "okay"; 89 90 eeprom@51 { 91 compatible = "atmel,24c32"; 92 reg = <0x51>; 93 pagesize = <32>; 94 }; 95 96 rtc@68 { 97 compatible = "dallas,ds1339"; 98 reg = <0x68>; 99 }; 100}; 101 102&mmc0 { 103 cd-gpios = <&portb 18 0>; 104 vmmc-supply = <®ulator_3_3v>; 105 vqmmc-supply = <®ulator_3_3v>; 106 status = "okay"; 107}; 108 109&usb1 { 110 status = "okay"; 111}; 112 113&qspi { 114 status = "okay"; 115 116 flash0: n25q512a@0 { 117 #address-cells = <1>; 118 #size-cells = <1>; 119 compatible = "micron,n25q512a", "jedec,spi-nor"; 120 reg = <0>; 121 spi-max-frequency = <100000000>; 122 123 m25p,fast-read; 124 cdns,page-size = <256>; 125 cdns,block-size = <16>; 126 cdns,read-delay = <4>; 127 cdns,tshsl-ns = <50>; 128 cdns,tsd2d-ns = <50>; 129 cdns,tchsh-ns = <4>; 130 cdns,tslch-ns = <4>; 131 }; 132}; 133