1 /*
2 * OMAP15xx specific gpio init
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
5 *
6 * Author:
7 * Charulatha V <charu@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
12 *
13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14 * kind, whether express or implied; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include <linux/gpio.h>
20 #include <linux/platform_data/gpio-omap.h>
21
22 #include <mach/irqs.h>
23
24 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
25 #define OMAP1510_GPIO_BASE 0xFFFCE000
26
27 /* gpio1 */
28 static struct resource omap15xx_mpu_gpio_resources[] = {
29 {
30 .start = OMAP1_MPUIO_VBASE,
31 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
32 .flags = IORESOURCE_MEM,
33 },
34 {
35 .start = INT_MPUIO,
36 .flags = IORESOURCE_IRQ,
37 },
38 };
39
40 static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
41 .revision = USHRT_MAX,
42 .direction = OMAP_MPUIO_IO_CNTL,
43 .datain = OMAP_MPUIO_INPUT_LATCH,
44 .dataout = OMAP_MPUIO_OUTPUT,
45 .irqstatus = OMAP_MPUIO_GPIO_INT,
46 .irqenable = OMAP_MPUIO_GPIO_MASKIT,
47 .irqenable_inv = true,
48 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
49 };
50
51 static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
52 .is_mpuio = true,
53 .bank_width = 16,
54 .bank_stride = 1,
55 .regs = &omap15xx_mpuio_regs,
56 };
57
58 static struct platform_device omap15xx_mpu_gpio = {
59 .name = "omap_gpio",
60 .id = 0,
61 .dev = {
62 .platform_data = &omap15xx_mpu_gpio_config,
63 },
64 .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
65 .resource = omap15xx_mpu_gpio_resources,
66 };
67
68 /* gpio2 */
69 static struct resource omap15xx_gpio_resources[] = {
70 {
71 .start = OMAP1510_GPIO_BASE,
72 .end = OMAP1510_GPIO_BASE + SZ_2K - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 {
76 .start = INT_GPIO_BANK1,
77 .flags = IORESOURCE_IRQ,
78 },
79 };
80
81 static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
82 .revision = USHRT_MAX,
83 .direction = OMAP1510_GPIO_DIR_CONTROL,
84 .datain = OMAP1510_GPIO_DATA_INPUT,
85 .dataout = OMAP1510_GPIO_DATA_OUTPUT,
86 .irqstatus = OMAP1510_GPIO_INT_STATUS,
87 .irqenable = OMAP1510_GPIO_INT_MASK,
88 .irqenable_inv = true,
89 .irqctrl = OMAP1510_GPIO_INT_CONTROL,
90 .pinctrl = OMAP1510_GPIO_PIN_CONTROL,
91 };
92
93 static struct omap_gpio_platform_data omap15xx_gpio_config = {
94 .bank_width = 16,
95 .regs = &omap15xx_gpio_regs,
96 };
97
98 static struct platform_device omap15xx_gpio = {
99 .name = "omap_gpio",
100 .id = 1,
101 .dev = {
102 .platform_data = &omap15xx_gpio_config,
103 },
104 .num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
105 .resource = omap15xx_gpio_resources,
106 };
107
108 /*
109 * omap15xx_gpio_init needs to be done before
110 * machine_init functions access gpio APIs.
111 * Hence omap15xx_gpio_init is a postcore_initcall.
112 */
omap15xx_gpio_init(void)113 static int __init omap15xx_gpio_init(void)
114 {
115 if (!cpu_is_omap15xx())
116 return -EINVAL;
117
118 platform_device_register(&omap15xx_mpu_gpio);
119 platform_device_register(&omap15xx_gpio);
120
121 return 0;
122 }
123 postcore_initcall(omap15xx_gpio_init);
124