1 /*
2 * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
3 *
4 * Marvell Orion-VoIP GE Reference Design Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10 #include <linux/gpio.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/pci.h>
15 #include <linux/irq.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/mv643xx_eth.h>
18 #include <linux/ethtool.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_data/dsa.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/pci.h>
24 #include "common.h"
25 #include "mpp.h"
26 #include "orion5x.h"
27
28 /*****************************************************************************
29 * RD-88F5181L GE Info
30 ****************************************************************************/
31 /*
32 * 16M NOR flash Device bus boot chip select
33 */
34 #define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
35 #define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
36
37
38 /*****************************************************************************
39 * 16M NOR Flash on Device bus Boot chip select
40 ****************************************************************************/
41 static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
42 .width = 1,
43 };
44
45 static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
46 .flags = IORESOURCE_MEM,
47 .start = RD88F5181L_GE_NOR_BOOT_BASE,
48 .end = RD88F5181L_GE_NOR_BOOT_BASE +
49 RD88F5181L_GE_NOR_BOOT_SIZE - 1,
50 };
51
52 static struct platform_device rd88f5181l_ge_nor_boot_flash = {
53 .name = "physmap-flash",
54 .id = 0,
55 .dev = {
56 .platform_data = &rd88f5181l_ge_nor_boot_flash_data,
57 },
58 .num_resources = 1,
59 .resource = &rd88f5181l_ge_nor_boot_flash_resource,
60 };
61
62
63 /*****************************************************************************
64 * General Setup
65 ****************************************************************************/
66 static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
67 MPP0_GPIO, /* LED1 */
68 MPP1_GPIO, /* LED5 */
69 MPP2_GPIO, /* LED4 */
70 MPP3_GPIO, /* LED3 */
71 MPP4_GPIO, /* PCI_intA */
72 MPP5_GPIO, /* RTC interrupt */
73 MPP6_PCI_CLK, /* CPU PCI refclk */
74 MPP7_PCI_CLK, /* PCI/PCIe refclk */
75 MPP8_GPIO, /* 88e6131 interrupt */
76 MPP9_GPIO, /* GE_RXERR */
77 MPP10_GPIO, /* PCI_intB */
78 MPP11_GPIO, /* LED2 */
79 MPP12_GIGE, /* GE_TXD[4] */
80 MPP13_GIGE, /* GE_TXD[5] */
81 MPP14_GIGE, /* GE_TXD[6] */
82 MPP15_GIGE, /* GE_TXD[7] */
83 MPP16_GIGE, /* GE_RXD[4] */
84 MPP17_GIGE, /* GE_RXD[5] */
85 MPP18_GIGE, /* GE_RXD[6] */
86 MPP19_GIGE, /* GE_RXD[7] */
87 0,
88 };
89
90 static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
91 .phy_addr = MV643XX_ETH_PHY_NONE,
92 .speed = SPEED_1000,
93 .duplex = DUPLEX_FULL,
94 };
95
96 static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
97 .port_names[0] = "lan2",
98 .port_names[1] = "lan1",
99 .port_names[2] = "wan",
100 .port_names[3] = "cpu",
101 .port_names[5] = "lan4",
102 .port_names[7] = "lan3",
103 };
104
105 static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
106 I2C_BOARD_INFO("ds1338", 0x68),
107 };
108
rd88f5181l_ge_init(void)109 static void __init rd88f5181l_ge_init(void)
110 {
111 /*
112 * Setup basic Orion functions. Need to be called early.
113 */
114 orion5x_init();
115
116 orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
117
118 /*
119 * Configure peripherals.
120 */
121 orion5x_ehci0_init();
122 orion5x_eth_init(&rd88f5181l_ge_eth_data);
123 orion5x_eth_switch_init(&rd88f5181l_ge_switch_chip_data);
124 orion5x_i2c_init();
125 orion5x_uart0_init();
126
127 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
128 ORION_MBUS_DEVBUS_BOOT_ATTR,
129 RD88F5181L_GE_NOR_BOOT_BASE,
130 RD88F5181L_GE_NOR_BOOT_SIZE);
131 platform_device_register(&rd88f5181l_ge_nor_boot_flash);
132
133 i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
134 }
135
136 static int __init
rd88f5181l_ge_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)137 rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
138 {
139 int irq;
140
141 /*
142 * Check for devices with hard-wired IRQs.
143 */
144 irq = orion5x_pci_map_irq(dev, slot, pin);
145 if (irq != -1)
146 return irq;
147
148 /*
149 * Cardbus slot.
150 */
151 if (pin == 1)
152 return gpio_to_irq(4);
153 else
154 return gpio_to_irq(10);
155 }
156
157 static struct hw_pci rd88f5181l_ge_pci __initdata = {
158 .nr_controllers = 2,
159 .setup = orion5x_pci_sys_setup,
160 .scan = orion5x_pci_sys_scan_bus,
161 .map_irq = rd88f5181l_ge_pci_map_irq,
162 };
163
rd88f5181l_ge_pci_init(void)164 static int __init rd88f5181l_ge_pci_init(void)
165 {
166 if (machine_is_rd88f5181l_ge()) {
167 orion5x_pci_set_cardbus_mode();
168 pci_common_init(&rd88f5181l_ge_pci);
169 }
170
171 return 0;
172 }
173 subsys_initcall(rd88f5181l_ge_pci_init);
174
175 MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
176 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
177 .atag_offset = 0x100,
178 .nr_irqs = ORION5X_NR_IRQS,
179 .init_machine = rd88f5181l_ge_init,
180 .map_io = orion5x_map_io,
181 .init_early = orion5x_init_early,
182 .init_irq = orion5x_init_irq,
183 .init_time = orion5x_timer_init,
184 .fixup = tag_fixup_mem32,
185 .restart = orion5x_restart,
186 MACHINE_END
187