1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2L SMARC EVK common parts
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/*
12 * SSI-WM8978
13 *
14 * This command is required when Playback/Capture
15 *
16 *	amixer cset name='Left Input Mixer L2 Switch' on
17 *	amixer cset name='Right Input Mixer R2 Switch' on
18 *	amixer cset name='Headphone Playback Volume' 100
19 *	amixer cset name='PCM Volume' 100%
20 *	amixer cset name='Input PGA Volume' 25
21 *
22 */
23
24/ {
25	aliases {
26		serial0 = &scif0;
27		i2c0 = &i2c0;
28		i2c1 = &i2c1;
29		i2c3 = &i2c3;
30	};
31
32	chosen {
33		stdout-path = "serial0:115200n8";
34	};
35
36	audio_mclock: audio_mclock {
37		compatible = "fixed-clock";
38		#clock-cells = <0>;
39		clock-frequency = <11289600>;
40	};
41
42	snd_rzg2l: sound {
43		compatible = "simple-audio-card";
44		simple-audio-card,format = "i2s";
45		simple-audio-card,bitclock-master = <&cpu_dai>;
46		simple-audio-card,frame-master = <&cpu_dai>;
47		simple-audio-card,mclk-fs = <256>;
48
49		simple-audio-card,widgets = "Microphone", "Microphone Jack";
50		simple-audio-card,routing =
51			    "L2", "Mic Bias",
52			    "R2", "Mic Bias",
53			    "Mic Bias", "Microphone Jack";
54
55		cpu_dai: simple-audio-card,cpu {
56			sound-dai = <&ssi0>;
57		};
58
59		codec_dai: simple-audio-card,codec {
60			clocks = <&audio_mclock>;
61			sound-dai = <&wm8978>;
62		};
63	};
64
65	usb0_vbus_otg: regulator-usb0-vbus-otg {
66		compatible = "regulator-fixed";
67
68		regulator-name = "USB0_VBUS_OTG";
69		regulator-min-microvolt = <5000000>;
70		regulator-max-microvolt = <5000000>;
71	};
72
73	vccq_sdhi1: regulator-vccq-sdhi1 {
74		compatible = "regulator-gpio";
75		regulator-name = "SDHI1 VccQ";
76		regulator-min-microvolt = <1800000>;
77		regulator-max-microvolt = <3300000>;
78		gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;
79		gpios-states = <1>;
80		states = <3300000 1>, <1800000 0>;
81	};
82};
83
84&audio_clk1{
85	clock-frequency = <11289600>;
86};
87
88&audio_clk2{
89	clock-frequency = <12288000>;
90};
91
92&canfd {
93	pinctrl-0 = <&can0_pins &can1_pins>;
94	pinctrl-names = "default";
95	status = "okay";
96
97	channel0 {
98		status = "okay";
99	};
100
101	channel1 {
102		status = "okay";
103	};
104};
105
106&ehci0 {
107	dr_mode = "otg";
108	status = "okay";
109};
110
111&ehci1 {
112	status = "okay";
113};
114
115&hsusb {
116	dr_mode = "otg";
117	status = "okay";
118};
119
120&i2c0 {
121	pinctrl-0 = <&i2c0_pins>;
122	pinctrl-names = "default";
123
124	status = "okay";
125};
126
127&i2c1 {
128	pinctrl-0 = <&i2c1_pins>;
129	pinctrl-names = "default";
130
131	status = "okay";
132};
133
134&i2c3 {
135	pinctrl-0 = <&i2c3_pins>;
136	pinctrl-names = "default";
137	clock-frequency = <400000>;
138
139	status = "okay";
140
141	wm8978: codec@1a {
142		compatible = "wlf,wm8978";
143		#sound-dai-cells = <0>;
144		reg = <0x1a>;
145	};
146};
147
148&ohci0 {
149	dr_mode = "otg";
150	status = "okay";
151};
152
153&ohci1 {
154	status = "okay";
155};
156
157&phyrst {
158	status = "okay";
159};
160
161&pinctrl {
162	pinctrl-0 = <&sound_clk_pins>;
163	pinctrl-names = "default";
164
165	can0_pins: can0 {
166		pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
167			 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
168	};
169
170	/* SW7 should be at position 2->3 so that GPIO8_CAN0_STB line is activated */
171	can0-stb {
172		gpio-hog;
173		gpios = <RZG2L_GPIO(42, 2) GPIO_ACTIVE_HIGH>;
174		output-low;
175		line-name = "can0_stb";
176	};
177
178	can1_pins: can1 {
179		pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
180			 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
181	};
182
183	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
184	can1-stb {
185		gpio-hog;
186		gpios = <RZG2L_GPIO(42, 3) GPIO_ACTIVE_HIGH>;
187		output-low;
188		line-name = "can1_stb";
189	};
190
191	i2c0_pins: i2c0 {
192		pins = "RIIC0_SDA", "RIIC0_SCL";
193		input-enable;
194	};
195
196	i2c1_pins: i2c1 {
197		pins = "RIIC1_SDA", "RIIC1_SCL";
198		input-enable;
199	};
200
201	i2c3_pins: i2c3 {
202		pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
203			 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
204	};
205
206	scif0_pins: scif0 {
207		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
208			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
209	};
210
211	sd1-pwr-en-hog {
212		gpio-hog;
213		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
214		output-high;
215		line-name = "sd1_pwr_en";
216	};
217
218	sdhi1_pins: sd1 {
219		sd1_data {
220			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
221			power-source = <3300>;
222		};
223
224		sd1_ctrl {
225			pins = "SD1_CLK", "SD1_CMD";
226			power-source = <3300>;
227		};
228
229		sd1_mux {
230			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
231		};
232	};
233
234	sdhi1_pins_uhs: sd1_uhs {
235		sd1_data_uhs {
236			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
237			power-source = <1800>;
238		};
239
240		sd1_ctrl_uhs {
241			pins = "SD1_CLK", "SD1_CMD";
242			power-source = <1800>;
243		};
244
245		sd1_mux_uhs {
246			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
247		};
248	};
249
250	sound_clk_pins: sound_clk {
251		pins = "AUDIO_CLK1", "AUDIO_CLK2";
252		input-enable;
253	};
254
255	ssi0_pins: ssi0 {
256		pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
257			 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
258			 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
259			 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
260	};
261
262	usb0_pins: usb0 {
263		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
264			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
265			 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
266	};
267
268	usb1_pins: usb1 {
269		pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
270			 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
271	};
272};
273
274&scif0 {
275	pinctrl-0 = <&scif0_pins>;
276	pinctrl-names = "default";
277	status = "okay";
278};
279
280&sdhi1 {
281	pinctrl-0 = <&sdhi1_pins>;
282	pinctrl-1 = <&sdhi1_pins_uhs>;
283	pinctrl-names = "default", "state_uhs";
284
285	vmmc-supply = <&reg_3p3v>;
286	vqmmc-supply = <&vccq_sdhi1>;
287	bus-width = <4>;
288	sd-uhs-sdr50;
289	sd-uhs-sdr104;
290	status = "okay";
291};
292
293&ssi0 {
294	pinctrl-0 = <&ssi0_pins>;
295	pinctrl-names = "default";
296
297	status = "okay";
298};
299
300&usb2_phy0 {
301	pinctrl-0 = <&usb0_pins>;
302	pinctrl-names = "default";
303
304	vbus-supply = <&usb0_vbus_otg>;
305	status = "okay";
306};
307
308&usb2_phy1 {
309	pinctrl-0 = <&usb1_pins>;
310	pinctrl-names = "default";
311
312	status = "okay";
313};
314