1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com> 4 */ 5 6/dts-v1/; 7#include <dt-bindings/input/linux-event-codes.h> 8#include <dt-bindings/pwm/pwm.h> 9#include "rk3399.dtsi" 10#include "rk3399-opp.dtsi" 11 12/ { 13 model = "Leez RK3399 P710"; 14 compatible = "leez,p710", "rockchip,rk3399"; 15 16 aliases { 17 mmc0 = &sdio0; 18 mmc1 = &sdmmc; 19 mmc2 = &sdhci; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 clkin_gmac: external-gmac-clock { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; 29 clock-output-names = "clkin_gmac"; 30 #clock-cells = <0>; 31 }; 32 33 sdio_pwrseq: sdio-pwrseq { 34 compatible = "mmc-pwrseq-simple"; 35 clocks = <&rk808 1>; 36 clock-names = "ext_clock"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&wifi_reg_on_h>; 39 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 40 }; 41 42 dc5v_adp: dc5v-adp { 43 compatible = "regulator-fixed"; 44 regulator-name = "dc5v_adapter"; 45 regulator-always-on; 46 regulator-boot-on; 47 regulator-min-microvolt = <5000000>; 48 regulator-max-microvolt = <5000000>; 49 }; 50 51 vcc3v3_lan: vcc3v3-lan { 52 compatible = "regulator-fixed"; 53 regulator-name = "vcc3v3_lan"; 54 regulator-always-on; 55 regulator-boot-on; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 vin-supply = <&vcc3v3_sys>; 59 }; 60 61 vcc3v3_sys: vcc3v3-sys { 62 compatible = "regulator-fixed"; 63 regulator-name = "vcc3v3_sys"; 64 regulator-always-on; 65 regulator-boot-on; 66 regulator-min-microvolt = <3300000>; 67 regulator-max-microvolt = <3300000>; 68 vin-supply = <&vcc5v0_sys>; 69 }; 70 71 vcc5v0_host0: vcc5v0_host1: vcc5v0-host { 72 compatible = "regulator-fixed"; 73 regulator-name = "vcc5v0_host"; 74 regulator-boot-on; 75 regulator-always-on; 76 regulator-min-microvolt = <5500000>; 77 regulator-max-microvolt = <5500000>; 78 vin-supply = <&vcc5v0_sys>; 79 }; 80 81 vcc5v0_host3: vcc5v0-host3 { 82 compatible = "regulator-fixed"; 83 regulator-name = "vcc5v0_host3"; 84 enable-active-high; 85 gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&vcc5v0_host3_en>; 88 regulator-always-on; 89 vin-supply = <&vcc5v0_sys>; 90 }; 91 92 vcc5v0_sys: vcc5v0-sys { 93 compatible = "regulator-fixed"; 94 regulator-name = "vcc5v0_sys"; 95 regulator-always-on; 96 regulator-boot-on; 97 regulator-min-microvolt = <5000000>; 98 regulator-max-microvolt = <5000000>; 99 vin-supply = <&dc5v_adp>; 100 }; 101 102 vdd_log: vdd-log { 103 compatible = "pwm-regulator"; 104 pwms = <&pwm2 0 25000 1>; 105 regulator-name = "vdd_log"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-min-microvolt = <800000>; 109 regulator-max-microvolt = <1400000>; 110 vin-supply = <&vcc5v0_sys>; 111 }; 112}; 113 114&cpu_l0 { 115 cpu-supply = <&vdd_cpu_l>; 116}; 117 118&cpu_l1 { 119 cpu-supply = <&vdd_cpu_l>; 120}; 121 122&cpu_l2 { 123 cpu-supply = <&vdd_cpu_l>; 124}; 125 126&cpu_l3 { 127 cpu-supply = <&vdd_cpu_l>; 128}; 129 130&cpu_b0 { 131 cpu-supply = <&vdd_cpu_b>; 132}; 133 134&cpu_b1 { 135 cpu-supply = <&vdd_cpu_b>; 136}; 137 138&emmc_phy { 139 status = "okay"; 140}; 141 142&gmac { 143 assigned-clocks = <&cru SCLK_RMII_SRC>; 144 assigned-clock-parents = <&clkin_gmac>; 145 clock_in_out = "input"; 146 phy-supply = <&vcc3v3_lan>; 147 phy-mode = "rgmii"; 148 pinctrl-names = "default"; 149 pinctrl-0 = <&rgmii_pins>; 150 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 151 snps,reset-active-low; 152 snps,reset-delays-us = <0 10000 50000>; 153 tx_delay = <0x28>; 154 rx_delay = <0x11>; 155 status = "okay"; 156}; 157 158&gpu { 159 mali-supply = <&vdd_gpu>; 160 status = "okay"; 161}; 162 163&hdmi { 164 ddc-i2c-bus = <&i2c7>; 165 pinctrl-names = "default"; 166 pinctrl-0 = <&hdmi_cec>; 167 status = "okay"; 168}; 169 170&hdmi_sound { 171 status = "okay"; 172}; 173 174&i2c0 { 175 clock-frequency = <400000>; 176 i2c-scl-rising-time-ns = <168>; 177 i2c-scl-falling-time-ns = <4>; 178 status = "okay"; 179 180 rk808: pmic@1b { 181 compatible = "rockchip,rk808"; 182 reg = <0x1b>; 183 interrupt-parent = <&gpio1>; 184 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 185 #clock-cells = <1>; 186 clock-output-names = "xin32k", "rk808-clkout2"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pmic_int_l>; 189 rockchip,system-power-controller; 190 wakeup-source; 191 192 vcc1-supply = <&vcc5v0_sys>; 193 vcc2-supply = <&vcc5v0_sys>; 194 vcc3-supply = <&vcc5v0_sys>; 195 vcc4-supply = <&vcc5v0_sys>; 196 vcc6-supply = <&vcc5v0_sys>; 197 vcc7-supply = <&vcc5v0_sys>; 198 vcc8-supply = <&vcc3v3_sys>; 199 vcc9-supply = <&vcc5v0_sys>; 200 vcc10-supply = <&vcc5v0_sys>; 201 vcc11-supply = <&vcc5v0_sys>; 202 vcc12-supply = <&vcc3v3_sys>; 203 vddio-supply = <&vcc_1v8>; 204 205 regulators { 206 vdd_center: DCDC_REG1 { 207 regulator-name = "vdd_center"; 208 regulator-always-on; 209 regulator-boot-on; 210 regulator-min-microvolt = <750000>; 211 regulator-max-microvolt = <1350000>; 212 regulator-ramp-delay = <6001>; 213 regulator-state-mem { 214 regulator-off-in-suspend; 215 }; 216 }; 217 218 vdd_cpu_l: DCDC_REG2 { 219 regulator-name = "vdd_cpu_l"; 220 regulator-always-on; 221 regulator-boot-on; 222 regulator-min-microvolt = <750000>; 223 regulator-max-microvolt = <1350000>; 224 regulator-ramp-delay = <6001>; 225 regulator-state-mem { 226 regulator-off-in-suspend; 227 }; 228 }; 229 230 vcc_ddr: DCDC_REG3 { 231 regulator-name = "vcc_ddr"; 232 regulator-always-on; 233 regulator-boot-on; 234 regulator-state-mem { 235 regulator-on-in-suspend; 236 }; 237 }; 238 239 vcc_1v8: DCDC_REG4 { 240 regulator-name = "vcc_1v8"; 241 regulator-always-on; 242 regulator-boot-on; 243 regulator-min-microvolt = <1800000>; 244 regulator-max-microvolt = <1800000>; 245 regulator-state-mem { 246 regulator-on-in-suspend; 247 regulator-suspend-microvolt = <1800000>; 248 }; 249 }; 250 251 vcc1v8_dvp: LDO_REG1 { 252 regulator-name = "vcc1v8_dvp"; 253 regulator-always-on; 254 regulator-boot-on; 255 regulator-min-microvolt = <1800000>; 256 regulator-max-microvolt = <1800000>; 257 regulator-state-mem { 258 regulator-off-in-suspend; 259 }; 260 }; 261 262 vcc1v8_hdmi: LDO_REG2 { 263 regulator-name = "vcc1v8_hdmi"; 264 regulator-always-on; 265 regulator-boot-on; 266 regulator-min-microvolt = <1800000>; 267 regulator-max-microvolt = <1800000>; 268 regulator-state-mem { 269 regulator-off-in-suspend; 270 }; 271 }; 272 273 vcca_1v8: LDO_REG3 { 274 regulator-name = "vcca_1v8"; 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-min-microvolt = <1800000>; 278 regulator-max-microvolt = <1800000>; 279 regulator-state-mem { 280 regulator-on-in-suspend; 281 regulator-suspend-microvolt = <1800000>; 282 }; 283 }; 284 285 vccio_sd: LDO_REG4 { 286 regulator-name = "vccio_sd"; 287 regulator-always-on; 288 regulator-boot-on; 289 regulator-min-microvolt = <3000000>; 290 regulator-max-microvolt = <3000000>; 291 regulator-state-mem { 292 regulator-on-in-suspend; 293 regulator-suspend-microvolt = <3000000>; 294 }; 295 }; 296 297 vcca3v0_codec: LDO_REG5 { 298 regulator-name = "vcca3v0_codec"; 299 regulator-always-on; 300 regulator-boot-on; 301 regulator-min-microvolt = <3000000>; 302 regulator-max-microvolt = <3000000>; 303 regulator-state-mem { 304 regulator-off-in-suspend; 305 }; 306 }; 307 308 vcc_1v5: LDO_REG6 { 309 regulator-name = "vcc_1v5"; 310 regulator-always-on; 311 regulator-boot-on; 312 regulator-min-microvolt = <1500000>; 313 regulator-max-microvolt = <1500000>; 314 regulator-state-mem { 315 regulator-on-in-suspend; 316 regulator-suspend-microvolt = <1500000>; 317 }; 318 }; 319 320 vcc0v9_hdmi: LDO_REG7 { 321 regulator-name = "vcc0v9_hdmi"; 322 regulator-always-on; 323 regulator-boot-on; 324 regulator-min-microvolt = <900000>; 325 regulator-max-microvolt = <900000>; 326 regulator-state-mem { 327 regulator-off-in-suspend; 328 }; 329 }; 330 331 vcc_3v0: LDO_REG8 { 332 regulator-name = "vcc_3v0"; 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-min-microvolt = <3000000>; 336 regulator-max-microvolt = <3000000>; 337 regulator-state-mem { 338 regulator-on-in-suspend; 339 regulator-suspend-microvolt = <3000000>; 340 }; 341 }; 342 }; 343 }; 344 345 vdd_cpu_b: regulator@40 { 346 compatible = "silergy,syr827"; 347 reg = <0x40>; 348 fcs,suspend-voltage-selector = <1>; 349 pinctrl-names = "default"; 350 pinctrl-0 = <&vsel1_pin>; 351 regulator-name = "vdd_cpu_b"; 352 regulator-min-microvolt = <712500>; 353 regulator-max-microvolt = <1500000>; 354 regulator-ramp-delay = <1000>; 355 regulator-always-on; 356 regulator-boot-on; 357 vin-supply = <&vcc5v0_sys>; 358 359 regulator-state-mem { 360 regulator-off-in-suspend; 361 }; 362 }; 363 364 vdd_gpu: regulator@41 { 365 compatible = "silergy,syr828"; 366 reg = <0x41>; 367 fcs,suspend-voltage-selector = <1>; 368 pinctrl-names = "default"; 369 pinctrl-0 = <&vsel2_pin>; 370 regulator-name = "vdd_gpu"; 371 regulator-min-microvolt = <712500>; 372 regulator-max-microvolt = <1500000>; 373 regulator-ramp-delay = <1000>; 374 regulator-always-on; 375 regulator-boot-on; 376 vin-supply = <&vcc5v0_sys>; 377 378 regulator-state-mem { 379 regulator-off-in-suspend; 380 }; 381 }; 382}; 383 384&i2c1 { 385 i2c-scl-rising-time-ns = <300>; 386 i2c-scl-falling-time-ns = <15>; 387 status = "okay"; 388}; 389 390&i2c3 { 391 i2c-scl-rising-time-ns = <450>; 392 i2c-scl-falling-time-ns = <15>; 393 status = "okay"; 394}; 395 396&i2c4 { 397 i2c-scl-rising-time-ns = <600>; 398 i2c-scl-falling-time-ns = <20>; 399 status = "okay"; 400}; 401 402&i2c7 { 403 status = "okay"; 404}; 405 406&i2s0 { 407 rockchip,playback-channels = <8>; 408 rockchip,capture-channels = <8>; 409 status = "okay"; 410}; 411 412&i2s1 { 413 rockchip,playback-channels = <2>; 414 rockchip,capture-channels = <2>; 415 status = "okay"; 416}; 417 418&i2s2 { 419 status = "okay"; 420}; 421 422&io_domains { 423 status = "okay"; 424 425 bt656-supply = <&vcc1v8_dvp>; 426 audio-supply = <&vcc_1v8>; 427 sdmmc-supply = <&vccio_sd>; 428 gpio1830-supply = <&vcc_3v0>; 429}; 430 431&pmu_io_domains { 432 status = "okay"; 433 pmu1830-supply = <&vcc_3v0>; 434}; 435 436&pinctrl { 437 bt { 438 bt_reg_on_h: bt-reg-on-h { 439 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 440 }; 441 442 bt_host_wake_l: bt-host-wake-l { 443 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 444 }; 445 446 bt_wake_l: bt-wake-l { 447 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 448 }; 449 }; 450 451 pmic { 452 pmic_int_l: pmic-int-l { 453 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 454 }; 455 456 vsel1_pin: vsel1-pin { 457 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 458 }; 459 460 vsel2_pin: vsel2-pin { 461 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 462 }; 463 }; 464 465 usb2 { 466 vcc5v0_host3_en: vcc5v0-host3-en { 467 rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 468 }; 469 }; 470 471 wifi { 472 wifi_reg_on_h: wifi-reg-on-h { 473 rockchip,pins = 474 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 475 }; 476 477 wifi_host_wake_l: wifi-host-wake-l { 478 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 479 }; 480 }; 481}; 482 483&pwm2 { 484 status = "okay"; 485}; 486 487&saradc { 488 status = "okay"; 489 490 vref-supply = <&vcc_1v8>; 491}; 492 493&sdio0 { 494 #address-cells = <1>; 495 #size-cells = <0>; 496 bus-width = <4>; 497 clock-frequency = <50000000>; 498 cap-sdio-irq; 499 cap-sd-highspeed; 500 keep-power-in-suspend; 501 mmc-pwrseq = <&sdio_pwrseq>; 502 non-removable; 503 pinctrl-names = "default"; 504 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 505 sd-uhs-sdr104; 506 status = "okay"; 507 508 brcmf: wifi@1 { 509 compatible = "brcm,bcm4329-fmac"; 510 reg = <1>; 511 interrupt-parent = <&gpio0>; 512 interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; 513 interrupt-names = "host-wake"; 514 pinctrl-names = "default"; 515 pinctrl-0 = <&wifi_host_wake_l>; 516 }; 517}; 518 519&sdhci { 520 bus-width = <8>; 521 mmc-hs400-1_8v; 522 mmc-hs400-enhanced-strobe; 523 non-removable; 524 status = "okay"; 525}; 526 527&sdmmc { 528 bus-width = <4>; 529 cap-mmc-highspeed; 530 cap-sd-highspeed; 531 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 532 disable-wp; 533 max-frequency = <150000000>; 534 pinctrl-names = "default"; 535 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 536 status = "okay"; 537}; 538 539&tcphy0 { 540 status = "okay"; 541}; 542 543&tcphy1 { 544 status = "okay"; 545}; 546 547&tsadc { 548 status = "okay"; 549 550 /* tshut mode 0:CRU 1:GPIO */ 551 rockchip,hw-tshut-mode = <1>; 552 /* tshut polarity 0:LOW 1:HIGH */ 553 rockchip,hw-tshut-polarity = <1>; 554}; 555 556&u2phy0 { 557 status = "okay"; 558 559 u2phy0_otg: otg-port { 560 status = "okay"; 561 }; 562 563 u2phy0_host: host-port { 564 phy-supply = <&vcc5v0_host0>; 565 status = "okay"; 566 }; 567}; 568 569&u2phy1 { 570 status = "okay"; 571 572 u2phy1_otg: otg-port { 573 status = "okay"; 574 }; 575 576 u2phy1_host: host-port { 577 phy-supply = <&vcc5v0_host1>; 578 status = "okay"; 579 }; 580}; 581 582&uart0 { 583 pinctrl-names = "default"; 584 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 585 status = "okay"; 586 587 bluetooth { 588 compatible = "brcm,bcm43438-bt"; 589 clocks = <&rk808 1>; 590 clock-names = "ext_clock"; 591 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 592 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 593 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>; 596 }; 597}; 598 599&uart2 { 600 status = "okay"; 601}; 602 603&usb_host0_ehci { 604 status = "okay"; 605}; 606 607&usb_host0_ohci { 608 status = "okay"; 609}; 610 611&usb_host1_ehci { 612 status = "okay"; 613}; 614 615&usb_host1_ohci { 616 status = "okay"; 617}; 618 619&usbdrd3_0 { 620 status = "okay"; 621}; 622 623&usbdrd_dwc3_0 { 624 status = "okay"; 625 dr_mode = "otg"; 626}; 627 628&usbdrd3_1 { 629 status = "okay"; 630}; 631 632&usbdrd_dwc3_1 { 633 status = "okay"; 634 dr_mode = "host"; 635}; 636 637&vopb { 638 status = "okay"; 639}; 640 641&vopb_mmu { 642 status = "okay"; 643}; 644 645&vopl { 646 status = "okay"; 647}; 648 649&vopl_mmu { 650 status = "okay"; 651}; 652