1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4/memreserve/ 0x00000000 0x00001000;	// reserved
5/memreserve/ 0x00001000 0x000ef000;	// ROM data
6/memreserve/ 0x000f0000 0x004cc000;	// reserved
7
8#include <dt-bindings/interrupt-controller/mips-gic.h>
9
10/ {
11	#address-cells = <1>;
12	#size-cells = <1>;
13	compatible = "mti,sead-3";
14	model = "MIPS SEAD-3";
15
16	chosen {
17		stdout-path = "serial1:115200";
18	};
19
20	aliases {
21		serial0 = &uart0;
22		serial1 = &uart1;
23	};
24
25	cpus {
26		cpu@0 {
27			compatible = "mti,mips14KEc", "mti,mips14Kc";
28		};
29	};
30
31	memory {
32		device_type = "memory";
33		reg = <0x0 0x08000000>;
34	};
35
36	cpu_intc: interrupt-controller {
37		compatible = "mti,cpu-interrupt-controller";
38
39		interrupt-controller;
40		#interrupt-cells = <1>;
41	};
42
43	gic: interrupt-controller@1b1c0000 {
44		compatible = "mti,gic";
45		reg = <0x1b1c0000 0x20000>;
46
47		interrupt-controller;
48		#interrupt-cells = <3>;
49
50		/*
51		 * Declare the interrupt-parent even though the mti,gic
52		 * binding doesn't require it, such that the kernel can
53		 * figure out that cpu_intc is the root interrupt
54		 * controller & should be probed first.
55		 */
56		interrupt-parent = <&cpu_intc>;
57	};
58
59	usb@1b200000 {
60		compatible = "generic-ehci";
61		reg = <0x1b200000 0x1000>;
62
63		interrupt-parent = <&gic>;
64		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
65
66		has-transaction-translator;
67	};
68
69	flash@1c000000 {
70		compatible = "intel,28f128j3", "cfi-flash";
71		reg = <0x1c000000 0x2000000>;
72		#address-cells = <1>;
73		#size-cells = <1>;
74		bank-width = <4>;
75
76		partitions {
77			compatible = "fixed-partitions";
78			#address-cells = <1>;
79			#size-cells = <1>;
80
81			user-fs@0 {
82				label = "User FS";
83				reg = <0x0 0x1fc0000>;
84			};
85
86			board-config@3e0000 {
87				label = "Board Config";
88				reg = <0x1fc0000 0x40000>;
89			};
90		};
91	};
92
93	fpga_regs: system-controller@1f000000 {
94		compatible = "mti,sead3-fpga", "syscon", "simple-mfd";
95		reg = <0x1f000000 0x200>;
96
97		reboot {
98			compatible = "syscon-reboot";
99			regmap = <&fpga_regs>;
100			offset = <0x50>;
101			mask = <0x4d>;
102		};
103
104		poweroff {
105			compatible = "restart-poweroff";
106		};
107	};
108
109	system-controller@1f000200 {
110		compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
111		reg = <0x1f000200 0x300>;
112
113		led@10.0 {
114			compatible = "register-bit-led";
115			offset = <0x10>;
116			mask = <0x1>;
117			label = "pled0";
118		};
119		led@10.1 {
120			compatible = "register-bit-led";
121			offset = <0x10>;
122			mask = <0x2>;
123			label = "pled1";
124		};
125		led@10.2 {
126			compatible = "register-bit-led";
127			offset = <0x10>;
128			mask = <0x4>;
129			label = "pled2";
130		};
131		led@10.3 {
132			compatible = "register-bit-led";
133			offset = <0x10>;
134			mask = <0x8>;
135			label = "pled3";
136		};
137		led@10.4 {
138			compatible = "register-bit-led";
139			offset = <0x10>;
140			mask = <0x10>;
141			label = "pled4";
142		};
143		led@10.5 {
144			compatible = "register-bit-led";
145			offset = <0x10>;
146			mask = <0x20>;
147			label = "pled5";
148		};
149		led@10.6 {
150			compatible = "register-bit-led";
151			offset = <0x10>;
152			mask = <0x40>;
153			label = "pled6";
154		};
155		led@10.7 {
156			compatible = "register-bit-led";
157			offset = <0x10>;
158			mask = <0x80>;
159			label = "pled7";
160		};
161
162		led@18.0 {
163			compatible = "register-bit-led";
164			offset = <0x18>;
165			mask = <0x1>;
166			label = "fled0";
167		};
168		led@18.1 {
169			compatible = "register-bit-led";
170			offset = <0x18>;
171			mask = <0x2>;
172			label = "fled1";
173		};
174		led@18.2 {
175			compatible = "register-bit-led";
176			offset = <0x18>;
177			mask = <0x4>;
178			label = "fled2";
179		};
180		led@18.3 {
181			compatible = "register-bit-led";
182			offset = <0x18>;
183			mask = <0x8>;
184			label = "fled3";
185		};
186		led@18.4 {
187			compatible = "register-bit-led";
188			offset = <0x18>;
189			mask = <0x10>;
190			label = "fled4";
191		};
192		led@18.5 {
193			compatible = "register-bit-led";
194			offset = <0x18>;
195			mask = <0x20>;
196			label = "fled5";
197		};
198		led@18.6 {
199			compatible = "register-bit-led";
200			offset = <0x18>;
201			mask = <0x40>;
202			label = "fled6";
203		};
204		led@18.7 {
205			compatible = "register-bit-led";
206			offset = <0x18>;
207			mask = <0x80>;
208			label = "fled7";
209		};
210
211		lcd@200 {
212			compatible = "mti,sead3-lcd";
213			offset = <0x200>;
214		};
215	};
216
217	/* UART connected to FTDI & miniUSB socket */
218	uart0: uart@1f000900 {
219		compatible = "ns16550a";
220		reg = <0x1f000900 0x20>;
221		reg-io-width = <4>;
222		reg-shift = <2>;
223
224		clock-frequency = <14745600>;
225
226		interrupt-parent = <&gic>;
227		interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; /* GIC 3 or CPU 4 */
228
229		no-loopback-test;
230	};
231
232	/* UART connected to RS232 socket */
233	uart1: uart@1f000800 {
234		compatible = "ns16550a";
235		reg = <0x1f000800 0x20>;
236		reg-io-width = <4>;
237		reg-shift = <2>;
238
239		clock-frequency = <14745600>;
240
241		interrupt-parent = <&gic>;
242		interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; /* GIC 2 or CPU 4 */
243
244		no-loopback-test;
245	};
246
247	ethernet@1f010000 {
248		compatible = "smsc,lan9115";
249		reg = <0x1f010000 0x10000>;
250		reg-io-width = <4>;
251
252		interrupt-parent = <&gic>;
253		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
254
255		phy-mode = "mii";
256		smsc,irq-push-pull;
257		smsc,save-mac-address;
258	};
259};
260