1/* 2 * Device Tree Source for AMCC Kilauea (405EX) 3 * 4 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> 5 * 6 * This file is licensed under the terms of the GNU General Public 7 * License version 2. This program is licensed "as is" without 8 * any warranty of any kind, whether express or implied. 9 */ 10 11/dts-v1/; 12 13/ { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "amcc,kilauea"; 17 compatible = "amcc,kilauea"; 18 dcr-parent = <&{/cpus/cpu@0}>; 19 20 aliases { 21 ethernet0 = &EMAC0; 22 ethernet1 = &EMAC1; 23 serial0 = &UART0; 24 serial1 = &UART1; 25 }; 26 27 cpus { 28 #address-cells = <1>; 29 #size-cells = <0>; 30 31 cpu@0 { 32 device_type = "cpu"; 33 model = "PowerPC,405EX"; 34 reg = <0x00000000>; 35 clock-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */ 37 i-cache-line-size = <32>; 38 d-cache-line-size = <32>; 39 i-cache-size = <16384>; /* 16 kB */ 40 d-cache-size = <16384>; /* 16 kB */ 41 dcr-controller; 42 dcr-access-method = "native"; 43 }; 44 }; 45 46 memory { 47 device_type = "memory"; 48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ 49 }; 50 51 UIC0: interrupt-controller { 52 compatible = "ibm,uic-405ex", "ibm,uic"; 53 interrupt-controller; 54 cell-index = <0>; 55 dcr-reg = <0x0c0 0x009>; 56 #address-cells = <0>; 57 #size-cells = <0>; 58 #interrupt-cells = <2>; 59 }; 60 61 UIC1: interrupt-controller1 { 62 compatible = "ibm,uic-405ex","ibm,uic"; 63 interrupt-controller; 64 cell-index = <1>; 65 dcr-reg = <0x0d0 0x009>; 66 #address-cells = <0>; 67 #size-cells = <0>; 68 #interrupt-cells = <2>; 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 70 interrupt-parent = <&UIC0>; 71 }; 72 73 UIC2: interrupt-controller2 { 74 compatible = "ibm,uic-405ex","ibm,uic"; 75 interrupt-controller; 76 cell-index = <2>; 77 dcr-reg = <0x0e0 0x009>; 78 #address-cells = <0>; 79 #size-cells = <0>; 80 #interrupt-cells = <2>; 81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ 82 interrupt-parent = <&UIC0>; 83 }; 84 85 CPM0: cpm { 86 compatible = "ibm,cpm"; 87 dcr-access-method = "native"; 88 dcr-reg = <0x0b0 0x003>; 89 unused-units = <0x00000000>; 90 idle-doze = <0x02000000>; 91 standby = <0xe3e74800>; 92 }; 93 94 plb { 95 compatible = "ibm,plb-405ex", "ibm,plb4"; 96 #address-cells = <1>; 97 #size-cells = <1>; 98 ranges; 99 clock-frequency = <0>; /* Filled in by U-Boot */ 100 101 SDRAM0: memory-controller { 102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 103 dcr-reg = <0x010 0x002>; 104 interrupt-parent = <&UIC2>; 105 interrupts = <0x5 0x4 /* ECC DED Error */ 106 0x6 0x4>; /* ECC SEC Error */ 107 }; 108 109 CRYPTO: crypto@ef700000 { 110 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; 111 reg = <0xef700000 0x80400>; 112 interrupt-parent = <&UIC0>; 113 interrupts = <0x17 0x2>; 114 }; 115 116 MAL0: mcmal { 117 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 118 dcr-reg = <0x180 0x062>; 119 num-tx-chans = <2>; 120 num-rx-chans = <2>; 121 interrupt-parent = <&MAL0>; 122 interrupts = <0x0 0x1 0x2 0x3 0x4>; 123 #interrupt-cells = <1>; 124 #address-cells = <0>; 125 #size-cells = <0>; 126 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 127 /*RXEOB*/ 0x1 &UIC0 0xb 0x4 128 /*SERR*/ 0x2 &UIC1 0x0 0x4 129 /*TXDE*/ 0x3 &UIC1 0x1 0x4 130 /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 131 interrupt-map-mask = <0xffffffff>; 132 }; 133 134 POB0: opb { 135 compatible = "ibm,opb-405ex", "ibm,opb"; 136 #address-cells = <1>; 137 #size-cells = <1>; 138 ranges = <0x80000000 0x80000000 0x10000000 139 0xef600000 0xef600000 0x00a00000 140 0xf0000000 0xf0000000 0x10000000>; 141 dcr-reg = <0x0a0 0x005>; 142 clock-frequency = <0>; /* Filled in by U-Boot */ 143 144 EBC0: ebc { 145 compatible = "ibm,ebc-405ex", "ibm,ebc"; 146 dcr-reg = <0x012 0x002>; 147 #address-cells = <2>; 148 #size-cells = <1>; 149 clock-frequency = <0>; /* Filled in by U-Boot */ 150 /* ranges property is supplied by U-Boot */ 151 interrupts = <0x5 0x1>; 152 interrupt-parent = <&UIC1>; 153 154 nor_flash@0,0 { 155 compatible = "amd,s29gl512n", "cfi-flash"; 156 bank-width = <2>; 157 reg = <0x00000000 0x00000000 0x04000000>; 158 #address-cells = <1>; 159 #size-cells = <1>; 160 partition@0 { 161 label = "kernel"; 162 reg = <0x00000000 0x001e0000>; 163 }; 164 partition@1e0000 { 165 label = "dtb"; 166 reg = <0x001e0000 0x00020000>; 167 }; 168 partition@200000 { 169 label = "root"; 170 reg = <0x00200000 0x00200000>; 171 }; 172 partition@400000 { 173 label = "user"; 174 reg = <0x00400000 0x03b60000>; 175 }; 176 partition@3f60000 { 177 label = "env"; 178 reg = <0x03f60000 0x00040000>; 179 }; 180 partition@3fa0000 { 181 label = "u-boot"; 182 reg = <0x03fa0000 0x00060000>; 183 }; 184 }; 185 186 ndfc@1,0 { 187 compatible = "ibm,ndfc"; 188 reg = <0x00000001 0x00000000 0x00002000>; 189 ccr = <0x00001000>; 190 bank-settings = <0x80002222>; 191 #address-cells = <1>; 192 #size-cells = <1>; 193 194 nand { 195 #address-cells = <1>; 196 #size-cells = <1>; 197 198 partition@0 { 199 label = "u-boot"; 200 reg = <0x00000000 0x00100000>; 201 }; 202 partition@100000 { 203 label = "user"; 204 reg = <0x00000000 0x03f00000>; 205 }; 206 }; 207 }; 208 }; 209 210 UART0: serial@ef600200 { 211 device_type = "serial"; 212 compatible = "ns16550"; 213 reg = <0xef600200 0x00000008>; 214 virtual-reg = <0xef600200>; 215 clock-frequency = <0>; /* Filled in by U-Boot */ 216 current-speed = <0>; 217 interrupt-parent = <&UIC0>; 218 interrupts = <0x1a 0x4>; 219 }; 220 221 UART1: serial@ef600300 { 222 device_type = "serial"; 223 compatible = "ns16550"; 224 reg = <0xef600300 0x00000008>; 225 virtual-reg = <0xef600300>; 226 clock-frequency = <0>; /* Filled in by U-Boot */ 227 current-speed = <0>; 228 interrupt-parent = <&UIC0>; 229 interrupts = <0x1 0x4>; 230 }; 231 232 IIC0: i2c@ef600400 { 233 compatible = "ibm,iic-405ex", "ibm,iic"; 234 reg = <0xef600400 0x00000014>; 235 interrupt-parent = <&UIC0>; 236 interrupts = <0x2 0x4>; 237 #address-cells = <1>; 238 #size-cells = <0>; 239 240 rtc@68 { 241 compatible = "dallas,ds1338"; 242 reg = <0x68>; 243 }; 244 245 dtt@48 { 246 compatible = "dallas,ds1775"; 247 reg = <0x48>; 248 }; 249 }; 250 251 IIC1: i2c@ef600500 { 252 compatible = "ibm,iic-405ex", "ibm,iic"; 253 reg = <0xef600500 0x00000014>; 254 interrupt-parent = <&UIC0>; 255 interrupts = <0x7 0x4>; 256 }; 257 258 RGMII0: emac-rgmii@ef600b00 { 259 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 260 reg = <0xef600b00 0x00000104>; 261 has-mdio; 262 }; 263 264 EMAC0: ethernet@ef600900 { 265 linux,network-index = <0x0>; 266 device_type = "network"; 267 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 268 interrupt-parent = <&EMAC0>; 269 interrupts = <0x0 0x1>; 270 #interrupt-cells = <1>; 271 #address-cells = <0>; 272 #size-cells = <0>; 273 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 274 /*Wake*/ 0x1 &UIC1 0x1d 0x4>; 275 reg = <0xef600900 0x000000c4>; 276 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 277 mal-device = <&MAL0>; 278 mal-tx-channel = <0>; 279 mal-rx-channel = <0>; 280 cell-index = <0>; 281 max-frame-size = <9000>; 282 rx-fifo-size = <4096>; 283 tx-fifo-size = <2048>; 284 rx-fifo-size-gige = <16384>; 285 tx-fifo-size-gige = <16384>; 286 phy-mode = "rgmii"; 287 phy-map = <0x00000000>; 288 rgmii-device = <&RGMII0>; 289 rgmii-channel = <0>; 290 has-inverted-stacr-oc; 291 has-new-stacr-staopc; 292 }; 293 294 EMAC1: ethernet@ef600a00 { 295 linux,network-index = <0x1>; 296 device_type = "network"; 297 compatible = "ibm,emac-405ex", "ibm,emac4sync"; 298 interrupt-parent = <&EMAC1>; 299 interrupts = <0x0 0x1>; 300 #interrupt-cells = <1>; 301 #address-cells = <0>; 302 #size-cells = <0>; 303 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 304 /*Wake*/ 0x1 &UIC1 0x1f 0x4>; 305 reg = <0xef600a00 0x000000c4>; 306 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 307 mal-device = <&MAL0>; 308 mal-tx-channel = <1>; 309 mal-rx-channel = <1>; 310 cell-index = <1>; 311 max-frame-size = <9000>; 312 rx-fifo-size = <4096>; 313 tx-fifo-size = <2048>; 314 rx-fifo-size-gige = <16384>; 315 tx-fifo-size-gige = <16384>; 316 phy-mode = "rgmii"; 317 phy-map = <0x00000000>; 318 rgmii-device = <&RGMII0>; 319 rgmii-channel = <1>; 320 has-inverted-stacr-oc; 321 has-new-stacr-staopc; 322 }; 323 }; 324 325 PCIE0: pcie@a0000000 { 326 device_type = "pci"; 327 #interrupt-cells = <1>; 328 #size-cells = <2>; 329 #address-cells = <3>; 330 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 331 primary; 332 port = <0x0>; /* port number */ 333 reg = <0xa0000000 0x20000000 /* Config space access */ 334 0xef000000 0x00001000>; /* Registers */ 335 dcr-reg = <0x040 0x020>; 336 sdr-base = <0x400>; 337 338 /* Outbound ranges, one memory and one IO, 339 * later cannot be changed 340 */ 341 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 342 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; 343 344 /* Inbound 2GB range starting at 0 */ 345 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 346 347 /* This drives busses 0x00 to 0x3f */ 348 bus-range = <0x0 0x3f>; 349 350 /* Legacy interrupts (note the weird polarity, the bridge seems 351 * to invert PCIe legacy interrupts). 352 * We are de-swizzling here because the numbers are actually for 353 * port of the root complex virtual P2P bridge. But I want 354 * to avoid putting a node for it in the tree, so the numbers 355 * below are basically de-swizzled numbers. 356 * The real slot is on idsel 0, so the swizzling is 1:1 357 */ 358 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 359 interrupt-map = < 360 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ 361 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ 362 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ 363 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; 364 }; 365 366 PCIE1: pcie@c0000000 { 367 device_type = "pci"; 368 #interrupt-cells = <1>; 369 #size-cells = <2>; 370 #address-cells = <3>; 371 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 372 primary; 373 port = <0x1>; /* port number */ 374 reg = <0xc0000000 0x20000000 /* Config space access */ 375 0xef001000 0x00001000>; /* Registers */ 376 dcr-reg = <0x060 0x020>; 377 sdr-base = <0x440>; 378 379 /* Outbound ranges, one memory and one IO, 380 * later cannot be changed 381 */ 382 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 383 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; 384 385 /* Inbound 2GB range starting at 0 */ 386 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; 387 388 /* This drives busses 0x40 to 0x7f */ 389 bus-range = <0x40 0x7f>; 390 391 /* Legacy interrupts (note the weird polarity, the bridge seems 392 * to invert PCIe legacy interrupts). 393 * We are de-swizzling here because the numbers are actually for 394 * port of the root complex virtual P2P bridge. But I want 395 * to avoid putting a node for it in the tree, so the numbers 396 * below are basically de-swizzled numbers. 397 * The real slot is on idsel 0, so the swizzling is 1:1 398 */ 399 interrupt-map-mask = <0x0 0x0 0x0 0x7>; 400 interrupt-map = < 401 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ 402 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ 403 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ 404 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; 405 }; 406 407 MSI: ppc4xx-msi@C10000000 { 408 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 409 reg = <0xEF620000 0x100>; 410 sdr-base = <0x4B0>; 411 msi-data = <0x00000000>; 412 msi-mask = <0x44440000>; 413 interrupt-count = <12>; 414 interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>; 415 interrupt-parent = <&UIC2>; 416 #interrupt-cells = <1>; 417 #address-cells = <0>; 418 #size-cells = <0>; 419 interrupt-map = <0 &UIC2 0x10 1 420 1 &UIC2 0x11 1 421 2 &UIC2 0x12 1 422 2 &UIC2 0x13 1 423 2 &UIC2 0x14 1 424 2 &UIC2 0x15 1 425 2 &UIC2 0x16 1 426 2 &UIC2 0x17 1 427 2 &UIC2 0x18 1 428 2 &UIC2 0x19 1 429 2 &UIC2 0x1A 1 430 2 &UIC2 0x1B 1 431 2 &UIC2 0x1C 1 432 3 &UIC2 0x1D 1>; 433 }; 434 }; 435}; 436