1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * MSI support for PPC4xx SoCs using High Speed Transfer Assist (HSTA) for
4  * generation of the interrupt.
5  *
6  * Copyright © 2013 Alistair Popple <alistair@popple.id.au> IBM Corporation
7  */
8 
9 #include <linux/kernel.h>
10 #include <linux/interrupt.h>
11 #include <linux/msi.h>
12 #include <linux/of.h>
13 #include <linux/of_platform.h>
14 #include <linux/pci.h>
15 #include <linux/semaphore.h>
16 #include <asm/msi_bitmap.h>
17 #include <asm/ppc-pci.h>
18 
19 struct ppc4xx_hsta_msi {
20 	struct device *dev;
21 
22 	/* The ioremapped HSTA MSI IO space */
23 	u32 __iomem *data;
24 
25 	/* Physical address of HSTA MSI IO space */
26 	u64 address;
27 	struct msi_bitmap bmp;
28 
29 	/* An array mapping offsets to hardware IRQs */
30 	int *irq_map;
31 
32 	/* Number of hwirqs supported */
33 	int irq_count;
34 };
35 static struct ppc4xx_hsta_msi ppc4xx_hsta_msi;
36 
hsta_setup_msi_irqs(struct pci_dev * dev,int nvec,int type)37 static int hsta_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
38 {
39 	struct msi_msg msg;
40 	struct msi_desc *entry;
41 	int irq, hwirq;
42 	u64 addr;
43 
44 	/* We don't support MSI-X */
45 	if (type == PCI_CAP_ID_MSIX) {
46 		pr_debug("%s: MSI-X not supported.\n", __func__);
47 		return -EINVAL;
48 	}
49 
50 	for_each_pci_msi_entry(entry, dev) {
51 		irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1);
52 		if (irq < 0) {
53 			pr_debug("%s: Failed to allocate msi interrupt\n",
54 				 __func__);
55 			return irq;
56 		}
57 
58 		hwirq = ppc4xx_hsta_msi.irq_map[irq];
59 		if (!hwirq) {
60 			pr_err("%s: Failed mapping irq %d\n", __func__, irq);
61 			return -EINVAL;
62 		}
63 
64 		/*
65 		 * HSTA generates interrupts on writes to 128-bit aligned
66 		 * addresses.
67 		 */
68 		addr = ppc4xx_hsta_msi.address + irq*0x10;
69 		msg.address_hi = upper_32_bits(addr);
70 		msg.address_lo = lower_32_bits(addr);
71 
72 		/* Data is not used by the HSTA. */
73 		msg.data = 0;
74 
75 		pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq,
76 			 (((u64) msg.address_hi) << 32) | msg.address_lo);
77 
78 		if (irq_set_msi_desc(hwirq, entry)) {
79 			pr_err(
80 			"%s: Invalid hwirq %d specified in device tree\n",
81 			__func__, hwirq);
82 			msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
83 			return -EINVAL;
84 		}
85 		pci_write_msi_msg(hwirq, &msg);
86 	}
87 
88 	return 0;
89 }
90 
hsta_find_hwirq_offset(int hwirq)91 static int hsta_find_hwirq_offset(int hwirq)
92 {
93 	int irq;
94 
95 	/* Find the offset given the hwirq */
96 	for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++)
97 		if (ppc4xx_hsta_msi.irq_map[irq] == hwirq)
98 			return irq;
99 
100 	return -EINVAL;
101 }
102 
hsta_teardown_msi_irqs(struct pci_dev * dev)103 static void hsta_teardown_msi_irqs(struct pci_dev *dev)
104 {
105 	struct msi_desc *entry;
106 	int irq;
107 
108 	for_each_pci_msi_entry(entry, dev) {
109 		if (!entry->irq)
110 			continue;
111 
112 		irq = hsta_find_hwirq_offset(entry->irq);
113 
114 		/* entry->irq should always be in irq_map */
115 		BUG_ON(irq < 0);
116 		irq_set_msi_desc(entry->irq, NULL);
117 		msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
118 		pr_debug("%s: Teardown IRQ %u (index %u)\n", __func__,
119 			 entry->irq, irq);
120 	}
121 }
122 
hsta_msi_probe(struct platform_device * pdev)123 static int hsta_msi_probe(struct platform_device *pdev)
124 {
125 	struct device *dev = &pdev->dev;
126 	struct resource *mem;
127 	int irq, ret, irq_count;
128 	struct pci_controller *phb;
129 
130 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
131 	if (!mem) {
132 		dev_err(dev, "Unable to get mmio space\n");
133 		return -EINVAL;
134 	}
135 
136 	irq_count = of_irq_count(dev->of_node);
137 	if (!irq_count) {
138 		dev_err(dev, "Unable to find IRQ range\n");
139 		return -EINVAL;
140 	}
141 
142 	ppc4xx_hsta_msi.dev = dev;
143 	ppc4xx_hsta_msi.address = mem->start;
144 	ppc4xx_hsta_msi.data = ioremap(mem->start, resource_size(mem));
145 	ppc4xx_hsta_msi.irq_count = irq_count;
146 	if (!ppc4xx_hsta_msi.data) {
147 		dev_err(dev, "Unable to map memory\n");
148 		return -ENOMEM;
149 	}
150 
151 	ret = msi_bitmap_alloc(&ppc4xx_hsta_msi.bmp, irq_count, dev->of_node);
152 	if (ret)
153 		goto out;
154 
155 	ppc4xx_hsta_msi.irq_map = kmalloc_array(irq_count, sizeof(int),
156 						GFP_KERNEL);
157 	if (!ppc4xx_hsta_msi.irq_map) {
158 		ret = -ENOMEM;
159 		goto out1;
160 	}
161 
162 	/* Setup a mapping from irq offsets to hardware irq numbers */
163 	for (irq = 0; irq < irq_count; irq++) {
164 		ppc4xx_hsta_msi.irq_map[irq] =
165 			irq_of_parse_and_map(dev->of_node, irq);
166 		if (!ppc4xx_hsta_msi.irq_map[irq]) {
167 			dev_err(dev, "Unable to map IRQ\n");
168 			ret = -EINVAL;
169 			goto out2;
170 		}
171 	}
172 
173 	list_for_each_entry(phb, &hose_list, list_node) {
174 		phb->controller_ops.setup_msi_irqs = hsta_setup_msi_irqs;
175 		phb->controller_ops.teardown_msi_irqs = hsta_teardown_msi_irqs;
176 	}
177 	return 0;
178 
179 out2:
180 	kfree(ppc4xx_hsta_msi.irq_map);
181 
182 out1:
183 	msi_bitmap_free(&ppc4xx_hsta_msi.bmp);
184 
185 out:
186 	iounmap(ppc4xx_hsta_msi.data);
187 	return ret;
188 }
189 
190 static const struct of_device_id hsta_msi_ids[] = {
191 	{
192 		.compatible = "ibm,hsta-msi",
193 	},
194 	{}
195 };
196 
197 static struct platform_driver hsta_msi_driver = {
198 	.probe = hsta_msi_probe,
199 	.driver = {
200 		.name = "hsta-msi",
201 		.of_match_table = hsta_msi_ids,
202 	},
203 };
204 
hsta_msi_init(void)205 static int hsta_msi_init(void)
206 {
207 	return platform_driver_register(&hsta_msi_driver);
208 }
209 subsys_initcall(hsta_msi_init);
210