1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
4  *
5  * Description:
6  * MPC832xE MDS board specific routines.
7  */
8 
9 #include <linux/stddef.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/reboot.h>
14 #include <linux/pci.h>
15 #include <linux/kdev_t.h>
16 #include <linux/major.h>
17 #include <linux/console.h>
18 #include <linux/delay.h>
19 #include <linux/seq_file.h>
20 #include <linux/root_dev.h>
21 #include <linux/initrd.h>
22 #include <linux/of_platform.h>
23 #include <linux/of_device.h>
24 
25 #include <linux/atomic.h>
26 #include <asm/time.h>
27 #include <asm/io.h>
28 #include <asm/machdep.h>
29 #include <asm/ipic.h>
30 #include <asm/irq.h>
31 #include <asm/prom.h>
32 #include <asm/udbg.h>
33 #include <sysdev/fsl_soc.h>
34 #include <sysdev/fsl_pci.h>
35 #include <soc/fsl/qe/qe.h>
36 
37 #include "mpc83xx.h"
38 
39 #undef DEBUG
40 #ifdef DEBUG
41 #define DBG(fmt...) udbg_printf(fmt)
42 #else
43 #define DBG(fmt...)
44 #endif
45 
46 /* ************************************************************************
47  *
48  * Setup the architecture
49  *
50  */
mpc832x_sys_setup_arch(void)51 static void __init mpc832x_sys_setup_arch(void)
52 {
53 	struct device_node *np;
54 	u8 __iomem *bcsr_regs = NULL;
55 
56 	mpc83xx_setup_arch();
57 
58 	/* Map BCSR area */
59 	np = of_find_node_by_name(NULL, "bcsr");
60 	if (np) {
61 		struct resource res;
62 
63 		of_address_to_resource(np, 0, &res);
64 		bcsr_regs = ioremap(res.start, resource_size(&res));
65 		of_node_put(np);
66 	}
67 
68 #ifdef CONFIG_QUICC_ENGINE
69 	if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
70 		par_io_init(np);
71 		of_node_put(np);
72 
73 		for_each_node_by_name(np, "ucc")
74 			par_io_of_config(np);
75 	}
76 
77 	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
78 			!= NULL){
79 		/* Reset the Ethernet PHYs */
80 #define BCSR8_FETH_RST 0x50
81 		clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
82 		udelay(1000);
83 		setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
84 		iounmap(bcsr_regs);
85 		of_node_put(np);
86 	}
87 #endif				/* CONFIG_QUICC_ENGINE */
88 }
89 
90 machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
91 
92 /*
93  * Called very early, MMU is off, device-tree isn't unflattened
94  */
mpc832x_sys_probe(void)95 static int __init mpc832x_sys_probe(void)
96 {
97 	return of_machine_is_compatible("MPC832xMDS");
98 }
99 
define_machine(mpc832x_mds)100 define_machine(mpc832x_mds) {
101 	.name 		= "MPC832x MDS",
102 	.probe 		= mpc832x_sys_probe,
103 	.setup_arch 	= mpc832x_sys_setup_arch,
104 	.discover_phbs	= mpc83xx_setup_pci,
105 	.init_IRQ	= mpc83xx_ipic_init_IRQ,
106 	.get_irq 	= ipic_get_irq,
107 	.restart 	= mpc83xx_restart,
108 	.time_init 	= mpc83xx_time_init,
109 	.calibrate_decr	= generic_calibrate_decr,
110 	.progress 	= udbg_progress,
111 };
112