1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Based on MPC8560 ADS and arch/ppc tqm85xx ports
4  *
5  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
6  *
7  * Copyright 2008 Freescale Semiconductor Inc.
8  *
9  * Copyright (c) 2005-2006 DENX Software Engineering
10  * Stefan Roese <sr@denx.de>
11  *
12  * Based on original work by
13  * 	Kumar Gala <kumar.gala@freescale.com>
14  *      Copyright 2004 Freescale Semiconductor Inc.
15  */
16 
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/kdev_t.h>
21 #include <linux/delay.h>
22 #include <linux/seq_file.h>
23 #include <linux/of_platform.h>
24 
25 #include <asm/time.h>
26 #include <asm/machdep.h>
27 #include <asm/pci-bridge.h>
28 #include <asm/mpic.h>
29 #include <asm/prom.h>
30 #include <mm/mmu_decl.h>
31 #include <asm/udbg.h>
32 
33 #include <sysdev/fsl_soc.h>
34 #include <sysdev/fsl_pci.h>
35 
36 #include "mpc85xx.h"
37 
38 #ifdef CONFIG_CPM2
39 #include <asm/cpm2.h>
40 #endif /* CONFIG_CPM2 */
41 
tqm85xx_pic_init(void)42 static void __init tqm85xx_pic_init(void)
43 {
44 	struct mpic *mpic = mpic_alloc(NULL, 0,
45 			MPIC_BIG_ENDIAN,
46 			0, 256, " OpenPIC  ");
47 	BUG_ON(mpic == NULL);
48 	mpic_init(mpic);
49 
50 	mpc85xx_cpm2_pic_init();
51 }
52 
53 /*
54  * Setup the architecture
55  */
tqm85xx_setup_arch(void)56 static void __init tqm85xx_setup_arch(void)
57 {
58 	if (ppc_md.progress)
59 		ppc_md.progress("tqm85xx_setup_arch()", 0);
60 
61 #ifdef CONFIG_CPM2
62 	cpm2_reset();
63 #endif
64 
65 	fsl_pci_assign_primary();
66 }
67 
tqm85xx_show_cpuinfo(struct seq_file * m)68 static void tqm85xx_show_cpuinfo(struct seq_file *m)
69 {
70 	uint pvid, svid, phid1;
71 
72 	pvid = mfspr(SPRN_PVR);
73 	svid = mfspr(SPRN_SVR);
74 
75 	seq_printf(m, "Vendor\t\t: TQ Components\n");
76 	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
77 	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
78 
79 	/* Display cpu Pll setting */
80 	phid1 = mfspr(SPRN_HID1);
81 	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
82 }
83 
tqm85xx_ti1520_fixup(struct pci_dev * pdev)84 static void tqm85xx_ti1520_fixup(struct pci_dev *pdev)
85 {
86 	unsigned int val;
87 
88 	/* Do not do the fixup on other platforms! */
89 	if (!machine_is(tqm85xx))
90 		return;
91 
92 	dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
93 
94 	/*
95 	 * Enable P2CCLK bit in system control register
96 	 * to enable CLOCK output to power chip
97 	 */
98 	pci_read_config_dword(pdev, 0x80, &val);
99 	pci_write_config_dword(pdev, 0x80, val | (1 << 27));
100 
101 }
102 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
103 		tqm85xx_ti1520_fixup);
104 
105 machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
106 
107 static const char * const board[] __initconst = {
108 	"tqc,tqm8540",
109 	"tqc,tqm8541",
110 	"tqc,tqm8548",
111 	"tqc,tqm8555",
112 	"tqc,tqm8560",
113 	NULL
114 };
115 
116 /*
117  * Called very early, device-tree isn't unflattened
118  */
tqm85xx_probe(void)119 static int __init tqm85xx_probe(void)
120 {
121 	return of_device_compatible_match(of_root, board);
122 }
123 
define_machine(tqm85xx)124 define_machine(tqm85xx) {
125 	.name			= "TQM85xx",
126 	.probe			= tqm85xx_probe,
127 	.setup_arch		= tqm85xx_setup_arch,
128 	.init_IRQ		= tqm85xx_pic_init,
129 	.show_cpuinfo		= tqm85xx_show_cpuinfo,
130 	.get_irq		= mpic_get_irq,
131 	.calibrate_decr		= generic_calibrate_decr,
132 	.progress		= udbg_progress,
133 };
134