1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * mpc7448_hpc2.c
4  *
5  * Board setup routines for the Freescale mpc7448hpc2(taiga) platform
6  *
7  * Author: Jacob Pan
8  *	 jacob.pan@freescale.com
9  * Author: Xianghua Xiao
10  *       x.xiao@freescale.com
11  * Maintainer: Roy Zang <tie-fei.zang@freescale.com>
12  * 	Add Flat Device Tree support fot mpc7448hpc2 board
13  *
14  * Copyright 2004-2006 Freescale Semiconductor, Inc.
15  */
16 
17 #include <linux/stddef.h>
18 #include <linux/kernel.h>
19 #include <linux/pci.h>
20 #include <linux/kdev_t.h>
21 #include <linux/console.h>
22 #include <linux/extable.h>
23 #include <linux/delay.h>
24 #include <linux/irq.h>
25 #include <linux/seq_file.h>
26 #include <linux/root_dev.h>
27 #include <linux/serial.h>
28 #include <linux/tty.h>
29 #include <linux/serial_core.h>
30 
31 #include <asm/time.h>
32 #include <asm/machdep.h>
33 #include <asm/prom.h>
34 #include <asm/udbg.h>
35 #include <asm/tsi108.h>
36 #include <asm/pci-bridge.h>
37 #include <asm/reg.h>
38 #include <mm/mmu_decl.h>
39 #include <asm/tsi108_pci.h>
40 #include <asm/tsi108_irq.h>
41 #include <asm/mpic.h>
42 
43 #undef DEBUG
44 #ifdef DEBUG
45 #define DBG(fmt...) do { printk(fmt); } while(0)
46 #else
47 #define DBG(fmt...) do { } while(0)
48 #endif
49 
50 #define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
51 
mpc7448_hpc2_exclude_device(struct pci_controller * hose,u_char bus,u_char devfn)52 int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
53 				u_char bus, u_char devfn)
54 {
55 	if (bus == 0 && PCI_SLOT(devfn) == 0)
56 		return PCIBIOS_DEVICE_NOT_FOUND;
57 	else
58 		return PCIBIOS_SUCCESSFUL;
59 }
60 
mpc7448_hpc2_setup_pci(void)61 static void __init mpc7448_hpc2_setup_pci(void)
62 {
63 #ifdef CONFIG_PCI
64 	struct device_node *np;
65 	if (ppc_md.progress)
66 		ppc_md.progress("mpc7448_hpc2_setup_pci():set_bridge", 0);
67 
68 	/* setup PCI host bridge */
69 	for_each_compatible_node(np, "pci", "tsi108-pci")
70 		tsi108_setup_pci(np, MPC7448HPC2_PCI_CFG_PHYS, 0);
71 
72 	ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
73 	if (ppc_md.progress)
74 		ppc_md.progress("tsi108: resources set", 0x100);
75 #endif
76 }
77 
mpc7448_hpc2_setup_arch(void)78 static void __init mpc7448_hpc2_setup_arch(void)
79 {
80 	tsi108_csr_vir_base = get_vir_csrbase();
81 
82 	printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
83 	printk(KERN_INFO
84 	       "Jointly ported by Freescale and Tundra Semiconductor\n");
85 	printk(KERN_INFO
86 	       "Enabling L2 cache then enabling the HID0 prefetch engine.\n");
87 }
88 
89 /*
90  * Interrupt setup and service.  Interrupts on the mpc7448_hpc2 come
91  * from the four external INT pins, PCI interrupts are routed via
92  * PCI interrupt control registers, it generates internal IRQ23
93  *
94  * Interrupt routing on the Taiga Board:
95  * TSI108:PB_INT[0] -> CPU0:INT#
96  * TSI108:PB_INT[1] -> CPU0:MCP#
97  * TSI108:PB_INT[2] -> N/C
98  * TSI108:PB_INT[3] -> N/C
99  */
mpc7448_hpc2_init_IRQ(void)100 static void __init mpc7448_hpc2_init_IRQ(void)
101 {
102 	struct mpic *mpic;
103 #ifdef CONFIG_PCI
104 	unsigned int cascade_pci_irq;
105 	struct device_node *tsi_pci;
106 	struct device_node *cascade_node = NULL;
107 #endif
108 
109 	mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
110 			MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
111 			24, 0,
112 			"Tsi108_PIC");
113 
114 	BUG_ON(mpic == NULL);
115 
116 	mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
117 
118 	mpic_init(mpic);
119 
120 #ifdef CONFIG_PCI
121 	tsi_pci = of_find_node_by_type(NULL, "pci");
122 	if (tsi_pci == NULL) {
123 		printk("%s: No tsi108 pci node found !\n", __func__);
124 		return;
125 	}
126 	cascade_node = of_find_node_by_type(NULL, "pic-router");
127 	if (cascade_node == NULL) {
128 		printk("%s: No tsi108 pci cascade node found !\n", __func__);
129 		return;
130 	}
131 
132 	cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
133 	DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
134 	    (u32) cascade_pci_irq);
135 	tsi108_pci_int_init(cascade_node);
136 	irq_set_handler_data(cascade_pci_irq, mpic);
137 	irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
138 #endif
139 	/* Configure MPIC outputs to CPU0 */
140 	tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
141 }
142 
mpc7448_hpc2_show_cpuinfo(struct seq_file * m)143 void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
144 {
145 	seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
146 }
147 
mpc7448_hpc2_restart(char * cmd)148 static void __noreturn mpc7448_hpc2_restart(char *cmd)
149 {
150 	local_irq_disable();
151 
152 	/* Set exception prefix high - to the firmware */
153 	mtmsr(mfmsr() | MSR_IP);
154 	isync();
155 
156 	for (;;) ;		/* Spin until reset happens */
157 }
158 
159 /*
160  * Called very early, device-tree isn't unflattened
161  */
mpc7448_hpc2_probe(void)162 static int __init mpc7448_hpc2_probe(void)
163 {
164 	if (!of_machine_is_compatible("mpc74xx"))
165 		return 0;
166 	return 1;
167 }
168 
mpc7448_machine_check_exception(struct pt_regs * regs)169 static int mpc7448_machine_check_exception(struct pt_regs *regs)
170 {
171 	const struct exception_table_entry *entry;
172 
173 	/* Are we prepared to handle this fault */
174 	if ((entry = search_exception_tables(regs->nip)) != NULL) {
175 		tsi108_clear_pci_cfg_error();
176 		regs_set_recoverable(regs);
177 		regs_set_return_ip(regs, extable_fixup(entry));
178 		return 1;
179 	}
180 	return 0;
181 }
182 
define_machine(mpc7448_hpc2)183 define_machine(mpc7448_hpc2){
184 	.name 			= "MPC7448 HPC2",
185 	.probe 			= mpc7448_hpc2_probe,
186 	.setup_arch 		= mpc7448_hpc2_setup_arch,
187 	.discover_phbs		= mpc7448_hpc2_setup_pci,
188 	.init_IRQ 		= mpc7448_hpc2_init_IRQ,
189 	.show_cpuinfo 		= mpc7448_hpc2_show_cpuinfo,
190 	.get_irq 		= mpic_get_irq,
191 	.restart 		= mpc7448_hpc2_restart,
192 	.calibrate_decr 	= generic_calibrate_decr,
193 	.machine_check_exception= mpc7448_machine_check_exception,
194 	.progress 		= udbg_progress,
195 };
196