1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select SRCU 27 select RATIONAL 28 help 29 The common clock framework is a single definition of struct 30 clk, useful across many platforms, as well as an 31 implementation of the clock API in include/linux/clk.h. 32 Architectures utilizing the common struct clk should select 33 this option. 34 35if COMMON_CLK 36 37config COMMON_CLK_WM831X 38 tristate "Clock driver for WM831x/2x PMICs" 39 depends on MFD_WM831X 40 help 41 Supports the clocking subsystem of the WM831x/2x series of 42 PMICs from Wolfson Microelectronics. 43 44source "drivers/clk/versatile/Kconfig" 45 46config CLK_HSDK 47 bool "PLL Driver for HSDK platform" 48 depends on ARC_SOC_HSDK || COMPILE_TEST 49 depends on HAS_IOMEM 50 help 51 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 52 control. 53 54config LMK04832 55 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 56 depends on SPI 57 select REGMAP_SPI 58 help 59 Say yes here to build support for Texas Instruments' LMK04832 Ultra 60 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 61 62config COMMON_CLK_MAX77686 63 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 64 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 65 help 66 This driver supports Maxim 77620/77686/77802 crystal oscillator 67 clock. 68 69config COMMON_CLK_MAX9485 70 tristate "Maxim 9485 Programmable Clock Generator" 71 depends on I2C 72 help 73 This driver supports Maxim 9485 Programmable Audio Clock Generator 74 75config COMMON_CLK_RK808 76 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 77 depends on MFD_RK808 78 help 79 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 80 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 81 Clkout1 is always on, Clkout2 can off by control register. 82 83config COMMON_CLK_HI655X 84 tristate "Clock driver for Hi655x" if EXPERT 85 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 86 depends on REGMAP 87 default MFD_HI655X_PMIC 88 help 89 This driver supports the hi655x PMIC clock. This 90 multi-function device has one fixed-rate oscillator, clocked 91 at 32KHz. 92 93config COMMON_CLK_SCMI 94 tristate "Clock driver controlled via SCMI interface" 95 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 96 help 97 This driver provides support for clocks that are controlled 98 by firmware that implements the SCMI interface. 99 100 This driver uses SCMI Message Protocol to interact with the 101 firmware providing all the clock controls. 102 103config COMMON_CLK_SCPI 104 tristate "Clock driver controlled via SCPI interface" 105 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 106 help 107 This driver provides support for clocks that are controlled 108 by firmware that implements the SCPI interface. 109 110 This driver uses SCPI Message Protocol to interact with the 111 firmware providing all the clock controls. 112 113config COMMON_CLK_SI5341 114 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 115 depends on I2C 116 select REGMAP_I2C 117 help 118 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 119 generators. Not all features of these chips are currently supported 120 by the driver, in particular it only supports XTAL input. The chip can 121 be pre-programmed to support other configurations and features not yet 122 implemented in the driver. 123 124config COMMON_CLK_SI5351 125 tristate "Clock driver for SiLabs 5351A/B/C" 126 depends on I2C 127 select REGMAP_I2C 128 help 129 This driver supports Silicon Labs 5351A/B/C programmable clock 130 generators. 131 132config COMMON_CLK_SI514 133 tristate "Clock driver for SiLabs 514 devices" 134 depends on I2C 135 depends on OF 136 select REGMAP_I2C 137 help 138 This driver supports the Silicon Labs 514 programmable clock 139 generator. 140 141config COMMON_CLK_SI544 142 tristate "Clock driver for SiLabs 544 devices" 143 depends on I2C 144 select REGMAP_I2C 145 help 146 This driver supports the Silicon Labs 544 programmable clock 147 generator. 148 149config COMMON_CLK_SI570 150 tristate "Clock driver for SiLabs 570 and compatible devices" 151 depends on I2C 152 depends on OF 153 select REGMAP_I2C 154 help 155 This driver supports Silicon Labs 570/571/598/599 programmable 156 clock generators. 157 158config COMMON_CLK_BM1880 159 bool "Clock driver for Bitmain BM1880 SoC" 160 depends on ARCH_BITMAIN || COMPILE_TEST 161 default ARCH_BITMAIN 162 help 163 This driver supports the clocks on Bitmain BM1880 SoC. 164 165config COMMON_CLK_CDCE706 166 tristate "Clock driver for TI CDCE706 clock synthesizer" 167 depends on I2C 168 select REGMAP_I2C 169 help 170 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 171 172config COMMON_CLK_CDCE925 173 tristate "Clock driver for TI CDCE913/925/937/949 devices" 174 depends on I2C 175 depends on OF 176 select REGMAP_I2C 177 help 178 This driver supports the TI CDCE913/925/937/949 programmable clock 179 synthesizer. Each chip has different number of PLLs and outputs. 180 For example, the CDCE925 contains two PLLs with spread-spectrum 181 clocking support and five output dividers. The driver only supports 182 the following setup, and uses a fixed setting for the output muxes. 183 Y1 is derived from the input clock 184 Y2 and Y3 derive from PLL1 185 Y4 and Y5 derive from PLL2 186 Given a target output frequency, the driver will set the PLL and 187 divider to best approximate the desired output. 188 189config COMMON_CLK_CS2000_CP 190 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 191 depends on I2C 192 help 193 If you say yes here you get support for the CS2000 clock multiplier. 194 195config COMMON_CLK_FSL_FLEXSPI 196 tristate "Clock driver for FlexSPI on Layerscape SoCs" 197 depends on ARCH_LAYERSCAPE || COMPILE_TEST 198 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 199 help 200 On Layerscape SoCs there is a special clock for the FlexSPI 201 interface. 202 203config COMMON_CLK_FSL_SAI 204 bool "Clock driver for BCLK of Freescale SAI cores" 205 depends on ARCH_LAYERSCAPE || COMPILE_TEST 206 help 207 This driver supports the Freescale SAI (Synchronous Audio Interface) 208 to be used as a generic clock output. Some SoCs have restrictions 209 regarding the possible pin multiplexer settings. Eg. on some SoCs 210 two SAI interfaces can only be enabled together. If just one is 211 needed, the BCLK pin of the second one can be used as general 212 purpose clock output. Ideally, it can be used to drive an audio 213 codec (sometimes known as MCLK). 214 215config COMMON_CLK_GEMINI 216 bool "Clock driver for Cortina Systems Gemini SoC" 217 depends on ARCH_GEMINI || COMPILE_TEST 218 select MFD_SYSCON 219 select RESET_CONTROLLER 220 help 221 This driver supports the SoC clocks on the Cortina Systems Gemini 222 platform, also known as SL3516 or CS3516. 223 224config COMMON_CLK_ASPEED 225 bool "Clock driver for Aspeed BMC SoCs" 226 depends on ARCH_ASPEED || COMPILE_TEST 227 default ARCH_ASPEED 228 select MFD_SYSCON 229 select RESET_CONTROLLER 230 help 231 This driver supports the SoC clocks on the Aspeed BMC platforms. 232 233 The G4 and G5 series, including the ast2400 and ast2500, are supported 234 by this driver. 235 236config COMMON_CLK_S2MPS11 237 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 238 depends on MFD_SEC_CORE || COMPILE_TEST 239 help 240 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 241 clock. These multi-function devices have two (S2MPS14) or three 242 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 243 244config CLK_TWL6040 245 tristate "External McPDM functional clock from twl6040" 246 depends on TWL6040_CORE 247 help 248 Enable the external functional clock support on OMAP4+ platforms for 249 McPDM. McPDM module is using the external bit clock on the McPDM bus 250 as functional clock. 251 252config COMMON_CLK_AXI_CLKGEN 253 tristate "AXI clkgen driver" 254 depends on HAS_IOMEM || COMPILE_TEST 255 depends on OF 256 help 257 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 258 FPGAs. It is commonly used in Analog Devices' reference designs. 259 260config CLK_QORIQ 261 bool "Clock driver for Freescale QorIQ platforms" 262 depends on OF 263 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 264 help 265 This adds the clock driver support for Freescale QorIQ platforms 266 using common clock framework. 267 268config CLK_LS1028A_PLLDIG 269 tristate "Clock driver for LS1028A Display output" 270 depends on ARCH_LAYERSCAPE || COMPILE_TEST 271 default ARCH_LAYERSCAPE 272 help 273 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 274 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 275 features of the PLL are currently supported by the driver. By default, 276 configured bypass mode with this PLL. 277 278config COMMON_CLK_XGENE 279 bool "Clock driver for APM XGene SoC" 280 default ARCH_XGENE 281 depends on ARM64 || COMPILE_TEST 282 help 283 Support for the APM X-Gene SoC reference, PLL, and device clocks. 284 285config COMMON_CLK_LOCHNAGAR 286 tristate "Cirrus Logic Lochnagar clock driver" 287 depends on MFD_LOCHNAGAR 288 help 289 This driver supports the clocking features of the Cirrus Logic 290 Lochnagar audio development board. 291 292config COMMON_CLK_NXP 293 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 294 select REGMAP_MMIO if ARCH_LPC32XX 295 select MFD_SYSCON if ARCH_LPC18XX 296 help 297 Support for clock providers on NXP platforms. 298 299config COMMON_CLK_PALMAS 300 tristate "Clock driver for TI Palmas devices" 301 depends on MFD_PALMAS 302 help 303 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 304 using common clock framework. 305 306config COMMON_CLK_PWM 307 tristate "Clock driver for PWMs used as clock outputs" 308 depends on PWM 309 help 310 Adapter driver so that any PWM output can be (mis)used as clock signal 311 at 50% duty cycle. 312 313config COMMON_CLK_PXA 314 def_bool COMMON_CLK && ARCH_PXA 315 help 316 Support for the Marvell PXA SoC. 317 318config COMMON_CLK_PIC32 319 def_bool COMMON_CLK && MACH_PIC32 320 321config COMMON_CLK_OXNAS 322 bool "Clock driver for the OXNAS SoC Family" 323 depends on ARCH_OXNAS || COMPILE_TEST 324 select MFD_SYSCON 325 help 326 Support for the OXNAS SoC Family clocks. 327 328config COMMON_CLK_VC5 329 tristate "Clock driver for IDT VersaClock 5,6 devices" 330 depends on I2C 331 depends on OF 332 select REGMAP_I2C 333 help 334 This driver supports the IDT VersaClock 5 and VersaClock 6 335 programmable clock generators. 336 337config COMMON_CLK_STM32MP157 338 def_bool COMMON_CLK && MACH_STM32MP157 339 help 340 Support for stm32mp157 SoC family clocks 341 342config COMMON_CLK_STM32MP157_SCMI 343 bool "stm32mp157 Clock driver with Trusted Firmware" 344 depends on COMMON_CLK_STM32MP157 345 select COMMON_CLK_SCMI 346 select ARM_SCMI_PROTOCOL 347 default y 348 help 349 Support for stm32mp157 SoC family clocks with Trusted Firmware using 350 SCMI protocol. 351 352config COMMON_CLK_STM32F 353 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 354 help 355 Support for stm32f4 and stm32f7 SoC families clocks 356 357config COMMON_CLK_STM32H7 358 def_bool COMMON_CLK && MACH_STM32H743 359 help 360 Support for stm32h7 SoC family clocks 361 362config COMMON_CLK_MMP2 363 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 364 help 365 Support for Marvell MMP2 and MMP3 SoC clocks 366 367config COMMON_CLK_MMP2_AUDIO 368 tristate "Clock driver for MMP2 Audio subsystem" 369 depends on COMMON_CLK_MMP2 || COMPILE_TEST 370 help 371 This driver supports clocks for Audio subsystem on MMP2 SoC. 372 373config COMMON_CLK_BD718XX 374 tristate "Clock driver for 32K clk gates on ROHM PMICs" 375 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 376 help 377 This driver supports ROHM BD71837, BD71847, BD71850, BD71815 378 and BD71828 PMICs clock gates. 379 380config COMMON_CLK_FIXED_MMIO 381 bool "Clock driver for Memory Mapped Fixed values" 382 depends on COMMON_CLK && OF 383 help 384 Support for Memory Mapped IO Fixed clocks 385 386config COMMON_CLK_K210 387 bool "Clock driver for the Canaan Kendryte K210 SoC" 388 depends on OF && RISCV && SOC_CANAAN 389 default SOC_CANAAN 390 help 391 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 392 393source "drivers/clk/actions/Kconfig" 394source "drivers/clk/analogbits/Kconfig" 395source "drivers/clk/baikal-t1/Kconfig" 396source "drivers/clk/bcm/Kconfig" 397source "drivers/clk/hisilicon/Kconfig" 398source "drivers/clk/imgtec/Kconfig" 399source "drivers/clk/imx/Kconfig" 400source "drivers/clk/ingenic/Kconfig" 401source "drivers/clk/keystone/Kconfig" 402source "drivers/clk/mediatek/Kconfig" 403source "drivers/clk/meson/Kconfig" 404source "drivers/clk/mstar/Kconfig" 405source "drivers/clk/mvebu/Kconfig" 406source "drivers/clk/pistachio/Kconfig" 407source "drivers/clk/qcom/Kconfig" 408source "drivers/clk/ralink/Kconfig" 409source "drivers/clk/renesas/Kconfig" 410source "drivers/clk/rockchip/Kconfig" 411source "drivers/clk/samsung/Kconfig" 412source "drivers/clk/sifive/Kconfig" 413source "drivers/clk/socfpga/Kconfig" 414source "drivers/clk/sprd/Kconfig" 415source "drivers/clk/sunxi/Kconfig" 416source "drivers/clk/sunxi-ng/Kconfig" 417source "drivers/clk/tegra/Kconfig" 418source "drivers/clk/ti/Kconfig" 419source "drivers/clk/uniphier/Kconfig" 420source "drivers/clk/x86/Kconfig" 421source "drivers/clk/xilinx/Kconfig" 422source "drivers/clk/zynqmp/Kconfig" 423 424endif 425