1 /* SPDX-License-Identifier: GPL-2.0 */
2 /************************************************************************
3 File : Clock H/w specific Information
4
5 Author: Pankaj Dev <pankaj.dev@st.com>
6
7 Copyright (C) 2014 STMicroelectronics
8 ************************************************************************/
9
10 #ifndef __CLKGEN_INFO_H
11 #define __CLKGEN_INFO_H
12
13 extern spinlock_t clkgen_a9_lock;
14
15 struct clkgen_field {
16 unsigned int offset;
17 unsigned int mask;
18 unsigned int shift;
19 };
20
clkgen_read(void __iomem * base,struct clkgen_field * field)21 static inline unsigned long clkgen_read(void __iomem *base,
22 struct clkgen_field *field)
23 {
24 return (readl(base + field->offset) >> field->shift) & field->mask;
25 }
26
27
clkgen_write(void __iomem * base,struct clkgen_field * field,unsigned long val)28 static inline void clkgen_write(void __iomem *base, struct clkgen_field *field,
29 unsigned long val)
30 {
31 writel((readl(base + field->offset) &
32 ~(field->mask << field->shift)) | (val << field->shift),
33 base + field->offset);
34
35 return;
36 }
37
38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \
39 .offset = _offset, \
40 .mask = _mask, \
41 .shift = _shift, \
42 }
43
44 #define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \
45 &pll->data->field)
46
47 #define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \
48 &pll->data->field, val)
49
50 #endif /*__CLKGEN_INFO_H*/
51
52