1 // SPDX-License-Identifier: MIT
2 /* Copyright 2021 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: David Nieto
23  *          Roy Sun
24  */
25 
26 #include <linux/debugfs.h>
27 #include <linux/list.h>
28 #include <linux/module.h>
29 #include <linux/uaccess.h>
30 #include <linux/reboot.h>
31 #include <linux/syscalls.h>
32 
33 #include <drm/amdgpu_drm.h>
34 #include <drm/drm_debugfs.h>
35 
36 #include "amdgpu.h"
37 #include "amdgpu_vm.h"
38 #include "amdgpu_gem.h"
39 #include "amdgpu_ctx.h"
40 #include "amdgpu_fdinfo.h"
41 
42 
43 static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
44 	[AMDGPU_HW_IP_GFX]	=	"gfx",
45 	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
46 	[AMDGPU_HW_IP_DMA]	=	"dma",
47 	[AMDGPU_HW_IP_UVD]	=	"dec",
48 	[AMDGPU_HW_IP_VCE]	=	"enc",
49 	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
50 	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
51 	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
52 	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
53 };
54 
amdgpu_show_fdinfo(struct seq_file * m,struct file * f)55 void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
56 {
57 	struct amdgpu_fpriv *fpriv;
58 	uint32_t bus, dev, fn, i, domain;
59 	uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
60 	struct drm_file *file = f->private_data;
61 	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
62 	struct amdgpu_bo *root;
63 	int ret;
64 
65 	ret = amdgpu_file_to_fpriv(f, &fpriv);
66 	if (ret)
67 		return;
68 	bus = adev->pdev->bus->number;
69 	domain = pci_domain_nr(adev->pdev->bus);
70 	dev = PCI_SLOT(adev->pdev->devfn);
71 	fn = PCI_FUNC(adev->pdev->devfn);
72 
73 	root = amdgpu_bo_ref(fpriv->vm.root.bo);
74 	if (!root)
75 		return;
76 
77 	ret = amdgpu_bo_reserve(root, false);
78 	if (ret) {
79 		DRM_ERROR("Fail to reserve bo\n");
80 		return;
81 	}
82 	amdgpu_vm_get_memory(&fpriv->vm, &vram_mem, &gtt_mem, &cpu_mem);
83 	amdgpu_bo_unreserve(root);
84 	amdgpu_bo_unref(&root);
85 
86 	seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus,
87 			dev, fn, fpriv->vm.pasid);
88 	seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL);
89 	seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL);
90 	seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL);
91 	for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
92 		uint32_t count = amdgpu_ctx_num_entities[i];
93 		int idx = 0;
94 		uint64_t total = 0, min = 0;
95 		uint32_t perc, frac;
96 
97 		for (idx = 0; idx < count; idx++) {
98 			total = amdgpu_ctx_mgr_fence_usage(&fpriv->ctx_mgr,
99 				i, idx, &min);
100 			if ((total == 0) || (min == 0))
101 				continue;
102 
103 			perc = div64_u64(10000 * total, min);
104 			frac = perc % 100;
105 
106 			seq_printf(m, "%s%d:\t%d.%d%%\n",
107 					amdgpu_ip_name[i],
108 					idx, perc/100, frac);
109 		}
110 	}
111 }
112