1 /*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dce110/dce110_hw_sequencer.h"
27 #include "dcn10/dcn10_hw_sequencer.h"
28 #include "dcn20/dcn20_hwseq.h"
29 #include "dcn201_hwseq.h"
30
31 static const struct hw_sequencer_funcs dcn201_funcs = {
32 .program_gamut_remap = dcn10_program_gamut_remap,
33 .init_hw = dcn201_init_hw,
34 .power_down_on_boot = NULL,
35 .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
36 .apply_ctx_for_surface = NULL,
37 .program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
38 .wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
39 .post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
40 .update_plane_addr = dcn201_update_plane_addr,
41 .update_dchub = dcn10_update_dchub,
42 .update_pending_status = dcn10_update_pending_status,
43 .program_output_csc = dcn20_program_output_csc,
44 .enable_accelerated_mode = dce110_enable_accelerated_mode,
45 .enable_timing_synchronization = dcn10_enable_timing_synchronization,
46 .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
47 .update_info_frame = dce110_update_info_frame,
48 .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
49 .enable_stream = dce110_enable_stream,
50 .disable_stream = dce110_disable_stream,
51 .unblank_stream = dcn201_unblank_stream,
52 .blank_stream = dce110_blank_stream,
53 .enable_audio_stream = dce110_enable_audio_stream,
54 .disable_audio_stream = dce110_disable_audio_stream,
55 .disable_plane = dcn10_disable_plane,
56 .pipe_control_lock = dcn201_pipe_control_lock,
57 .interdependent_update_lock = dcn10_lock_all_pipes,
58 .cursor_lock = dcn10_cursor_lock,
59 .prepare_bandwidth = dcn20_prepare_bandwidth,
60 .optimize_bandwidth = dcn20_optimize_bandwidth,
61 .update_bandwidth = dcn20_update_bandwidth,
62 .set_drr = dcn10_set_drr,
63 .get_position = dcn10_get_position,
64 .set_static_screen_control = dcn10_set_static_screen_control,
65 .setup_stereo = dcn10_setup_stereo,
66 .set_avmute = dce110_set_avmute,
67 .log_hw_state = dcn10_log_hw_state,
68 .get_hw_state = dcn10_get_hw_state,
69 .clear_status_bits = dcn10_clear_status_bits,
70 .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
71 .edp_backlight_control = dce110_edp_backlight_control,
72 .edp_power_control = dce110_edp_power_control,
73 .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
74 .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
75 .set_clock = dcn10_set_clock,
76 .get_clock = dcn10_get_clock,
77 .program_triplebuffer = dcn20_program_triple_buffer,
78 .dmdata_status_done = dcn20_dmdata_status_done,
79 .set_dmdata_attributes = dcn201_set_dmdata_attributes,
80 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
81 .calc_vupdate_position = dcn10_calc_vupdate_position,
82 .set_cursor_position = dcn10_set_cursor_position,
83 .set_cursor_attribute = dcn201_set_cursor_attribute,
84 .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
85 .set_backlight_level = dce110_set_backlight_level,
86 .set_abm_immediate_disable = dce110_set_abm_immediate_disable,
87 .set_pipe = dce110_set_pipe,
88 .set_disp_pattern_generator = dcn20_set_disp_pattern_generator,
89 .update_visual_confirm_color = dcn20_update_visual_confirm_color,
90 };
91
92 static const struct hwseq_private_funcs dcn201_private_funcs = {
93 .init_pipes = NULL,
94 .update_plane_addr = dcn201_update_plane_addr,
95 .plane_atomic_disconnect = dcn201_plane_atomic_disconnect,
96 .program_pipe = dcn10_program_pipe,
97 .update_mpcc = dcn201_update_mpcc,
98 .set_input_transfer_func = dcn20_set_input_transfer_func,
99 .set_output_transfer_func = dcn20_set_output_transfer_func,
100 .power_down = dce110_power_down,
101 .enable_display_power_gating = dcn10_dummy_display_power_gating,
102 .blank_pixel_data = dcn20_blank_pixel_data,
103 .reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
104 .enable_stream_timing = dcn20_enable_stream_timing,
105 .edp_backlight_control = dce110_edp_backlight_control,
106 .disable_stream_gating = NULL,
107 .enable_stream_gating = NULL,
108 .setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
109 .did_underflow_occur = dcn10_did_underflow_occur,
110 .init_blank = dcn201_init_blank,
111 .disable_vga = dcn10_disable_vga,
112 .bios_golden_init = dcn10_bios_golden_init,
113 .plane_atomic_disable = dcn10_plane_atomic_disable,
114 .plane_atomic_power_down = dcn10_plane_atomic_power_down,
115 .enable_power_gating_plane = dcn10_enable_power_gating_plane,
116 .dpp_pg_control = dcn10_dpp_pg_control,
117 .hubp_pg_control = dcn10_hubp_pg_control,
118 .dsc_pg_control = NULL,
119 .set_hdr_multiplier = dcn10_set_hdr_multiplier,
120 .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
121 .wait_for_blank_complete = dcn20_wait_for_blank_complete,
122 .dccg_init = dcn20_dccg_init,
123 .set_blend_lut = dcn20_set_blend_lut,
124 .set_shaper_3dlut = dcn20_set_shaper_3dlut,
125 };
126
dcn201_hw_sequencer_construct(struct dc * dc)127 void dcn201_hw_sequencer_construct(struct dc *dc)
128 {
129 dc->hwss = dcn201_funcs;
130 dc->hwseq->funcs = dcn201_private_funcs;
131 }
132