1 /*
2  * Copyright 2020 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef __SMU_CMN_H__
24 #define __SMU_CMN_H__
25 
26 #include "amdgpu_smu.h"
27 
28 #if defined(SWSMU_CODE_LAYER_L2) || defined(SWSMU_CODE_LAYER_L3) || defined(SWSMU_CODE_LAYER_L4)
29 int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
30 				     uint16_t msg_index,
31 				     uint32_t param);
32 int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
33 				    enum smu_message_type msg,
34 				    uint32_t param,
35 				    uint32_t *read_arg);
36 
37 int smu_cmn_send_smc_msg(struct smu_context *smu,
38 			 enum smu_message_type msg,
39 			 uint32_t *read_arg);
40 
41 int smu_cmn_wait_for_response(struct smu_context *smu);
42 
43 int smu_cmn_to_asic_specific_index(struct smu_context *smu,
44 				   enum smu_cmn2asic_mapping_type type,
45 				   uint32_t index);
46 
47 int smu_cmn_feature_is_supported(struct smu_context *smu,
48 				 enum smu_feature_mask mask);
49 
50 int smu_cmn_feature_is_enabled(struct smu_context *smu,
51 			       enum smu_feature_mask mask);
52 
53 bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,
54 				enum smu_clk_type clk_type);
55 
56 int smu_cmn_get_enabled_mask(struct smu_context *smu,
57 			     uint32_t *feature_mask,
58 			     uint32_t num);
59 
60 int smu_cmn_get_enabled_32_bits_mask(struct smu_context *smu,
61 					uint32_t *feature_mask,
62 					uint32_t num);
63 
64 uint64_t smu_cmn_get_indep_throttler_status(
65 					const unsigned long dep_status,
66 					const uint8_t *throttler_map);
67 
68 int smu_cmn_feature_update_enable_state(struct smu_context *smu,
69 					uint64_t feature_mask,
70 					bool enabled);
71 
72 int smu_cmn_feature_set_enabled(struct smu_context *smu,
73 				enum smu_feature_mask mask,
74 				bool enable);
75 
76 size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
77 				   char *buf);
78 
79 int smu_cmn_set_pp_feature_mask(struct smu_context *smu,
80 				uint64_t new_mask);
81 
82 int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,
83 						bool no_hw_disablement,
84 						enum smu_feature_mask mask);
85 
86 int smu_cmn_get_smc_version(struct smu_context *smu,
87 			    uint32_t *if_version,
88 			    uint32_t *smu_version);
89 
90 int smu_cmn_update_table(struct smu_context *smu,
91 			 enum smu_table_id table_index,
92 			 int argument,
93 			 void *table_data,
94 			 bool drv2smu);
95 
96 int smu_cmn_write_watermarks_table(struct smu_context *smu);
97 
98 int smu_cmn_write_pptable(struct smu_context *smu);
99 
100 int smu_cmn_get_metrics_table_locked(struct smu_context *smu,
101 				     void *metrics_table,
102 				     bool bypass_cache);
103 
104 int smu_cmn_get_metrics_table(struct smu_context *smu,
105 			      void *metrics_table,
106 			      bool bypass_cache);
107 
108 void smu_cmn_init_soft_gpu_metrics(void *table, uint8_t frev, uint8_t crev);
109 
110 int smu_cmn_set_mp1_state(struct smu_context *smu,
111 			  enum pp_mp1_state mp1_state);
112 
113 /*
114  * Helper function to make sysfs_emit_at() happy. Align buf to
115  * the current page boundary and record the offset.
116  */
smu_cmn_get_sysfs_buf(char ** buf,int * offset)117 static inline void smu_cmn_get_sysfs_buf(char **buf, int *offset)
118 {
119 	if (!*buf || !offset)
120 		return;
121 
122 	*offset = offset_in_page(*buf);
123 	*buf -= *offset;
124 }
125 
126 bool smu_cmn_is_audio_func_enabled(struct amdgpu_device *adev);
127 
128 #endif
129 #endif
130