1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2013 Red Hat 5 * Author: Rob Clark <robdclark@gmail.com> 6 */ 7 8 #ifndef _DPU_PLANE_H_ 9 #define _DPU_PLANE_H_ 10 11 #include <drm/drm_crtc.h> 12 13 #include "dpu_kms.h" 14 #include "dpu_hw_mdss.h" 15 #include "dpu_hw_sspp.h" 16 17 /** 18 * struct dpu_plane_state: Define dpu extension of drm plane state object 19 * @base: base drm plane state object 20 * @aspace: pointer to address space for input/output buffers 21 * @stage: assigned by crtc blender 22 * @needs_qos_remap: qos remap settings need to be updated 23 * @multirect_index: index of the rectangle of SSPP 24 * @multirect_mode: parallel or time multiplex multirect mode 25 * @pending: whether the current update is still pending 26 * @scaler3_cfg: configuration data for scaler3 27 * @pixel_ext: configuration data for pixel extensions 28 * @cdp_cfg: CDP configuration 29 * @plane_fetch_bw: calculated BW per plane 30 * @plane_clk: calculated clk per plane 31 */ 32 struct dpu_plane_state { 33 struct drm_plane_state base; 34 struct msm_gem_address_space *aspace; 35 enum dpu_stage stage; 36 bool needs_qos_remap; 37 uint32_t multirect_index; 38 uint32_t multirect_mode; 39 bool pending; 40 41 /* scaler configuration */ 42 struct dpu_hw_scaler3_cfg scaler3_cfg; 43 struct dpu_hw_pixel_ext pixel_ext; 44 45 struct dpu_hw_pipe_cdp_cfg cdp_cfg; 46 u64 plane_fetch_bw; 47 u64 plane_clk; 48 }; 49 50 /** 51 * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states 52 * @r0: drm plane configured on rect 0 53 * @r1: drm plane configured on rect 1 54 */ 55 struct dpu_multirect_plane_states { 56 const struct drm_plane_state *r0; 57 const struct drm_plane_state *r1; 58 }; 59 60 #define to_dpu_plane_state(x) \ 61 container_of(x, struct dpu_plane_state, base) 62 63 /** 64 * dpu_plane_pipe - return sspp identifier for the given plane 65 * @plane: Pointer to DRM plane object 66 * Returns: sspp identifier of the given plane 67 */ 68 enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane); 69 70 /** 71 * is_dpu_plane_virtual - check for virtual plane 72 * @plane: Pointer to DRM plane object 73 * returns: true - if the plane is virtual 74 * false - if the plane is primary 75 */ 76 bool is_dpu_plane_virtual(struct drm_plane *plane); 77 78 /** 79 * dpu_plane_get_ctl_flush - get control flush mask 80 * @plane: Pointer to DRM plane object 81 * @ctl: Pointer to control hardware 82 * @flush_sspp: Pointer to sspp flush control word 83 */ 84 void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl, 85 u32 *flush_sspp); 86 87 /** 88 * dpu_plane_flush - final plane operations before commit flush 89 * @plane: Pointer to drm plane structure 90 */ 91 void dpu_plane_flush(struct drm_plane *plane); 92 93 /** 94 * dpu_plane_set_error: enable/disable error condition 95 * @plane: pointer to drm_plane structure 96 */ 97 void dpu_plane_set_error(struct drm_plane *plane, bool error); 98 99 /** 100 * dpu_plane_init - create new dpu plane for the given pipe 101 * @dev: Pointer to DRM device 102 * @pipe: dpu hardware pipe identifier 103 * @type: Plane type - PRIMARY/OVERLAY/CURSOR 104 * @possible_crtcs: bitmask of crtc that can be attached to the given pipe 105 * @master_plane_id: primary plane id of a multirect pipe. 0 value passed for 106 * a regular plane initialization. A non-zero primary plane 107 * id will be passed for a virtual pipe initialization. 108 * 109 */ 110 struct drm_plane *dpu_plane_init(struct drm_device *dev, 111 uint32_t pipe, enum drm_plane_type type, 112 unsigned long possible_crtcs, u32 master_plane_id); 113 114 /** 115 * dpu_plane_validate_multirecti_v2 - validate the multirect planes 116 * against hw limitations 117 * @plane: drm plate states of the multirect pair 118 */ 119 int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane); 120 121 /** 122 * dpu_plane_clear_multirect - clear multirect bits for the given pipe 123 * @drm_state: Pointer to DRM plane state 124 */ 125 void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state); 126 127 /** 128 * dpu_plane_color_fill - enables color fill on plane 129 * @plane: Pointer to DRM plane object 130 * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red 131 * @alpha: 8-bit fill alpha value, 255 selects 100% alpha 132 * Returns: 0 on success 133 */ 134 int dpu_plane_color_fill(struct drm_plane *plane, 135 uint32_t color, uint32_t alpha); 136 137 #endif /* _DPU_PLANE_H_ */ 138