1 /*
2  * Copyright 2016 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "ctxgf100.h"
25 
26 #include <subdev/fb.h>
27 
28 /*******************************************************************************
29  * PGRAPH context implementation
30  ******************************************************************************/
31 
32 static void
gp102_grctx_generate_r408840(struct gf100_gr * gr)33 gp102_grctx_generate_r408840(struct gf100_gr *gr)
34 {
35 	struct nvkm_device *device = gr->base.engine.subdev.device;
36 	nvkm_mask(device, 0x408840, 0x00000003, 0x00000000);
37 }
38 
39 void
gp102_grctx_generate_attrib(struct gf100_grctx * info)40 gp102_grctx_generate_attrib(struct gf100_grctx *info)
41 {
42 	struct gf100_gr *gr = info->gr;
43 	const struct gf100_grctx_func *grctx = gr->func->grctx;
44 	const u32  alpha = grctx->alpha_nr;
45 	const u32 attrib = grctx->attrib_nr;
46 	const u32   gfxp = grctx->gfxp_nr;
47 	const int s = 12;
48 	const int max_batches = 0xffff;
49 	u32 size = grctx->alpha_nr_max * gr->tpc_total;
50 	u32 ao = 0;
51 	u32 bo = ao + size;
52 	int gpc, ppc, b, n = 0;
53 
54 	for (gpc = 0; gpc < gr->gpc_nr; gpc++)
55 		size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max;
56 	size = ((size * 0x20) + 128) & ~127;
57 	b = mmio_vram(info, size, (1 << s), false);
58 
59 	mmio_refn(info, 0x418810, 0x80000000, s, b);
60 	mmio_refn(info, 0x419848, 0x10000000, s, b);
61 	mmio_refn(info, 0x419c2c, 0x10000000, s, b);
62 	mmio_refn(info, 0x419b00, 0x00000000, s, b);
63 	mmio_wr32(info, 0x419b04, 0x80000000 | size >> 7);
64 	mmio_wr32(info, 0x405830, attrib);
65 	mmio_wr32(info, 0x40585c, alpha);
66 	mmio_wr32(info, 0x4064c4, ((alpha / 4) << 16) | max_batches);
67 
68 	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
69 		for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) {
70 			const u32 as =  alpha * gr->ppc_tpc_nr[gpc][ppc];
71 			const u32 bs = attrib * gr->ppc_tpc_max;
72 			const u32 gs =   gfxp * gr->ppc_tpc_max;
73 			const u32 u = 0x418ea0 + (n * 0x04);
74 			const u32 o = PPC_UNIT(gpc, ppc, 0);
75 			const u32 p = GPC_UNIT(gpc, 0xc44 + (ppc * 4));
76 			if (!(gr->ppc_mask[gpc] & (1 << ppc)))
77 				continue;
78 			mmio_wr32(info, o + 0xc0, gs);
79 			mmio_wr32(info, p, bs);
80 			mmio_wr32(info, o + 0xf4, bo);
81 			mmio_wr32(info, o + 0xf0, bs);
82 			bo += gs;
83 			mmio_wr32(info, o + 0xe4, as);
84 			mmio_wr32(info, o + 0xf8, ao);
85 			ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc];
86 			mmio_wr32(info, u, bs);
87 		}
88 	}
89 
90 	mmio_wr32(info, 0x4181e4, 0x00000100);
91 	mmio_wr32(info, 0x41befc, 0x00000100);
92 }
93 
94 const struct gf100_grctx_func
95 gp102_grctx = {
96 	.main = gf100_grctx_generate_main,
97 	.unkn = gk104_grctx_generate_unkn,
98 	.bundle = gm107_grctx_generate_bundle,
99 	.bundle_size = 0x3000,
100 	.bundle_min_gpm_fifo_depth = 0x180,
101 	.bundle_token_limit = 0x900,
102 	.pagepool = gp100_grctx_generate_pagepool,
103 	.pagepool_size = 0x20000,
104 	.attrib = gp102_grctx_generate_attrib,
105 	.attrib_nr_max = 0x4b0,
106 	.attrib_nr = 0x320,
107 	.alpha_nr_max = 0xc00,
108 	.alpha_nr = 0x800,
109 	.gfxp_nr = 0xba8,
110 	.sm_id = gm107_grctx_generate_sm_id,
111 	.rop_mapping = gf117_grctx_generate_rop_mapping,
112 	.dist_skip_table = gm200_grctx_generate_dist_skip_table,
113 	.r406500 = gm200_grctx_generate_r406500,
114 	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
115 	.tpc_mask = gm200_grctx_generate_tpc_mask,
116 	.smid_config = gp100_grctx_generate_smid_config,
117 	.r419a3c = gm200_grctx_generate_r419a3c,
118 	.r408840 = gp102_grctx_generate_r408840,
119 };
120