1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
4  *
5  * Description: CoreSight Trace Port Interface Unit driver
6  */
7 
8 #include <linux/atomic.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/err.h>
14 #include <linux/slab.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/coresight.h>
17 #include <linux/amba/bus.h>
18 #include <linux/clk.h>
19 
20 #include "coresight-priv.h"
21 
22 #define TPIU_SUPP_PORTSZ	0x000
23 #define TPIU_CURR_PORTSZ	0x004
24 #define TPIU_SUPP_TRIGMODES	0x100
25 #define TPIU_TRIG_CNTRVAL	0x104
26 #define TPIU_TRIG_MULT		0x108
27 #define TPIU_SUPP_TESTPATM	0x200
28 #define TPIU_CURR_TESTPATM	0x204
29 #define TPIU_TEST_PATREPCNTR	0x208
30 #define TPIU_FFSR		0x300
31 #define TPIU_FFCR		0x304
32 #define TPIU_FSYNC_CNTR		0x308
33 #define TPIU_EXTCTL_INPORT	0x400
34 #define TPIU_EXTCTL_OUTPORT	0x404
35 #define TPIU_ITTRFLINACK	0xee4
36 #define TPIU_ITTRFLIN		0xee8
37 #define TPIU_ITATBDATA0		0xeec
38 #define TPIU_ITATBCTR2		0xef0
39 #define TPIU_ITATBCTR1		0xef4
40 #define TPIU_ITATBCTR0		0xef8
41 
42 /** register definition **/
43 /* FFSR - 0x300 */
44 #define FFSR_FT_STOPPED_BIT	1
45 /* FFCR - 0x304 */
46 #define FFCR_FON_MAN_BIT	6
47 #define FFCR_FON_MAN		BIT(6)
48 #define FFCR_STOP_FI		BIT(12)
49 
50 DEFINE_CORESIGHT_DEVLIST(tpiu_devs, "tpiu");
51 
52 /*
53  * @base:	memory mapped base address for this component.
54  * @atclk:	optional clock for the core parts of the TPIU.
55  * @csdev:	component vitals needed by the framework.
56  */
57 struct tpiu_drvdata {
58 	void __iomem		*base;
59 	struct clk		*atclk;
60 	struct coresight_device	*csdev;
61 };
62 
tpiu_enable_hw(struct csdev_access * csa)63 static void tpiu_enable_hw(struct csdev_access *csa)
64 {
65 	CS_UNLOCK(csa->base);
66 
67 	/* TODO: fill this up */
68 
69 	CS_LOCK(csa->base);
70 }
71 
tpiu_enable(struct coresight_device * csdev,u32 mode,void * __unused)72 static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused)
73 {
74 	tpiu_enable_hw(&csdev->access);
75 	atomic_inc(csdev->refcnt);
76 	dev_dbg(&csdev->dev, "TPIU enabled\n");
77 	return 0;
78 }
79 
tpiu_disable_hw(struct csdev_access * csa)80 static void tpiu_disable_hw(struct csdev_access *csa)
81 {
82 	CS_UNLOCK(csa->base);
83 
84 	/* Clear formatter and stop on flush */
85 	csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR);
86 	/* Generate manual flush */
87 	csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR);
88 	/* Wait for flush to complete */
89 	coresight_timeout(csa, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
90 	/* Wait for formatter to stop */
91 	coresight_timeout(csa, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
92 
93 	CS_LOCK(csa->base);
94 }
95 
tpiu_disable(struct coresight_device * csdev)96 static int tpiu_disable(struct coresight_device *csdev)
97 {
98 	if (atomic_dec_return(csdev->refcnt))
99 		return -EBUSY;
100 
101 	tpiu_disable_hw(&csdev->access);
102 
103 	dev_dbg(&csdev->dev, "TPIU disabled\n");
104 	return 0;
105 }
106 
107 static const struct coresight_ops_sink tpiu_sink_ops = {
108 	.enable		= tpiu_enable,
109 	.disable	= tpiu_disable,
110 };
111 
112 static const struct coresight_ops tpiu_cs_ops = {
113 	.sink_ops	= &tpiu_sink_ops,
114 };
115 
tpiu_probe(struct amba_device * adev,const struct amba_id * id)116 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
117 {
118 	int ret;
119 	void __iomem *base;
120 	struct device *dev = &adev->dev;
121 	struct coresight_platform_data *pdata = NULL;
122 	struct tpiu_drvdata *drvdata;
123 	struct resource *res = &adev->res;
124 	struct coresight_desc desc = { 0 };
125 
126 	desc.name = coresight_alloc_device_name(&tpiu_devs, dev);
127 	if (!desc.name)
128 		return -ENOMEM;
129 
130 	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
131 	if (!drvdata)
132 		return -ENOMEM;
133 
134 	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
135 	if (!IS_ERR(drvdata->atclk)) {
136 		ret = clk_prepare_enable(drvdata->atclk);
137 		if (ret)
138 			return ret;
139 	}
140 	dev_set_drvdata(dev, drvdata);
141 
142 	/* Validity for the resource is already checked by the AMBA core */
143 	base = devm_ioremap_resource(dev, res);
144 	if (IS_ERR(base))
145 		return PTR_ERR(base);
146 
147 	drvdata->base = base;
148 	desc.access = CSDEV_ACCESS_IOMEM(base);
149 
150 	/* Disable tpiu to support older devices */
151 	tpiu_disable_hw(&desc.access);
152 
153 	pdata = coresight_get_platform_data(dev);
154 	if (IS_ERR(pdata))
155 		return PTR_ERR(pdata);
156 	dev->platform_data = pdata;
157 
158 	desc.type = CORESIGHT_DEV_TYPE_SINK;
159 	desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
160 	desc.ops = &tpiu_cs_ops;
161 	desc.pdata = pdata;
162 	desc.dev = dev;
163 	drvdata->csdev = coresight_register(&desc);
164 
165 	if (!IS_ERR(drvdata->csdev)) {
166 		pm_runtime_put(&adev->dev);
167 		return 0;
168 	}
169 
170 	return PTR_ERR(drvdata->csdev);
171 }
172 
tpiu_remove(struct amba_device * adev)173 static void tpiu_remove(struct amba_device *adev)
174 {
175 	struct tpiu_drvdata *drvdata = dev_get_drvdata(&adev->dev);
176 
177 	coresight_unregister(drvdata->csdev);
178 }
179 
180 #ifdef CONFIG_PM
tpiu_runtime_suspend(struct device * dev)181 static int tpiu_runtime_suspend(struct device *dev)
182 {
183 	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
184 
185 	if (drvdata && !IS_ERR(drvdata->atclk))
186 		clk_disable_unprepare(drvdata->atclk);
187 
188 	return 0;
189 }
190 
tpiu_runtime_resume(struct device * dev)191 static int tpiu_runtime_resume(struct device *dev)
192 {
193 	struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
194 
195 	if (drvdata && !IS_ERR(drvdata->atclk))
196 		clk_prepare_enable(drvdata->atclk);
197 
198 	return 0;
199 }
200 #endif
201 
202 static const struct dev_pm_ops tpiu_dev_pm_ops = {
203 	SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
204 };
205 
206 static const struct amba_id tpiu_ids[] = {
207 	{
208 		.id	= 0x000bb912,
209 		.mask	= 0x000fffff,
210 	},
211 	{
212 		.id	= 0x0004b912,
213 		.mask	= 0x0007ffff,
214 	},
215 	{
216 		/* Coresight SoC-600 */
217 		.id	= 0x000bb9e7,
218 		.mask	= 0x000fffff,
219 	},
220 	{ 0, 0},
221 };
222 
223 MODULE_DEVICE_TABLE(amba, tpiu_ids);
224 
225 static struct amba_driver tpiu_driver = {
226 	.drv = {
227 		.name	= "coresight-tpiu",
228 		.owner	= THIS_MODULE,
229 		.pm	= &tpiu_dev_pm_ops,
230 		.suppress_bind_attrs = true,
231 	},
232 	.probe		= tpiu_probe,
233 	.remove         = tpiu_remove,
234 	.id_table	= tpiu_ids,
235 };
236 
237 module_amba_driver(tpiu_driver);
238 
239 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
240 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
241 MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver");
242 MODULE_LICENSE("GPL v2");
243