1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe"
4  * multifunction chip.  Currently works with the Omnivision OV7670
5  * sensor.
6  *
7  * The data sheet for this device can be found at:
8  *    http://wiki.laptop.org/images/5/5c/88ALP01_Datasheet_July_2007.pdf
9  *
10  * Copyright 2006-11 One Laptop Per Child Association, Inc.
11  * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net>
12  * Copyright 2018 Lubomir Rintel <lkundrak@v3.sk>
13  *
14  * Written by Jonathan Corbet, corbet@lwn.net.
15  *
16  * v4l2_device/v4l2_subdev conversion by:
17  * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl>
18  */
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
25 #include <linux/spinlock.h>
26 #include <linux/slab.h>
27 #include <linux/videodev2.h>
28 #include <media/v4l2-device.h>
29 #include <media/i2c/ov7670.h>
30 #include <linux/device.h>
31 #include <linux/wait.h>
32 #include <linux/delay.h>
33 #include <linux/io.h>
34 #include <linux/clkdev.h>
35 
36 #include "mcam-core.h"
37 
38 #define CAFE_VERSION 0x000002
39 
40 
41 /*
42  * Parameters.
43  */
44 MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
45 MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");
46 MODULE_LICENSE("GPL");
47 
48 struct cafe_camera {
49 	int registered;			/* Fully initialized? */
50 	struct mcam_camera mcam;
51 	struct pci_dev *pdev;
52 	struct i2c_adapter *i2c_adapter;
53 	wait_queue_head_t smbus_wait;	/* Waiting on i2c events */
54 };
55 
56 /*
57  * Most of the camera controller registers are defined in mcam-core.h,
58  * but the Cafe platform has some additional registers of its own;
59  * they are described here.
60  */
61 
62 /*
63  * "General purpose register" has a couple of GPIOs used for sensor
64  * power and reset on OLPC XO 1.0 systems.
65  */
66 #define REG_GPR		0xb4
67 #define	  GPR_C1EN	  0x00000020	/* Pad 1 (power down) enable */
68 #define	  GPR_C0EN	  0x00000010	/* Pad 0 (reset) enable */
69 #define	  GPR_C1	  0x00000002	/* Control 1 value */
70 /*
71  * Control 0 is wired to reset on OLPC machines.  For ov7x sensors,
72  * it is active low.
73  */
74 #define	  GPR_C0	  0x00000001	/* Control 0 value */
75 
76 /*
77  * These registers control the SMBUS module for communicating
78  * with the sensor.
79  */
80 #define REG_TWSIC0	0xb8	/* TWSI (smbus) control 0 */
81 #define	  TWSIC0_EN	  0x00000001	/* TWSI enable */
82 #define	  TWSIC0_MODE	  0x00000002	/* 1 = 16-bit, 0 = 8-bit */
83 #define	  TWSIC0_SID	  0x000003fc	/* Slave ID */
84 /*
85  * Subtle trickery: the slave ID field starts with bit 2.  But the
86  * Linux i2c stack wants to treat the bottommost bit as a separate
87  * read/write bit, which is why slave ID's are usually presented
88  * >>1.  For consistency with that behavior, we shift over three
89  * bits instead of two.
90  */
91 #define	  TWSIC0_SID_SHIFT 3
92 #define	  TWSIC0_CLKDIV	  0x0007fc00	/* Clock divider */
93 #define	  TWSIC0_MASKACK  0x00400000	/* Mask ack from sensor */
94 #define	  TWSIC0_OVMAGIC  0x00800000	/* Make it work on OV sensors */
95 
96 #define REG_TWSIC1	0xbc	/* TWSI control 1 */
97 #define	  TWSIC1_DATA	  0x0000ffff	/* Data to/from camchip */
98 #define	  TWSIC1_ADDR	  0x00ff0000	/* Address (register) */
99 #define	  TWSIC1_ADDR_SHIFT 16
100 #define	  TWSIC1_READ	  0x01000000	/* Set for read op */
101 #define	  TWSIC1_WSTAT	  0x02000000	/* Write status */
102 #define	  TWSIC1_RVALID	  0x04000000	/* Read data valid */
103 #define	  TWSIC1_ERROR	  0x08000000	/* Something screwed up */
104 
105 /*
106  * Here's the weird global control registers
107  */
108 #define REG_GL_CSR     0x3004  /* Control/status register */
109 #define	  GCSR_SRS	 0x00000001	/* SW Reset set */
110 #define	  GCSR_SRC	 0x00000002	/* SW Reset clear */
111 #define	  GCSR_MRS	 0x00000004	/* Master reset set */
112 #define	  GCSR_MRC	 0x00000008	/* HW Reset clear */
113 #define	  GCSR_CCIC_EN	 0x00004000    /* CCIC Clock enable */
114 #define REG_GL_IMASK   0x300c  /* Interrupt mask register */
115 #define	  GIMSK_CCIC_EN		 0x00000004    /* CCIC Interrupt enable */
116 
117 #define REG_GL_FCR	0x3038	/* GPIO functional control register */
118 #define	  GFCR_GPIO_ON	  0x08		/* Camera GPIO enabled */
119 #define REG_GL_GPIOR	0x315c	/* GPIO register */
120 #define	  GGPIO_OUT		0x80000	/* GPIO output */
121 #define	  GGPIO_VAL		0x00008	/* Output pin value */
122 
123 #define REG_LEN		       (REG_GL_IMASK + 4)
124 
125 
126 /*
127  * Debugging and related.
128  */
129 #define cam_err(cam, fmt, arg...) \
130 	dev_err(&(cam)->pdev->dev, fmt, ##arg);
131 #define cam_warn(cam, fmt, arg...) \
132 	dev_warn(&(cam)->pdev->dev, fmt, ##arg);
133 
134 /* -------------------------------------------------------------------- */
135 /*
136  * The I2C/SMBUS interface to the camera itself starts here.  The
137  * controller handles SMBUS itself, presenting a relatively simple register
138  * interface; all we have to do is to tell it where to route the data.
139  */
140 #define CAFE_SMBUS_TIMEOUT (HZ)  /* generous */
141 
to_cam(struct v4l2_device * dev)142 static inline struct cafe_camera *to_cam(struct v4l2_device *dev)
143 {
144 	struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev);
145 	return container_of(m, struct cafe_camera, mcam);
146 }
147 
148 
cafe_smbus_write_done(struct mcam_camera * mcam)149 static int cafe_smbus_write_done(struct mcam_camera *mcam)
150 {
151 	unsigned long flags;
152 	int c1;
153 
154 	/*
155 	 * We must delay after the interrupt, or the controller gets confused
156 	 * and never does give us good status.  Fortunately, we don't do this
157 	 * often.
158 	 */
159 	udelay(20);
160 	spin_lock_irqsave(&mcam->dev_lock, flags);
161 	c1 = mcam_reg_read(mcam, REG_TWSIC1);
162 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
163 	return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;
164 }
165 
cafe_smbus_write_data(struct cafe_camera * cam,u16 addr,u8 command,u8 value)166 static int cafe_smbus_write_data(struct cafe_camera *cam,
167 		u16 addr, u8 command, u8 value)
168 {
169 	unsigned int rval;
170 	unsigned long flags;
171 	struct mcam_camera *mcam = &cam->mcam;
172 
173 	spin_lock_irqsave(&mcam->dev_lock, flags);
174 	rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
175 	rval |= TWSIC0_OVMAGIC;  /* Make OV sensors work */
176 	/*
177 	 * Marvell sez set clkdiv to all 1's for now.
178 	 */
179 	rval |= TWSIC0_CLKDIV;
180 	mcam_reg_write(mcam, REG_TWSIC0, rval);
181 	(void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
182 	rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
183 	mcam_reg_write(mcam, REG_TWSIC1, rval);
184 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
185 
186 	/* Unfortunately, reading TWSIC1 too soon after sending a command
187 	 * causes the device to die.
188 	 * Use a busy-wait because we often send a large quantity of small
189 	 * commands at-once; using msleep() would cause a lot of context
190 	 * switches which take longer than 2ms, resulting in a noticeable
191 	 * boot-time and capture-start delays.
192 	 */
193 	mdelay(2);
194 
195 	/*
196 	 * Another sad fact is that sometimes, commands silently complete but
197 	 * cafe_smbus_write_done() never becomes aware of this.
198 	 * This happens at random and appears to possible occur with any
199 	 * command.
200 	 * We don't understand why this is. We work around this issue
201 	 * with the timeout in the wait below, assuming that all commands
202 	 * complete within the timeout.
203 	 */
204 	wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam),
205 			CAFE_SMBUS_TIMEOUT);
206 
207 	spin_lock_irqsave(&mcam->dev_lock, flags);
208 	rval = mcam_reg_read(mcam, REG_TWSIC1);
209 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
210 
211 	if (rval & TWSIC1_WSTAT) {
212 		cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,
213 				command, value);
214 		return -EIO;
215 	}
216 	if (rval & TWSIC1_ERROR) {
217 		cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,
218 				command, value);
219 		return -EIO;
220 	}
221 	return 0;
222 }
223 
224 
225 
cafe_smbus_read_done(struct mcam_camera * mcam)226 static int cafe_smbus_read_done(struct mcam_camera *mcam)
227 {
228 	unsigned long flags;
229 	int c1;
230 
231 	/*
232 	 * We must delay after the interrupt, or the controller gets confused
233 	 * and never does give us good status.  Fortunately, we don't do this
234 	 * often.
235 	 */
236 	udelay(20);
237 	spin_lock_irqsave(&mcam->dev_lock, flags);
238 	c1 = mcam_reg_read(mcam, REG_TWSIC1);
239 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
240 	return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);
241 }
242 
243 
244 
cafe_smbus_read_data(struct cafe_camera * cam,u16 addr,u8 command,u8 * value)245 static int cafe_smbus_read_data(struct cafe_camera *cam,
246 		u16 addr, u8 command, u8 *value)
247 {
248 	unsigned int rval;
249 	unsigned long flags;
250 	struct mcam_camera *mcam = &cam->mcam;
251 
252 	spin_lock_irqsave(&mcam->dev_lock, flags);
253 	rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);
254 	rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */
255 	/*
256 	 * Marvel sez set clkdiv to all 1's for now.
257 	 */
258 	rval |= TWSIC0_CLKDIV;
259 	mcam_reg_write(mcam, REG_TWSIC0, rval);
260 	(void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */
261 	rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);
262 	mcam_reg_write(mcam, REG_TWSIC1, rval);
263 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
264 
265 	wait_event_timeout(cam->smbus_wait,
266 			cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT);
267 	spin_lock_irqsave(&mcam->dev_lock, flags);
268 	rval = mcam_reg_read(mcam, REG_TWSIC1);
269 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
270 
271 	if (rval & TWSIC1_ERROR) {
272 		cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);
273 		return -EIO;
274 	}
275 	if (!(rval & TWSIC1_RVALID)) {
276 		cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,
277 				command);
278 		return -EIO;
279 	}
280 	*value = rval & 0xff;
281 	return 0;
282 }
283 
284 /*
285  * Perform a transfer over SMBUS.  This thing is called under
286  * the i2c bus lock, so we shouldn't race with ourselves...
287  */
cafe_smbus_xfer(struct i2c_adapter * adapter,u16 addr,unsigned short flags,char rw,u8 command,int size,union i2c_smbus_data * data)288 static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
289 		unsigned short flags, char rw, u8 command,
290 		int size, union i2c_smbus_data *data)
291 {
292 	struct cafe_camera *cam = i2c_get_adapdata(adapter);
293 	int ret = -EINVAL;
294 
295 	/*
296 	 * This interface would appear to only do byte data ops.  OK
297 	 * it can do word too, but the cam chip has no use for that.
298 	 */
299 	if (size != I2C_SMBUS_BYTE_DATA) {
300 		cam_err(cam, "funky xfer size %d\n", size);
301 		return -EINVAL;
302 	}
303 
304 	if (rw == I2C_SMBUS_WRITE)
305 		ret = cafe_smbus_write_data(cam, addr, command, data->byte);
306 	else if (rw == I2C_SMBUS_READ)
307 		ret = cafe_smbus_read_data(cam, addr, command, &data->byte);
308 	return ret;
309 }
310 
311 
cafe_smbus_enable_irq(struct cafe_camera * cam)312 static void cafe_smbus_enable_irq(struct cafe_camera *cam)
313 {
314 	unsigned long flags;
315 
316 	spin_lock_irqsave(&cam->mcam.dev_lock, flags);
317 	mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS);
318 	spin_unlock_irqrestore(&cam->mcam.dev_lock, flags);
319 }
320 
cafe_smbus_func(struct i2c_adapter * adapter)321 static u32 cafe_smbus_func(struct i2c_adapter *adapter)
322 {
323 	return I2C_FUNC_SMBUS_READ_BYTE_DATA  |
324 	       I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
325 }
326 
327 static const struct i2c_algorithm cafe_smbus_algo = {
328 	.smbus_xfer = cafe_smbus_xfer,
329 	.functionality = cafe_smbus_func
330 };
331 
cafe_smbus_setup(struct cafe_camera * cam)332 static int cafe_smbus_setup(struct cafe_camera *cam)
333 {
334 	struct i2c_adapter *adap;
335 	int ret;
336 
337 	adap = kzalloc(sizeof(*adap), GFP_KERNEL);
338 	if (adap == NULL)
339 		return -ENOMEM;
340 	adap->owner = THIS_MODULE;
341 	adap->algo = &cafe_smbus_algo;
342 	strscpy(adap->name, "cafe_ccic", sizeof(adap->name));
343 	adap->dev.parent = &cam->pdev->dev;
344 	i2c_set_adapdata(adap, cam);
345 	ret = i2c_add_adapter(adap);
346 	if (ret) {
347 		printk(KERN_ERR "Unable to register cafe i2c adapter\n");
348 		kfree(adap);
349 		return ret;
350 	}
351 
352 	cam->i2c_adapter = adap;
353 	cafe_smbus_enable_irq(cam);
354 	return 0;
355 }
356 
cafe_smbus_shutdown(struct cafe_camera * cam)357 static void cafe_smbus_shutdown(struct cafe_camera *cam)
358 {
359 	i2c_del_adapter(cam->i2c_adapter);
360 	kfree(cam->i2c_adapter);
361 }
362 
363 
364 /*
365  * Controller-level stuff
366  */
367 
cafe_ctlr_init(struct mcam_camera * mcam)368 static void cafe_ctlr_init(struct mcam_camera *mcam)
369 {
370 	unsigned long flags;
371 
372 	spin_lock_irqsave(&mcam->dev_lock, flags);
373 	/*
374 	 * Added magic to bring up the hardware on the B-Test board
375 	 */
376 	mcam_reg_write(mcam, 0x3038, 0x8);
377 	mcam_reg_write(mcam, 0x315c, 0x80008);
378 	/*
379 	 * Go through the dance needed to wake the device up.
380 	 * Note that these registers are global and shared
381 	 * with the NAND and SD devices.  Interaction between the
382 	 * three still needs to be examined.
383 	 */
384 	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */
385 	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);
386 	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);
387 	/*
388 	 * Here we must wait a bit for the controller to come around.
389 	 */
390 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
391 	msleep(5);
392 	spin_lock_irqsave(&mcam->dev_lock, flags);
393 
394 	mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);
395 	mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN);
396 	/*
397 	 * Mask all interrupts.
398 	 */
399 	mcam_reg_write(mcam, REG_IRQMASK, 0);
400 	spin_unlock_irqrestore(&mcam->dev_lock, flags);
401 }
402 
403 
cafe_ctlr_power_up(struct mcam_camera * mcam)404 static int cafe_ctlr_power_up(struct mcam_camera *mcam)
405 {
406 	/*
407 	 * Part one of the sensor dance: turn the global
408 	 * GPIO signal on.
409 	 */
410 	mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
411 	mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);
412 	/*
413 	 * Put the sensor into operational mode (assumes OLPC-style
414 	 * wiring).  Control 0 is reset - set to 1 to operate.
415 	 * Control 1 is power down, set to 0 to operate.
416 	 */
417 	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */
418 	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);
419 
420 	return 0;
421 }
422 
cafe_ctlr_power_down(struct mcam_camera * mcam)423 static void cafe_ctlr_power_down(struct mcam_camera *mcam)
424 {
425 	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);
426 	mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);
427 	mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT);
428 }
429 
430 
431 
432 /*
433  * The platform interrupt handler.
434  */
cafe_irq(int irq,void * data)435 static irqreturn_t cafe_irq(int irq, void *data)
436 {
437 	struct cafe_camera *cam = data;
438 	struct mcam_camera *mcam = &cam->mcam;
439 	unsigned int irqs, handled;
440 
441 	spin_lock(&mcam->dev_lock);
442 	irqs = mcam_reg_read(mcam, REG_IRQSTAT);
443 	handled = cam->registered && mccic_irq(mcam, irqs);
444 	if (irqs & TWSIIRQS) {
445 		mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS);
446 		wake_up(&cam->smbus_wait);
447 		handled = 1;
448 	}
449 	spin_unlock(&mcam->dev_lock);
450 	return IRQ_RETVAL(handled);
451 }
452 
453 /* -------------------------------------------------------------------------- */
454 
455 static struct ov7670_config sensor_cfg = {
456 	/*
457 	 * Exclude QCIF mode, because it only captures a tiny portion
458 	 * of the sensor FOV
459 	 */
460 	.min_width = 320,
461 	.min_height = 240,
462 
463 	/*
464 	 * Set the clock speed for the XO 1; I don't believe this
465 	 * driver has ever run anywhere else.
466 	 */
467 	.clock_speed = 45,
468 	.use_smbus = 1,
469 };
470 
471 static struct i2c_board_info ov7670_info = {
472 	.type = "ov7670",
473 	.addr = 0x42 >> 1,
474 	.platform_data = &sensor_cfg,
475 };
476 
477 /* -------------------------------------------------------------------------- */
478 /*
479  * PCI interface stuff.
480  */
481 
cafe_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)482 static int cafe_pci_probe(struct pci_dev *pdev,
483 		const struct pci_device_id *id)
484 {
485 	int ret;
486 	struct cafe_camera *cam;
487 	struct mcam_camera *mcam;
488 	struct v4l2_async_subdev *asd;
489 	struct i2c_client *i2c_dev;
490 
491 	/*
492 	 * Start putting together one of our big camera structures.
493 	 */
494 	ret = -ENOMEM;
495 	cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);
496 	if (cam == NULL)
497 		goto out;
498 	pci_set_drvdata(pdev, cam);
499 	cam->pdev = pdev;
500 	mcam = &cam->mcam;
501 	mcam->chip_id = MCAM_CAFE;
502 	spin_lock_init(&mcam->dev_lock);
503 	init_waitqueue_head(&cam->smbus_wait);
504 	mcam->plat_power_up = cafe_ctlr_power_up;
505 	mcam->plat_power_down = cafe_ctlr_power_down;
506 	mcam->dev = &pdev->dev;
507 	snprintf(mcam->bus_info, sizeof(mcam->bus_info), "PCI:%s", pci_name(pdev));
508 	/*
509 	 * Vmalloc mode for buffers is traditional with this driver.
510 	 * We *might* be able to run DMA_contig, especially on a system
511 	 * with CMA in it.
512 	 */
513 	mcam->buffer_mode = B_vmalloc;
514 	/*
515 	 * Get set up on the PCI bus.
516 	 */
517 	ret = pci_enable_device(pdev);
518 	if (ret)
519 		goto out_free;
520 	pci_set_master(pdev);
521 
522 	ret = -EIO;
523 	mcam->regs = pci_iomap(pdev, 0, 0);
524 	if (!mcam->regs) {
525 		printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");
526 		goto out_disable;
527 	}
528 	mcam->regs_size = pci_resource_len(pdev, 0);
529 	ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);
530 	if (ret)
531 		goto out_iounmap;
532 
533 	/*
534 	 * Initialize the controller.
535 	 */
536 	cafe_ctlr_init(mcam);
537 
538 	/*
539 	 * Set up I2C/SMBUS communications.  We have to drop the mutex here
540 	 * because the sensor could attach in this call chain, leading to
541 	 * unsightly deadlocks.
542 	 */
543 	ret = cafe_smbus_setup(cam);
544 	if (ret)
545 		goto out_pdown;
546 
547 	v4l2_async_nf_init(&mcam->notifier);
548 
549 	asd = v4l2_async_nf_add_i2c(&mcam->notifier,
550 				    i2c_adapter_id(cam->i2c_adapter),
551 				    ov7670_info.addr, struct v4l2_async_subdev);
552 	if (IS_ERR(asd)) {
553 		ret = PTR_ERR(asd);
554 		goto out_smbus_shutdown;
555 	}
556 
557 	ret = mccic_register(mcam);
558 	if (ret)
559 		goto out_smbus_shutdown;
560 
561 	clkdev_create(mcam->mclk, "xclk", "%d-%04x",
562 		i2c_adapter_id(cam->i2c_adapter), ov7670_info.addr);
563 
564 	i2c_dev = i2c_new_client_device(cam->i2c_adapter, &ov7670_info);
565 	if (IS_ERR(i2c_dev)) {
566 		ret = PTR_ERR(i2c_dev);
567 		goto out_mccic_shutdown;
568 	}
569 
570 	cam->registered = 1;
571 	return 0;
572 
573 out_mccic_shutdown:
574 	mccic_shutdown(mcam);
575 out_smbus_shutdown:
576 	cafe_smbus_shutdown(cam);
577 out_pdown:
578 	cafe_ctlr_power_down(mcam);
579 	free_irq(pdev->irq, cam);
580 out_iounmap:
581 	pci_iounmap(pdev, mcam->regs);
582 out_disable:
583 	pci_disable_device(pdev);
584 out_free:
585 	kfree(cam);
586 out:
587 	return ret;
588 }
589 
590 
591 /*
592  * Shut down an initialized device
593  */
cafe_shutdown(struct cafe_camera * cam)594 static void cafe_shutdown(struct cafe_camera *cam)
595 {
596 	mccic_shutdown(&cam->mcam);
597 	cafe_smbus_shutdown(cam);
598 	free_irq(cam->pdev->irq, cam);
599 	pci_iounmap(cam->pdev, cam->mcam.regs);
600 }
601 
602 
cafe_pci_remove(struct pci_dev * pdev)603 static void cafe_pci_remove(struct pci_dev *pdev)
604 {
605 	struct cafe_camera *cam = pci_get_drvdata(pdev);
606 
607 	if (cam == NULL) {
608 		printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);
609 		return;
610 	}
611 	cafe_shutdown(cam);
612 	kfree(cam);
613 }
614 
615 
616 /*
617  * Basic power management.
618  */
cafe_pci_suspend(struct device * dev)619 static int __maybe_unused cafe_pci_suspend(struct device *dev)
620 {
621 	struct cafe_camera *cam = dev_get_drvdata(dev);
622 
623 	mccic_suspend(&cam->mcam);
624 	return 0;
625 }
626 
627 
cafe_pci_resume(struct device * dev)628 static int __maybe_unused cafe_pci_resume(struct device *dev)
629 {
630 	struct cafe_camera *cam = dev_get_drvdata(dev);
631 
632 	cafe_ctlr_init(&cam->mcam);
633 	return mccic_resume(&cam->mcam);
634 }
635 
636 static const struct pci_device_id cafe_ids[] = {
637 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL,
638 		     PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) },
639 	{ 0, }
640 };
641 
642 MODULE_DEVICE_TABLE(pci, cafe_ids);
643 
644 static SIMPLE_DEV_PM_OPS(cafe_pci_pm_ops, cafe_pci_suspend, cafe_pci_resume);
645 
646 static struct pci_driver cafe_pci_driver = {
647 	.name = "cafe1000-ccic",
648 	.id_table = cafe_ids,
649 	.probe = cafe_pci_probe,
650 	.remove = cafe_pci_remove,
651 	.driver.pm = &cafe_pci_pm_ops,
652 };
653 
654 
655 
656 
cafe_init(void)657 static int __init cafe_init(void)
658 {
659 	int ret;
660 
661 	printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",
662 			CAFE_VERSION);
663 	ret = pci_register_driver(&cafe_pci_driver);
664 	if (ret) {
665 		printk(KERN_ERR "Unable to register cafe_ccic driver\n");
666 		goto out;
667 	}
668 	ret = 0;
669 
670 out:
671 	return ret;
672 }
673 
674 
cafe_exit(void)675 static void __exit cafe_exit(void)
676 {
677 	pci_unregister_driver(&cafe_pci_driver);
678 }
679 
680 module_init(cafe_init);
681 module_exit(cafe_exit);
682