1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2018-2021 Intel Corporation 4 */ 5 #ifndef __iwl_fw_dbg_tlv_h__ 6 #define __iwl_fw_dbg_tlv_h__ 7 8 #include <linux/bitops.h> 9 10 #define IWL_FW_INI_HW_SMEM_REGION_ID 15 11 #define IWL_FW_INI_MAX_REGION_ID 64 12 #define IWL_FW_INI_MAX_NAME 32 13 #define IWL_FW_INI_MAX_CFG_NAME 64 14 #define IWL_FW_INI_DOMAIN_ALWAYS_ON 0 15 #define IWL_FW_INI_REGION_V2_MASK 0x0000FFFF 16 17 /** 18 * struct iwl_fw_ini_hcmd 19 * 20 * @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC 21 * @group: the desired cmd group 22 * @reserved: to align to FW struct 23 * @data: all of the relevant command data to be sent 24 */ 25 struct iwl_fw_ini_hcmd { 26 u8 id; 27 u8 group; 28 __le16 reserved; 29 u8 data[0]; 30 } __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */ 31 32 /** 33 * struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures 34 * 35 * @version: TLV version 36 * @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain 37 */ 38 struct iwl_fw_ini_header { 39 __le32 version; 40 __le32 domain; 41 /* followed by the data */ 42 } __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */ 43 44 /** 45 * struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses 46 * 47 * @size: size of each memory chunk 48 * @offset: offset to add to the base address of each chunk 49 */ 50 struct iwl_fw_ini_region_dev_addr { 51 __le32 size; 52 __le32 offset; 53 } __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */ 54 55 /** 56 * struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos 57 * 58 * @fid: fifos ids array. Used to determine what fifos to collect 59 * @hdr_only: if non zero, collect only the registers 60 * @offset: offset to add to the registers addresses 61 */ 62 struct iwl_fw_ini_region_fifos { 63 __le32 fid[2]; 64 __le32 hdr_only; 65 __le32 offset; 66 } __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */ 67 68 /** 69 * struct iwl_fw_ini_region_err_table - error table region data 70 * 71 * Configuration to read Umac/Lmac error table 72 * 73 * @version: version of the error table 74 * @base_addr: base address of the error table 75 * @size: size of the error table 76 * @offset: offset to add to &base_addr 77 */ 78 struct iwl_fw_ini_region_err_table { 79 __le32 version; 80 __le32 base_addr; 81 __le32 size; 82 __le32 offset; 83 } __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */ 84 85 /** 86 * struct iwl_fw_ini_region_special_device_memory - special device memory 87 * 88 * Configuration to read a special memory 89 * 90 * @type: type of the special memory 91 * @version: version of the special memory 92 * @base_addr: base address of the error table 93 * @size: size of the error table 94 * @offset: offset to add to &base_addr 95 */ 96 struct iwl_fw_ini_region_special_device_memory { 97 __le16 type; 98 __le16 version; 99 __le32 base_addr; 100 __le32 size; 101 __le32 offset; 102 } __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */ 103 104 /** 105 * struct iwl_fw_ini_region_internal_buffer - internal buffer region data 106 * 107 * Configuration to read internal monitor buffer 108 * 109 * @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id 110 * @base_addr: internal buffer base address 111 * @size: size internal buffer size 112 */ 113 struct iwl_fw_ini_region_internal_buffer { 114 __le32 alloc_id; 115 __le32 base_addr; 116 __le32 size; 117 } __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */ 118 119 /** 120 * struct iwl_fw_ini_region_tlv - region TLV 121 * 122 * Configures parameters for region data collection 123 * 124 * @hdr: debug header 125 * @id: region id. Max id is &IWL_FW_INI_MAX_REGION_ID 126 * @type: region type. One of &enum iwl_fw_ini_region_type 127 * @name: region name 128 * @dev_addr: device address configuration. Used by 129 * &IWL_FW_INI_REGION_DEVICE_MEMORY, &IWL_FW_INI_REGION_PERIPHERY_MAC, 130 * &IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX, 131 * &IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR, 132 * &IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG 133 * &IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM, 134 * @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and 135 * &IWL_FW_INI_REGION_RXF 136 * @err_table: error table configuration. Used by 137 * IWL_FW_INI_REGION_LMAC_ERROR_TABLE and 138 * IWL_FW_INI_REGION_UMAC_ERROR_TABLE 139 * @internal_buffer: internal monitor buffer configuration. Used by 140 * &IWL_FW_INI_REGION_INTERNAL_BUFFER 141 * @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id. 142 * Used by &IWL_FW_INI_REGION_DRAM_BUFFER 143 * @tlv_mask: tlv collection mask. Used by &IWL_FW_INI_REGION_TLV 144 * @addrs: array of addresses attached to the end of the region tlv 145 */ 146 struct iwl_fw_ini_region_tlv { 147 struct iwl_fw_ini_header hdr; 148 __le32 id; 149 __le32 type; 150 u8 name[IWL_FW_INI_MAX_NAME]; 151 union { 152 struct iwl_fw_ini_region_dev_addr dev_addr; 153 struct iwl_fw_ini_region_fifos fifos; 154 struct iwl_fw_ini_region_err_table err_table; 155 struct iwl_fw_ini_region_internal_buffer internal_buffer; 156 struct iwl_fw_ini_region_special_device_memory special_mem; 157 __le32 dram_alloc_id; 158 __le32 tlv_mask; 159 }; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */ 160 __le32 addrs[]; 161 } __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */ 162 163 /** 164 * struct iwl_fw_ini_debug_info_tlv 165 * 166 * debug configuration name for a specific image 167 * 168 * @hdr: debug header 169 * @image_type: image type 170 * @debug_cfg_name: debug configuration name 171 */ 172 struct iwl_fw_ini_debug_info_tlv { 173 struct iwl_fw_ini_header hdr; 174 __le32 image_type; 175 u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME]; 176 } __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */ 177 178 /** 179 * struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers 180 * 181 * @hdr: debug header 182 * @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id 183 * @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location 184 * @req_size: requested buffer size 185 * @max_frags_num: maximum number of fragments 186 * @min_size: minimum buffer size 187 */ 188 struct iwl_fw_ini_allocation_tlv { 189 struct iwl_fw_ini_header hdr; 190 __le32 alloc_id; 191 __le32 buf_location; 192 __le32 req_size; 193 __le32 max_frags_num; 194 __le32 min_size; 195 } __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */ 196 197 /** 198 * struct iwl_fw_ini_trigger_tlv - trigger TLV 199 * 200 * Trigger that upon firing, determines what regions to collect 201 * 202 * @hdr: debug header 203 * @time_point: time point. One of &enum iwl_fw_ini_time_point 204 * @trigger_reason: trigger reason 205 * @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy 206 * @dump_delay: delay from trigger fire to dump, in usec 207 * @occurrences: max trigger fire occurrences allowed 208 * @reserved: unused 209 * @ignore_consec: ignore consecutive triggers, in usec 210 * @reset_fw: if non zero, will reset and reload the FW 211 * @multi_dut: initiate debug dump data on several DUTs 212 * @regions_mask: mask of regions to collect 213 * @data: trigger data 214 */ 215 struct iwl_fw_ini_trigger_tlv { 216 struct iwl_fw_ini_header hdr; 217 __le32 time_point; 218 __le32 trigger_reason; 219 __le32 apply_policy; 220 __le32 dump_delay; 221 __le32 occurrences; 222 __le32 reserved; 223 __le32 ignore_consec; 224 __le32 reset_fw; 225 __le32 multi_dut; 226 __le64 regions_mask; 227 __le32 data[]; 228 } __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */ 229 230 /** 231 * struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV 232 * 233 * @hdr: debug header 234 * @time_point: time point. One of &enum iwl_fw_ini_time_point 235 * @period_msec: interval at which the hcmd will be sent to the FW. 236 * Measured in msec (0 = one time command) 237 * @hcmd: a variable length host-command to be sent to apply the configuration 238 */ 239 struct iwl_fw_ini_hcmd_tlv { 240 struct iwl_fw_ini_header hdr; 241 __le32 time_point; 242 __le32 period_msec; 243 struct iwl_fw_ini_hcmd hcmd; 244 } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */ 245 246 /** 247 * struct iwl_fw_ini_conf_tlv - preset configuration TLV 248 * 249 * @address: the base address 250 * @value: value to set at address 251 252 */ 253 struct iwl_fw_ini_addr_val { 254 __le32 address; 255 __le32 value; 256 } __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */ 257 258 /** 259 * struct iwl_fw_ini_conf_tlv - configuration TLV to set register/memory. 260 * 261 * @hdr: debug header 262 * @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point 263 * @set_type: write access type preset token for time point. 264 * one of &enum iwl_fw_ini_config_set_type 265 * @addr_offset: the offset to add to any item in address[0] field 266 * @addr_val: address value pair 267 */ 268 struct iwl_fw_ini_conf_set_tlv { 269 struct iwl_fw_ini_header hdr; 270 __le32 time_point; 271 __le32 set_type; 272 __le32 addr_offset; 273 struct iwl_fw_ini_addr_val addr_val[0]; 274 } __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */ 275 276 /** 277 * enum iwl_fw_ini_config_set_type 278 * 279 * @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set 280 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration 281 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration 282 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration 283 * @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration 284 * @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration 285 * @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration 286 * @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration 287 * @IWL_FW_INI_ALLOCATION_NUM: max number of configuration supported 288 */ 289 290 enum iwl_fw_ini_config_set_type { 291 IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0, 292 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC, 293 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY, 294 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX, 295 IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY, 296 IWL_FW_INI_CONFIG_SET_TYPE_CSR, 297 IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR, 298 IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM, 299 IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM, 300 } __packed; 301 302 /** 303 * enum iwl_fw_ini_allocation_id 304 * 305 * @IWL_FW_INI_ALLOCATION_INVALID: invalid 306 * @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration 307 * @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration 308 * @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration 309 * @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids 310 */ 311 enum iwl_fw_ini_allocation_id { 312 IWL_FW_INI_ALLOCATION_INVALID, 313 IWL_FW_INI_ALLOCATION_ID_DBGC1, 314 IWL_FW_INI_ALLOCATION_ID_DBGC2, 315 IWL_FW_INI_ALLOCATION_ID_DBGC3, 316 IWL_FW_INI_ALLOCATION_NUM, 317 }; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */ 318 319 /** 320 * enum iwl_fw_ini_buffer_location 321 * 322 * @IWL_FW_INI_LOCATION_INVALID: invalid 323 * @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location 324 * @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location 325 * @IWL_FW_INI_LOCATION_NPK_PATH: NPK location 326 */ 327 enum iwl_fw_ini_buffer_location { 328 IWL_FW_INI_LOCATION_INVALID, 329 IWL_FW_INI_LOCATION_SRAM_PATH, 330 IWL_FW_INI_LOCATION_DRAM_PATH, 331 IWL_FW_INI_LOCATION_NPK_PATH, 332 IWL_FW_INI_LOCATION_NUM, 333 }; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */ 334 335 /** 336 * enum iwl_fw_ini_region_type 337 * 338 * @IWL_FW_INI_REGION_INVALID: invalid 339 * @IWL_FW_INI_REGION_TLV: uCode and debug TLVs 340 * @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer 341 * @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer 342 * @IWL_FW_INI_REGION_TXF: TX fifos 343 * @IWL_FW_INI_REGION_RXF: RX fifo 344 * @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table 345 * @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table 346 * @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data 347 * @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory 348 * @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC 349 * @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY 350 * @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX 351 * @IWL_FW_INI_REGION_PAGING: paging memory 352 * @IWL_FW_INI_REGION_CSR: CSR registers 353 * @IWL_FW_INI_REGION_DRAM_IMR: IMR memory 354 * @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config 355 * @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory 356 * @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM 357 * @IWL_FW_INI_REGION_NUM: number of region types 358 */ 359 enum iwl_fw_ini_region_type { 360 IWL_FW_INI_REGION_INVALID, 361 IWL_FW_INI_REGION_TLV, 362 IWL_FW_INI_REGION_INTERNAL_BUFFER, 363 IWL_FW_INI_REGION_DRAM_BUFFER, 364 IWL_FW_INI_REGION_TXF, 365 IWL_FW_INI_REGION_RXF, 366 IWL_FW_INI_REGION_LMAC_ERROR_TABLE, 367 IWL_FW_INI_REGION_UMAC_ERROR_TABLE, 368 IWL_FW_INI_REGION_RSP_OR_NOTIF, 369 IWL_FW_INI_REGION_DEVICE_MEMORY, 370 IWL_FW_INI_REGION_PERIPHERY_MAC, 371 IWL_FW_INI_REGION_PERIPHERY_PHY, 372 IWL_FW_INI_REGION_PERIPHERY_AUX, 373 IWL_FW_INI_REGION_PAGING, 374 IWL_FW_INI_REGION_CSR, 375 IWL_FW_INI_REGION_DRAM_IMR, 376 IWL_FW_INI_REGION_PCI_IOSF_CONFIG, 377 IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY, 378 IWL_FW_INI_REGION_DBGI_SRAM, 379 IWL_FW_INI_REGION_NUM 380 }; /* FW_TLV_DEBUG_REGION_TYPE_API_E */ 381 382 /** 383 * enum iwl_fw_ini_time_point 384 * 385 * Hard coded time points in which the driver can send hcmd or perform dump 386 * collection 387 * 388 * @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW 389 * @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif 390 * @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence 391 * @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert 392 * @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error 393 * @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang 394 * @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif 395 * @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification. 396 * data field holds id and group 397 * @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point 398 * @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant 399 * intervals. data field holds the interval time in msec 400 * @IWL_FW_INI_TIME_POINT_RESERVED: reserved 401 * @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused 402 * @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout 403 * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable 404 * @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable 405 * @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start 406 * @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end 407 * @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons 408 * @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure 409 * @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed 410 * @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action 411 * frame failed 412 * @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold 413 * @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred 414 * @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed 415 * @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx 416 * @IWL_FW_INI_TIME_POINT_DEASSOC: de association 417 * @IWL_FW_INI_TIME_POINT_NUM: number of time points 418 */ 419 enum iwl_fw_ini_time_point { 420 IWL_FW_INI_TIME_POINT_INVALID, 421 IWL_FW_INI_TIME_POINT_EARLY, 422 IWL_FW_INI_TIME_POINT_AFTER_ALIVE, 423 IWL_FW_INI_TIME_POINT_POST_INIT, 424 IWL_FW_INI_TIME_POINT_FW_ASSERT, 425 IWL_FW_INI_TIME_POINT_FW_HW_ERROR, 426 IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG, 427 IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION, 428 IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF, 429 IWL_FW_INI_TIME_POINT_USER_TRIGGER, 430 IWL_FW_INI_TIME_POINT_PERIODIC, 431 IWL_FW_INI_TIME_POINT_RESERVED, 432 IWL_FW_INI_TIME_POINT_HOST_ASSERT, 433 IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT, 434 IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE, 435 IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE, 436 IWL_FW_INI_TIME_POINT_HOST_D3_START, 437 IWL_FW_INI_TIME_POINT_HOST_D3_END, 438 IWL_FW_INI_TIME_POINT_MISSED_BEACONS, 439 IWL_FW_INI_TIME_POINT_ASSOC_FAILED, 440 IWL_FW_INI_TIME_POINT_TX_FAILED, 441 IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED, 442 IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD, 443 IWL_FW_INI_TIME_POINT_HANG_OCCURRED, 444 IWL_FW_INI_TIME_POINT_EAPOL_FAILED, 445 IWL_FW_INI_TIME_POINT_FAKE_TX, 446 IWL_FW_INI_TIME_POINT_DEASSOC, 447 IWL_FW_INI_TIME_POINT_NUM, 448 }; /* FW_TLV_DEBUG_TIME_POINT_API_E */ 449 450 /** 451 * enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers 452 * 453 * @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point 454 * @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data 455 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask. 456 * Append otherwise 457 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration 458 * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data. 459 * Append otherwise 460 */ 461 enum iwl_fw_ini_trigger_apply_policy { 462 IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0), 463 IWL_FW_INI_APPLY_POLICY_MATCH_DATA = BIT(1), 464 IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS = BIT(8), 465 IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9), 466 IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10), 467 }; 468 #endif 469