1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/types.h>
3 #include <linux/init.h>
4 #include <linux/interrupt.h>
5 #include <linux/mm.h>
6 #include <linux/slab.h>
7 #include <linux/spinlock.h>
8 #include <linux/zorro.h>
9 #include <linux/module.h>
10 
11 #include <asm/page.h>
12 #include <asm/amigaints.h>
13 #include <asm/amigahw.h>
14 
15 #include "scsi.h"
16 #include "wd33c93.h"
17 #include "gvp11.h"
18 
19 
20 #define CHECK_WD33C93
21 
22 struct gvp11_hostdata {
23 	struct WD33C93_hostdata wh;
24 	struct gvp11_scsiregs *regs;
25 };
26 
gvp11_intr(int irq,void * data)27 static irqreturn_t gvp11_intr(int irq, void *data)
28 {
29 	struct Scsi_Host *instance = data;
30 	struct gvp11_hostdata *hdata = shost_priv(instance);
31 	unsigned int status = hdata->regs->CNTR;
32 	unsigned long flags;
33 
34 	if (!(status & GVP11_DMAC_INT_PENDING))
35 		return IRQ_NONE;
36 
37 	spin_lock_irqsave(instance->host_lock, flags);
38 	wd33c93_intr(instance);
39 	spin_unlock_irqrestore(instance->host_lock, flags);
40 	return IRQ_HANDLED;
41 }
42 
43 static int gvp11_xfer_mask = 0;
44 
gvp11_setup(char * str,int * ints)45 void gvp11_setup(char *str, int *ints)
46 {
47 	gvp11_xfer_mask = ints[1];
48 }
49 
dma_setup(struct scsi_cmnd * cmd,int dir_in)50 static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
51 {
52 	struct Scsi_Host *instance = cmd->device->host;
53 	struct gvp11_hostdata *hdata = shost_priv(instance);
54 	struct WD33C93_hostdata *wh = &hdata->wh;
55 	struct gvp11_scsiregs *regs = hdata->regs;
56 	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
57 	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
58 	int bank_mask;
59 	static int scsi_alloc_out_of_range = 0;
60 
61 	/* use bounce buffer if the physical address is bad */
62 	if (addr & wh->dma_xfer_mask) {
63 		wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff;
64 
65 		if (!scsi_alloc_out_of_range) {
66 			wh->dma_bounce_buffer =
67 				kmalloc(wh->dma_bounce_len, GFP_KERNEL);
68 			wh->dma_buffer_pool = BUF_SCSI_ALLOCED;
69 		}
70 
71 		if (scsi_alloc_out_of_range ||
72 		    !wh->dma_bounce_buffer) {
73 			wh->dma_bounce_buffer =
74 				amiga_chip_alloc(wh->dma_bounce_len,
75 						 "GVP II SCSI Bounce Buffer");
76 
77 			if (!wh->dma_bounce_buffer) {
78 				wh->dma_bounce_len = 0;
79 				return 1;
80 			}
81 
82 			wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
83 		}
84 
85 		/* check if the address of the bounce buffer is OK */
86 		addr = virt_to_bus(wh->dma_bounce_buffer);
87 
88 		if (addr & wh->dma_xfer_mask) {
89 			/* fall back to Chip RAM if address out of range */
90 			if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
91 				kfree(wh->dma_bounce_buffer);
92 				scsi_alloc_out_of_range = 1;
93 			} else {
94 				amiga_chip_free(wh->dma_bounce_buffer);
95 			}
96 
97 			wh->dma_bounce_buffer =
98 				amiga_chip_alloc(wh->dma_bounce_len,
99 						 "GVP II SCSI Bounce Buffer");
100 
101 			if (!wh->dma_bounce_buffer) {
102 				wh->dma_bounce_len = 0;
103 				return 1;
104 			}
105 
106 			addr = virt_to_bus(wh->dma_bounce_buffer);
107 			wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
108 		}
109 
110 		if (!dir_in) {
111 			/* copy to bounce buffer for a write */
112 			memcpy(wh->dma_bounce_buffer, cmd->SCp.ptr,
113 			       cmd->SCp.this_residual);
114 		}
115 	}
116 
117 	/* setup dma direction */
118 	if (!dir_in)
119 		cntr |= GVP11_DMAC_DIR_WRITE;
120 
121 	wh->dma_dir = dir_in;
122 	regs->CNTR = cntr;
123 
124 	/* setup DMA *physical* address */
125 	regs->ACR = addr;
126 
127 	if (dir_in) {
128 		/* invalidate any cache */
129 		cache_clear(addr, cmd->SCp.this_residual);
130 	} else {
131 		/* push any dirty cache */
132 		cache_push(addr, cmd->SCp.this_residual);
133 	}
134 
135 	bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0;
136 	if (bank_mask)
137 		regs->BANK = bank_mask & (addr >> 18);
138 
139 	/* start DMA */
140 	regs->ST_DMA = 1;
141 
142 	/* return success */
143 	return 0;
144 }
145 
dma_stop(struct Scsi_Host * instance,struct scsi_cmnd * SCpnt,int status)146 static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
147 		     int status)
148 {
149 	struct gvp11_hostdata *hdata = shost_priv(instance);
150 	struct WD33C93_hostdata *wh = &hdata->wh;
151 	struct gvp11_scsiregs *regs = hdata->regs;
152 
153 	/* stop DMA */
154 	regs->SP_DMA = 1;
155 	/* remove write bit from CONTROL bits */
156 	regs->CNTR = GVP11_DMAC_INT_ENABLE;
157 
158 	/* copy from a bounce buffer, if necessary */
159 	if (status && wh->dma_bounce_buffer) {
160 		if (wh->dma_dir && SCpnt)
161 			memcpy(SCpnt->SCp.ptr, wh->dma_bounce_buffer,
162 			       SCpnt->SCp.this_residual);
163 
164 		if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
165 			kfree(wh->dma_bounce_buffer);
166 		else
167 			amiga_chip_free(wh->dma_bounce_buffer);
168 
169 		wh->dma_bounce_buffer = NULL;
170 		wh->dma_bounce_len = 0;
171 	}
172 }
173 
174 static struct scsi_host_template gvp11_scsi_template = {
175 	.module			= THIS_MODULE,
176 	.name			= "GVP Series II SCSI",
177 	.show_info		= wd33c93_show_info,
178 	.write_info		= wd33c93_write_info,
179 	.proc_name		= "GVP11",
180 	.queuecommand		= wd33c93_queuecommand,
181 	.eh_abort_handler	= wd33c93_abort,
182 	.eh_host_reset_handler	= wd33c93_host_reset,
183 	.can_queue		= CAN_QUEUE,
184 	.this_id		= 7,
185 	.sg_tablesize		= SG_ALL,
186 	.cmd_per_lun		= CMD_PER_LUN,
187 	.dma_boundary		= PAGE_SIZE - 1,
188 };
189 
check_wd33c93(struct gvp11_scsiregs * regs)190 static int check_wd33c93(struct gvp11_scsiregs *regs)
191 {
192 #ifdef CHECK_WD33C93
193 	volatile unsigned char *sasr_3393, *scmd_3393;
194 	unsigned char save_sasr;
195 	unsigned char q, qq;
196 
197 	/*
198 	 * These darn GVP boards are a problem - it can be tough to tell
199 	 * whether or not they include a SCSI controller. This is the
200 	 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
201 	 * probes for a WD33c93 chip: If we find one, it's extremely
202 	 * likely that this card supports SCSI, regardless of Product_
203 	 * Code, Board_Size, etc.
204 	 */
205 
206 	/* Get pointers to the presumed register locations and save contents */
207 
208 	sasr_3393 = &regs->SASR;
209 	scmd_3393 = &regs->SCMD;
210 	save_sasr = *sasr_3393;
211 
212 	/* First test the AuxStatus Reg */
213 
214 	q = *sasr_3393;	/* read it */
215 	if (q & 0x08)	/* bit 3 should always be clear */
216 		return -ENODEV;
217 	*sasr_3393 = WD_AUXILIARY_STATUS;	/* setup indirect address */
218 	if (*sasr_3393 == WD_AUXILIARY_STATUS) {	/* shouldn't retain the write */
219 		*sasr_3393 = save_sasr;	/* Oops - restore this byte */
220 		return -ENODEV;
221 	}
222 	if (*sasr_3393 != q) {	/* should still read the same */
223 		*sasr_3393 = save_sasr;	/* Oops - restore this byte */
224 		return -ENODEV;
225 	}
226 	if (*scmd_3393 != q)	/* and so should the image at 0x1f */
227 		return -ENODEV;
228 
229 	/*
230 	 * Ok, we probably have a wd33c93, but let's check a few other places
231 	 * for good measure. Make sure that this works for both 'A and 'B
232 	 * chip versions.
233 	 */
234 
235 	*sasr_3393 = WD_SCSI_STATUS;
236 	q = *scmd_3393;
237 	*sasr_3393 = WD_SCSI_STATUS;
238 	*scmd_3393 = ~q;
239 	*sasr_3393 = WD_SCSI_STATUS;
240 	qq = *scmd_3393;
241 	*sasr_3393 = WD_SCSI_STATUS;
242 	*scmd_3393 = q;
243 	if (qq != q)	/* should be read only */
244 		return -ENODEV;
245 	*sasr_3393 = 0x1e;	/* this register is unimplemented */
246 	q = *scmd_3393;
247 	*sasr_3393 = 0x1e;
248 	*scmd_3393 = ~q;
249 	*sasr_3393 = 0x1e;
250 	qq = *scmd_3393;
251 	*sasr_3393 = 0x1e;
252 	*scmd_3393 = q;
253 	if (qq != q || qq != 0xff)	/* should be read only, all 1's */
254 		return -ENODEV;
255 	*sasr_3393 = WD_TIMEOUT_PERIOD;
256 	q = *scmd_3393;
257 	*sasr_3393 = WD_TIMEOUT_PERIOD;
258 	*scmd_3393 = ~q;
259 	*sasr_3393 = WD_TIMEOUT_PERIOD;
260 	qq = *scmd_3393;
261 	*sasr_3393 = WD_TIMEOUT_PERIOD;
262 	*scmd_3393 = q;
263 	if (qq != (~q & 0xff))	/* should be read/write */
264 		return -ENODEV;
265 #endif /* CHECK_WD33C93 */
266 
267 	return 0;
268 }
269 
gvp11_probe(struct zorro_dev * z,const struct zorro_device_id * ent)270 static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent)
271 {
272 	struct Scsi_Host *instance;
273 	unsigned long address;
274 	int error;
275 	unsigned int epc;
276 	unsigned int default_dma_xfer_mask;
277 	struct gvp11_hostdata *hdata;
278 	struct gvp11_scsiregs *regs;
279 	wd33c93_regs wdregs;
280 
281 	default_dma_xfer_mask = ent->driver_data;
282 
283 	/*
284 	 * Rumors state that some GVP ram boards use the same product
285 	 * code as the SCSI controllers. Therefore if the board-size
286 	 * is not 64KB we assume it is a ram board and bail out.
287 	 */
288 	if (zorro_resource_len(z) != 0x10000)
289 		return -ENODEV;
290 
291 	address = z->resource.start;
292 	if (!request_mem_region(address, 256, "wd33c93"))
293 		return -EBUSY;
294 
295 	regs = ZTWO_VADDR(address);
296 
297 	error = check_wd33c93(regs);
298 	if (error)
299 		goto fail_check_or_alloc;
300 
301 	instance = scsi_host_alloc(&gvp11_scsi_template,
302 				   sizeof(struct gvp11_hostdata));
303 	if (!instance) {
304 		error = -ENOMEM;
305 		goto fail_check_or_alloc;
306 	}
307 
308 	instance->irq = IRQ_AMIGA_PORTS;
309 	instance->unique_id = z->slotaddr;
310 
311 	regs->secret2 = 1;
312 	regs->secret1 = 0;
313 	regs->secret3 = 15;
314 	while (regs->CNTR & GVP11_DMAC_BUSY)
315 		;
316 	regs->CNTR = 0;
317 	regs->BANK = 0;
318 
319 	wdregs.SASR = &regs->SASR;
320 	wdregs.SCMD = &regs->SCMD;
321 
322 	hdata = shost_priv(instance);
323 	if (gvp11_xfer_mask)
324 		hdata->wh.dma_xfer_mask = gvp11_xfer_mask;
325 	else
326 		hdata->wh.dma_xfer_mask = default_dma_xfer_mask;
327 
328 	hdata->wh.no_sync = 0xff;
329 	hdata->wh.fast = 0;
330 	hdata->wh.dma_mode = CTRL_DMA;
331 	hdata->regs = regs;
332 
333 	/*
334 	 * Check for 14MHz SCSI clock
335 	 */
336 	epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
337 	wd33c93_init(instance, wdregs, dma_setup, dma_stop,
338 		     (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
339 					     : WD33C93_FS_12_15);
340 
341 	error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
342 			    "GVP11 SCSI", instance);
343 	if (error)
344 		goto fail_irq;
345 
346 	regs->CNTR = GVP11_DMAC_INT_ENABLE;
347 
348 	error = scsi_add_host(instance, NULL);
349 	if (error)
350 		goto fail_host;
351 
352 	zorro_set_drvdata(z, instance);
353 	scsi_scan_host(instance);
354 	return 0;
355 
356 fail_host:
357 	free_irq(IRQ_AMIGA_PORTS, instance);
358 fail_irq:
359 	scsi_host_put(instance);
360 fail_check_or_alloc:
361 	release_mem_region(address, 256);
362 	return error;
363 }
364 
gvp11_remove(struct zorro_dev * z)365 static void gvp11_remove(struct zorro_dev *z)
366 {
367 	struct Scsi_Host *instance = zorro_get_drvdata(z);
368 	struct gvp11_hostdata *hdata = shost_priv(instance);
369 
370 	hdata->regs->CNTR = 0;
371 	scsi_remove_host(instance);
372 	free_irq(IRQ_AMIGA_PORTS, instance);
373 	scsi_host_put(instance);
374 	release_mem_region(z->resource.start, 256);
375 }
376 
377 	/*
378 	 * This should (hopefully) be the correct way to identify
379 	 * all the different GVP SCSI controllers (except for the
380 	 * SERIES I though).
381 	 */
382 
383 static struct zorro_device_id gvp11_zorro_tbl[] = {
384 	{ ZORRO_PROD_GVP_COMBO_030_R3_SCSI,	~0x00ffffff },
385 	{ ZORRO_PROD_GVP_SERIES_II,		~0x00ffffff },
386 	{ ZORRO_PROD_GVP_GFORCE_030_SCSI,	~0x01ffffff },
387 	{ ZORRO_PROD_GVP_A530_SCSI,		~0x01ffffff },
388 	{ ZORRO_PROD_GVP_COMBO_030_R4_SCSI,	~0x01ffffff },
389 	{ ZORRO_PROD_GVP_A1291,			~0x07ffffff },
390 	{ ZORRO_PROD_GVP_GFORCE_040_SCSI_1,	~0x07ffffff },
391 	{ 0 }
392 };
393 MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl);
394 
395 static struct zorro_driver gvp11_driver = {
396 	.name		= "gvp11",
397 	.id_table	= gvp11_zorro_tbl,
398 	.probe		= gvp11_probe,
399 	.remove		= gvp11_remove,
400 };
401 
gvp11_init(void)402 static int __init gvp11_init(void)
403 {
404 	return zorro_register_driver(&gvp11_driver);
405 }
406 module_init(gvp11_init);
407 
gvp11_exit(void)408 static void __exit gvp11_exit(void)
409 {
410 	zorro_unregister_driver(&gvp11_driver);
411 }
412 module_exit(gvp11_exit);
413 
414 MODULE_DESCRIPTION("GVP Series II SCSI");
415 MODULE_LICENSE("GPL");
416