1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * amd5536udc_pci.c -- AMD 5536 UDC high/full speed USB device controller
4  *
5  * Copyright (C) 2005-2007 AMD (https://www.amd.com)
6  * Author: Thomas Dahlmann
7  */
8 
9 /*
10  * The AMD5536 UDC is part of the x86 southbridge AMD Geode CS5536.
11  * It is a USB Highspeed DMA capable USB device controller. Beside ep0 it
12  * provides 4 IN and 4 OUT endpoints (bulk or interrupt type).
13  *
14  * Make sure that UDC is assigned to port 4 by BIOS settings (port can also
15  * be used as host port) and UOC bits PAD_EN and APU are set (should be done
16  * by BIOS init).
17  *
18  * UDC DMA requires 32-bit aligned buffers so DMA with gadget ether does not
19  * work without updating NET_IP_ALIGN. Or PIO mode (module param "use_dma=0")
20  * can be used with gadget ether.
21  *
22  * This file does pci device registration, and the core driver implementation
23  * is done in amd5536udc.c
24  *
25  * The driver is split so as to use the core UDC driver which is based on
26  * Synopsys device controller IP (different than HS OTG IP) in UDCs
27  * integrated to SoC platforms.
28  *
29  */
30 
31 /* Driver strings */
32 #define UDC_MOD_DESCRIPTION		"AMD 5536 UDC - USB Device Controller"
33 
34 /* system */
35 #include <linux/device.h>
36 #include <linux/dmapool.h>
37 #include <linux/interrupt.h>
38 #include <linux/io.h>
39 #include <linux/irq.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/prefetch.h>
43 #include <linux/pci.h>
44 
45 /* udc specific */
46 #include "amd5536udc.h"
47 
48 /* pointer to device object */
49 static struct udc *udc;
50 
51 /* description */
52 static const char name[] = "amd5536udc-pci";
53 
54 /* Reset all pci context */
udc_pci_remove(struct pci_dev * pdev)55 static void udc_pci_remove(struct pci_dev *pdev)
56 {
57 	struct udc		*dev;
58 
59 	dev = pci_get_drvdata(pdev);
60 
61 	usb_del_gadget_udc(&udc->gadget);
62 	/* gadget driver must not be registered */
63 	if (WARN_ON(dev->driver))
64 		return;
65 
66 	/* dma pool cleanup */
67 	free_dma_pools(dev);
68 
69 	/* reset controller */
70 	writel(AMD_BIT(UDC_DEVCFG_SOFTRESET), &dev->regs->cfg);
71 	free_irq(pdev->irq, dev);
72 	iounmap(dev->virt_addr);
73 	release_mem_region(pci_resource_start(pdev, 0),
74 			   pci_resource_len(pdev, 0));
75 	pci_disable_device(pdev);
76 
77 	udc_remove(dev);
78 }
79 
80 /* Called by pci bus driver to init pci context */
udc_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)81 static int udc_pci_probe(
82 	struct pci_dev *pdev,
83 	const struct pci_device_id *id
84 )
85 {
86 	struct udc		*dev;
87 	unsigned long		resource;
88 	unsigned long		len;
89 	int			retval = 0;
90 
91 	/* one udc only */
92 	if (udc) {
93 		dev_dbg(&pdev->dev, "already probed\n");
94 		return -EBUSY;
95 	}
96 
97 	/* init */
98 	dev = kzalloc(sizeof(struct udc), GFP_KERNEL);
99 	if (!dev)
100 		return -ENOMEM;
101 
102 	/* pci setup */
103 	if (pci_enable_device(pdev) < 0) {
104 		retval = -ENODEV;
105 		goto err_pcidev;
106 	}
107 
108 	/* PCI resource allocation */
109 	resource = pci_resource_start(pdev, 0);
110 	len = pci_resource_len(pdev, 0);
111 
112 	if (!request_mem_region(resource, len, name)) {
113 		dev_dbg(&pdev->dev, "pci device used already\n");
114 		retval = -EBUSY;
115 		goto err_memreg;
116 	}
117 
118 	dev->virt_addr = ioremap(resource, len);
119 	if (!dev->virt_addr) {
120 		dev_dbg(&pdev->dev, "start address cannot be mapped\n");
121 		retval = -EFAULT;
122 		goto err_ioremap;
123 	}
124 
125 	if (!pdev->irq) {
126 		dev_err(&pdev->dev, "irq not set\n");
127 		retval = -ENODEV;
128 		goto err_irq;
129 	}
130 
131 	spin_lock_init(&dev->lock);
132 	/* udc csr registers base */
133 	dev->csr = dev->virt_addr + UDC_CSR_ADDR;
134 	/* dev registers base */
135 	dev->regs = dev->virt_addr + UDC_DEVCFG_ADDR;
136 	/* ep registers base */
137 	dev->ep_regs = dev->virt_addr + UDC_EPREGS_ADDR;
138 	/* fifo's base */
139 	dev->rxfifo = (u32 __iomem *)(dev->virt_addr + UDC_RXFIFO_ADDR);
140 	dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR);
141 
142 	if (request_irq(pdev->irq, udc_irq, IRQF_SHARED, name, dev) != 0) {
143 		dev_dbg(&pdev->dev, "request_irq(%d) fail\n", pdev->irq);
144 		retval = -EBUSY;
145 		goto err_irq;
146 	}
147 
148 	pci_set_drvdata(pdev, dev);
149 
150 	/* chip revision for Hs AMD5536 */
151 	dev->chiprev = pdev->revision;
152 
153 	pci_set_master(pdev);
154 	pci_try_set_mwi(pdev);
155 
156 	dev->phys_addr = resource;
157 	dev->irq = pdev->irq;
158 	dev->pdev = pdev;
159 	dev->dev = &pdev->dev;
160 
161 	/* init dma pools */
162 	if (use_dma) {
163 		retval = init_dma_pools(dev);
164 		if (retval != 0)
165 			goto err_dma;
166 	}
167 
168 	/* general probing */
169 	if (udc_probe(dev)) {
170 		retval = -ENODEV;
171 		goto err_probe;
172 	}
173 	return 0;
174 
175 err_probe:
176 	if (use_dma)
177 		free_dma_pools(dev);
178 err_dma:
179 	free_irq(pdev->irq, dev);
180 err_irq:
181 	iounmap(dev->virt_addr);
182 err_ioremap:
183 	release_mem_region(resource, len);
184 err_memreg:
185 	pci_disable_device(pdev);
186 err_pcidev:
187 	kfree(dev);
188 	return retval;
189 }
190 
191 /* PCI device parameters */
192 static const struct pci_device_id pci_id[] = {
193 	{
194 		PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x2096),
195 		.class =	PCI_CLASS_SERIAL_USB_DEVICE,
196 		.class_mask =	0xffffffff,
197 	},
198 	{},
199 };
200 MODULE_DEVICE_TABLE(pci, pci_id);
201 
202 /* PCI functions */
203 static struct pci_driver udc_pci_driver = {
204 	.name =		name,
205 	.id_table =	pci_id,
206 	.probe =	udc_pci_probe,
207 	.remove =	udc_pci_remove,
208 };
209 module_pci_driver(udc_pci_driver);
210 
211 MODULE_DESCRIPTION(UDC_MOD_DESCRIPTION);
212 MODULE_AUTHOR("Thomas Dahlmann");
213 MODULE_LICENSE("GPL");
214