1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2004 by Thomas Rathbone, HP Labs
4  * Copyright (C) 2005 by Ivan Kokshaysky
5  * Copyright (C) 2006 by SAN People
6  */
7 
8 #ifndef AT91_UDC_H
9 #define AT91_UDC_H
10 
11 /*
12  * USB Device Port (UDP) registers.
13  * Based on AT91RM9200 datasheet revision E.
14  */
15 
16 #define AT91_UDP_FRM_NUM	0x00		/* Frame Number Register */
17 #define     AT91_UDP_NUM	(0x7ff <<  0)	/* Frame Number */
18 #define     AT91_UDP_FRM_ERR	(1     << 16)	/* Frame Error */
19 #define     AT91_UDP_FRM_OK	(1     << 17)	/* Frame OK */
20 
21 #define AT91_UDP_GLB_STAT	0x04		/* Global State Register */
22 #define     AT91_UDP_FADDEN	(1 <<  0)	/* Function Address Enable */
23 #define     AT91_UDP_CONFG	(1 <<  1)	/* Configured */
24 #define     AT91_UDP_ESR	(1 <<  2)	/* Enable Send Resume */
25 #define     AT91_UDP_RSMINPR	(1 <<  3)	/* Resume has been sent */
26 #define     AT91_UDP_RMWUPE	(1 <<  4)	/* Remote Wake Up Enable */
27 
28 #define AT91_UDP_FADDR		0x08		/* Function Address Register */
29 #define     AT91_UDP_FADD	(0x7f << 0)	/* Function Address Value */
30 #define     AT91_UDP_FEN	(1    << 8)	/* Function Enable */
31 
32 #define AT91_UDP_IER		0x10		/* Interrupt Enable Register */
33 #define AT91_UDP_IDR		0x14		/* Interrupt Disable Register */
34 #define AT91_UDP_IMR		0x18		/* Interrupt Mask Register */
35 
36 #define AT91_UDP_ISR		0x1c		/* Interrupt Status Register */
37 #define     AT91_UDP_EP(n)	(1 << (n))	/* Endpoint Interrupt Status */
38 #define     AT91_UDP_RXSUSP	(1 <<  8) 	/* USB Suspend Interrupt Status */
39 #define     AT91_UDP_RXRSM	(1 <<  9)	/* USB Resume Interrupt Status */
40 #define     AT91_UDP_EXTRSM	(1 << 10)	/* External Resume Interrupt Status [AT91RM9200 only] */
41 #define     AT91_UDP_SOFINT	(1 << 11)	/* Start of Frame Interrupt Status */
42 #define     AT91_UDP_ENDBUSRES	(1 << 12)	/* End of Bus Reset Interrupt Status */
43 #define     AT91_UDP_WAKEUP	(1 << 13)	/* USB Wakeup Interrupt Status [AT91RM9200 only] */
44 
45 #define AT91_UDP_ICR		0x20		/* Interrupt Clear Register */
46 #define AT91_UDP_RST_EP		0x28		/* Reset Endpoint Register */
47 
48 #define AT91_UDP_CSR(n)		(0x30+((n)*4))	/* Endpoint Control/Status Registers 0-7 */
49 #define     AT91_UDP_TXCOMP	(1 <<  0)	/* Generates IN packet with data previously written in DPR */
50 #define     AT91_UDP_RX_DATA_BK0 (1 <<  1)	/* Receive Data Bank 0 */
51 #define     AT91_UDP_RXSETUP	(1 <<  2)	/* Send STALL to the host */
52 #define     AT91_UDP_STALLSENT	(1 <<  3)	/* Stall Sent / Isochronous error (Isochronous endpoints) */
53 #define     AT91_UDP_TXPKTRDY	(1 <<  4)	/* Transmit Packet Ready */
54 #define     AT91_UDP_FORCESTALL	(1 <<  5)	/* Force Stall */
55 #define     AT91_UDP_RX_DATA_BK1 (1 <<  6)	/* Receive Data Bank 1 */
56 #define     AT91_UDP_DIR	(1 <<  7)	/* Transfer Direction */
57 #define     AT91_UDP_EPTYPE	(7 <<  8)	/* Endpoint Type */
58 #define		AT91_UDP_EPTYPE_CTRL		(0 <<  8)
59 #define		AT91_UDP_EPTYPE_ISO_OUT		(1 <<  8)
60 #define		AT91_UDP_EPTYPE_BULK_OUT	(2 <<  8)
61 #define		AT91_UDP_EPTYPE_INT_OUT		(3 <<  8)
62 #define		AT91_UDP_EPTYPE_ISO_IN		(5 <<  8)
63 #define		AT91_UDP_EPTYPE_BULK_IN		(6 <<  8)
64 #define		AT91_UDP_EPTYPE_INT_IN		(7 <<  8)
65 #define     AT91_UDP_DTGLE	(1 << 11)	/* Data Toggle */
66 #define     AT91_UDP_EPEDS	(1 << 15)	/* Endpoint Enable/Disable */
67 #define     AT91_UDP_RXBYTECNT	(0x7ff << 16)	/* Number of bytes in FIFO */
68 
69 #define AT91_UDP_FDR(n)		(0x50+((n)*4))	/* Endpoint FIFO Data Registers 0-7 */
70 
71 #define AT91_UDP_TXVC		0x74		/* Transceiver Control Register */
72 #define     AT91_UDP_TXVC_TXVDIS (1 << 8)	/* Transceiver Disable */
73 #define     AT91_UDP_TXVC_PUON   (1 << 9)	/* PullUp On [AT91SAM9260 only] */
74 
75 /*-------------------------------------------------------------------------*/
76 
77 /*
78  * controller driver data structures
79  */
80 
81 #define	NUM_ENDPOINTS	6
82 
83 /*
84  * hardware won't disable bus reset, or resume while the controller
85  * is suspended ... watching suspend helps keep the logic symmetric.
86  */
87 #define	MINIMUS_INTERRUPTUS \
88 	(AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)
89 
90 struct at91_ep {
91 	struct usb_ep			ep;
92 	struct list_head		queue;
93 	struct at91_udc			*udc;
94 	void __iomem			*creg;
95 
96 	unsigned			maxpacket:16;
97 	u8				int_mask;
98 	unsigned			is_pingpong:1;
99 
100 	unsigned			stopped:1;
101 	unsigned			is_in:1;
102 	unsigned			is_iso:1;
103 	unsigned			fifo_bank:1;
104 };
105 
106 struct at91_udc_caps {
107 	int (*init)(struct at91_udc *udc);
108 	void (*pullup)(struct at91_udc *udc, int is_on);
109 };
110 
111 struct at91_udc_data {
112 	int	vbus_pin;		/* high == host powering us */
113 	u8	vbus_active_low;	/* vbus polarity */
114 	u8	vbus_polled;		/* Use polling, not interrupt */
115 	int	pullup_pin;		/* active == D+ pulled up */
116 	u8	pullup_active_low;	/* true == pullup_pin is active low */
117 };
118 
119 /*
120  * driver is non-SMP, and just blocks IRQs whenever it needs
121  * access protection for chip registers or driver state
122  */
123 struct at91_udc {
124 	struct usb_gadget		gadget;
125 	struct at91_ep			ep[NUM_ENDPOINTS];
126 	struct usb_gadget_driver	*driver;
127 	const struct at91_udc_caps	*caps;
128 	unsigned			vbus:1;
129 	unsigned			enabled:1;
130 	unsigned			clocked:1;
131 	unsigned			suspended:1;
132 	unsigned			req_pending:1;
133 	unsigned			wait_for_addr_ack:1;
134 	unsigned			wait_for_config_ack:1;
135 	unsigned			active_suspend:1;
136 	u8				addr;
137 	struct at91_udc_data		board;
138 	struct clk			*iclk, *fclk;
139 	struct platform_device		*pdev;
140 	struct proc_dir_entry		*pde;
141 	void __iomem			*udp_baseaddr;
142 	int				udp_irq;
143 	spinlock_t			lock;
144 	struct timer_list		vbus_timer;
145 	struct work_struct		vbus_timer_work;
146 	struct regmap			*matrix;
147 };
148 
to_udc(struct usb_gadget * g)149 static inline struct at91_udc *to_udc(struct usb_gadget *g)
150 {
151 	return container_of(g, struct at91_udc, gadget);
152 }
153 
154 struct at91_request {
155 	struct usb_request		req;
156 	struct list_head		queue;
157 };
158 
159 /*-------------------------------------------------------------------------*/
160 
161 #ifdef VERBOSE_DEBUG
162 #    define VDBG		DBG
163 #else
164 #    define VDBG(stuff...)	do{}while(0)
165 #endif
166 
167 #ifdef PACKET_TRACE
168 #    define PACKET		VDBG
169 #else
170 #    define PACKET(stuff...)	do{}while(0)
171 #endif
172 
173 #define ERR(stuff...)		pr_err("udc: " stuff)
174 #define WARNING(stuff...)	pr_warn("udc: " stuff)
175 #define INFO(stuff...)		pr_info("udc: " stuff)
176 #define DBG(stuff...)		pr_debug("udc: " stuff)
177 
178 #endif
179 
180