1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Common Bindings for Cisco Meraki MX64 (Kingpin) and MX65 (Alamo) devices. 4 * 5 * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com> 6 */ 7 8#include "bcm-nsp.dtsi" 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12 13/ { 14 pwm-leds { 15 compatible = "pwm-leds"; 16 17 led-1 { 18 function = LED_FUNCTION_INDICATOR; 19 color = <LED_COLOR_ID_RED>; 20 pwms = <&pwm 1 50000>; 21 max-brightness = <255>; 22 }; 23 24 led-2 { 25 function = LED_FUNCTION_INDICATOR; 26 color = <LED_COLOR_ID_GREEN>; 27 pwms = <&pwm 2 50000>; 28 max-brightness = <255>; 29 }; 30 31 led-3 { 32 function = LED_FUNCTION_INDICATOR; 33 color = <LED_COLOR_ID_BLUE>; 34 pwms = <&pwm 3 50000>; 35 max-brightness = <255>; 36 }; 37 }; 38}; 39 40&amac2 { 41 status = "okay"; 42}; 43 44&ehci0 { 45 status = "okay"; 46}; 47 48&i2c0 { 49 status = "okay"; 50 51 eeprom@50 { 52 compatible = "atmel,24c64"; 53 reg = <0x50>; 54 pagesize = <32>; 55 read-only; 56 }; 57}; 58 59&nand_controller { 60 nand@0 { 61 compatible = "brcm,nandcs"; 62 reg = <0>; 63 nand-on-flash-bbt; 64 65 #address-cells = <1>; 66 #size-cells = <1>; 67 68 nand-ecc-strength = <24>; 69 nand-ecc-step-size = <1024>; 70 71 brcm,nand-oob-sector-size = <27>; 72 73 partition@0 { 74 label = "u-boot"; 75 reg = <0x0 0x80000>; 76 read-only; 77 }; 78 79 partition@80000 { 80 label = "shmoo"; 81 reg = <0x80000 0x80000>; 82 read-only; 83 }; 84 85 partition@100000 { 86 label = "bootkernel1"; 87 reg = <0x100000 0x300000>; 88 }; 89 90 partition@400000 { 91 label = "nvram"; 92 reg = <0x400000 0x100000>; 93 }; 94 95 partition@500000 { 96 label = "bootkernel2"; 97 reg = <0x500000 0x300000>; 98 }; 99 100 partition@800000 { 101 label = "ubi"; 102 reg = <0x800000 0x3f700000>; 103 }; 104 }; 105}; 106 107&ohci0 { 108 status = "okay"; 109}; 110 111&pinctrl { 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pwm_leds>; 114 115 pwm_leds: pwm_leds { 116 function = "pwm"; 117 groups = "pwm1_grp", "pwm2_grp", "pwm3_grp"; 118 }; 119}; 120 121&pwm { 122 status = "okay"; 123 #pwm-cells = <2>; 124}; 125 126&uart0 { 127 clock-frequency = <62500000>; 128 status = "okay"; 129}; 130