1// SPDX-License-Identifier: ISC
2/*
3 * Device Tree file for Netgear WG302v2 based on IXP422BB
4 * Derived from boardfiles written by Imre Kaloz
5 */
6
7/dts-v1/;
8
9#include "intel-ixp42x.dtsi"
10#include <dt-bindings/input/input.h>
11
12/ {
13	model = "Netgear WG302 v2";
14	compatible = "netgear,wg302v2", "intel,ixp42x";
15	#address-cells = <1>;
16	#size-cells = <1>;
17
18	memory@0 {
19		/* 16 MB SDRAM according to OpenWrt database */
20		device_type = "memory";
21		reg = <0x00000000 0x01000000>;
22	};
23
24	chosen {
25		bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
26		stdout-path = "uart1:115200n8";
27	};
28
29	aliases {
30		/* These are switched around */
31		serial0 = &uart1;
32		serial1 = &uart0;
33	};
34
35	soc {
36		bus@c4000000 {
37			flash@0,0 {
38				compatible = "intel,ixp4xx-flash", "cfi-flash";
39				bank-width = <2>;
40				/*
41				 * 32 MB of Flash in 128 0x20000 sized blocks
42				 * mapped in at CS0 and CS1
43				 */
44				reg = <0 0x00000000 0x2000000>;
45
46				/* Configure expansion bus to allow writes */
47				intel,ixp4xx-eb-write-enable = <1>;
48
49				partitions {
50					compatible = "redboot-fis";
51					/* CHECKME: guess this is Redboot FIS */
52					fis-index-block = <0xff>;
53				};
54			};
55		};
56
57		pci@c0000000 {
58			status = "ok";
59
60			/*
61			 * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c)
62			 * We have slots (IDSEL) 1 and 2 with one assigned IRQ
63			 * each handling all IRQs.
64			 */
65			#interrupt-cells = <1>;
66			interrupt-map-mask = <0xf800 0 0 7>;
67			interrupt-map =
68			/* IDSEL 1 */
69			<0x0800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 8 */
70			<0x0800 0 0 2 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 8 */
71			<0x0800 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 8 */
72			<0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */
73			/* IDSEL 2 */
74			<0x1000 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 9 */
75			<0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */
76			<0x1000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 9 */
77			<0x1000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 9 */
78		};
79
80		ethernet@c8009000 {
81			status = "ok";
82			queue-rx = <&qmgr 3>;
83			queue-txready = <&qmgr 20>;
84			phy-mode = "rgmii";
85			phy-handle = <&phy8>;
86
87			mdio {
88				#address-cells = <1>;
89				#size-cells = <0>;
90
91				phy8: ethernet-phy@8 {
92					reg = <8>;
93				};
94			};
95		};
96	};
97};
98