1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC 4 * 5 * Copyright (C) 2013-2015 Renesas Electronics Corporation 6 * Copyright (C) 2013-2014 Renesas Solutions Corp. 7 * Copyright (C) 2014 Cogent Embedded Inc. 8 */ 9 10#include <dt-bindings/clock/r8a7791-cpg-mssr.h> 11#include <dt-bindings/interrupt-controller/arm-gic.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/power/r8a7791-sysc.h> 14 15/ { 16 compatible = "renesas,r8a7791"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 i2c7 = &i2c7; 29 i2c8 = &i2c8; 30 spi0 = &qspi; 31 spi1 = &msiof0; 32 spi2 = &msiof1; 33 spi3 = &msiof2; 34 vin0 = &vin0; 35 vin1 = &vin1; 36 vin2 = &vin2; 37 }; 38 39 /* 40 * The external audio clocks are configured as 0 Hz fixed frequency 41 * clocks by default. 42 * Boards that provide audio clocks should override them. 43 */ 44 audio_clk_a: audio_clk_a { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 audio_clk_b: audio_clk_b { 50 compatible = "fixed-clock"; 51 #clock-cells = <0>; 52 clock-frequency = <0>; 53 }; 54 audio_clk_c: audio_clk_c { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 /* External CAN clock */ 61 can_clk: can { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 /* This value must be overridden by the board. */ 65 clock-frequency = <0>; 66 }; 67 68 cpus { 69 #address-cells = <1>; 70 #size-cells = <0>; 71 72 cpu0: cpu@0 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a15"; 75 reg = <0>; 76 clock-frequency = <1500000000>; 77 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 78 power-domains = <&sysc R8A7791_PD_CA15_CPU0>; 79 enable-method = "renesas,apmu"; 80 next-level-cache = <&L2_CA15>; 81 voltage-tolerance = <1>; /* 1% */ 82 clock-latency = <300000>; /* 300 us */ 83 84 /* kHz - uV - OPPs unknown yet */ 85 operating-points = <1500000 1000000>, 86 <1312500 1000000>, 87 <1125000 1000000>, 88 < 937500 1000000>, 89 < 750000 1000000>, 90 < 375000 1000000>; 91 }; 92 93 cpu1: cpu@1 { 94 device_type = "cpu"; 95 compatible = "arm,cortex-a15"; 96 reg = <1>; 97 clock-frequency = <1500000000>; 98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; 99 power-domains = <&sysc R8A7791_PD_CA15_CPU1>; 100 enable-method = "renesas,apmu"; 101 next-level-cache = <&L2_CA15>; 102 voltage-tolerance = <1>; /* 1% */ 103 clock-latency = <300000>; /* 300 us */ 104 105 /* kHz - uV - OPPs unknown yet */ 106 operating-points = <1500000 1000000>, 107 <1312500 1000000>, 108 <1125000 1000000>, 109 < 937500 1000000>, 110 < 750000 1000000>, 111 < 375000 1000000>; 112 }; 113 114 L2_CA15: cache-controller-0 { 115 compatible = "cache"; 116 power-domains = <&sysc R8A7791_PD_CA15_SCU>; 117 cache-unified; 118 cache-level = <2>; 119 }; 120 }; 121 122 /* External root clock */ 123 extal_clk: extal { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 /* This value must be overridden by the board. */ 127 clock-frequency = <0>; 128 }; 129 130 /* External PCIe clock - can be overridden by the board */ 131 pcie_bus_clk: pcie_bus { 132 compatible = "fixed-clock"; 133 #clock-cells = <0>; 134 clock-frequency = <0>; 135 }; 136 137 pmu { 138 compatible = "arm,cortex-a15-pmu"; 139 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 140 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 141 interrupt-affinity = <&cpu0>, <&cpu1>; 142 }; 143 144 /* External SCIF clock */ 145 scif_clk: scif { 146 compatible = "fixed-clock"; 147 #clock-cells = <0>; 148 /* This value must be overridden by the board. */ 149 clock-frequency = <0>; 150 }; 151 152 soc { 153 compatible = "simple-bus"; 154 interrupt-parent = <&gic>; 155 156 #address-cells = <2>; 157 #size-cells = <2>; 158 ranges; 159 160 rwdt: watchdog@e6020000 { 161 compatible = "renesas,r8a7791-wdt", 162 "renesas,rcar-gen2-wdt"; 163 reg = <0 0xe6020000 0 0x0c>; 164 clocks = <&cpg CPG_MOD 402>; 165 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 166 resets = <&cpg 402>; 167 status = "disabled"; 168 }; 169 170 gpio0: gpio@e6050000 { 171 compatible = "renesas,gpio-r8a7791", 172 "renesas,rcar-gen2-gpio"; 173 reg = <0 0xe6050000 0 0x50>; 174 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 175 #gpio-cells = <2>; 176 gpio-controller; 177 gpio-ranges = <&pfc 0 0 32>; 178 #interrupt-cells = <2>; 179 interrupt-controller; 180 clocks = <&cpg CPG_MOD 912>; 181 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 182 resets = <&cpg 912>; 183 }; 184 185 gpio1: gpio@e6051000 { 186 compatible = "renesas,gpio-r8a7791", 187 "renesas,rcar-gen2-gpio"; 188 reg = <0 0xe6051000 0 0x50>; 189 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 190 #gpio-cells = <2>; 191 gpio-controller; 192 gpio-ranges = <&pfc 0 32 26>; 193 #interrupt-cells = <2>; 194 interrupt-controller; 195 clocks = <&cpg CPG_MOD 911>; 196 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 197 resets = <&cpg 911>; 198 }; 199 200 gpio2: gpio@e6052000 { 201 compatible = "renesas,gpio-r8a7791", 202 "renesas,rcar-gen2-gpio"; 203 reg = <0 0xe6052000 0 0x50>; 204 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 205 #gpio-cells = <2>; 206 gpio-controller; 207 gpio-ranges = <&pfc 0 64 32>; 208 #interrupt-cells = <2>; 209 interrupt-controller; 210 clocks = <&cpg CPG_MOD 910>; 211 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 212 resets = <&cpg 910>; 213 }; 214 215 gpio3: gpio@e6053000 { 216 compatible = "renesas,gpio-r8a7791", 217 "renesas,rcar-gen2-gpio"; 218 reg = <0 0xe6053000 0 0x50>; 219 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 220 #gpio-cells = <2>; 221 gpio-controller; 222 gpio-ranges = <&pfc 0 96 32>; 223 #interrupt-cells = <2>; 224 interrupt-controller; 225 clocks = <&cpg CPG_MOD 909>; 226 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 227 resets = <&cpg 909>; 228 }; 229 230 gpio4: gpio@e6054000 { 231 compatible = "renesas,gpio-r8a7791", 232 "renesas,rcar-gen2-gpio"; 233 reg = <0 0xe6054000 0 0x50>; 234 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 235 #gpio-cells = <2>; 236 gpio-controller; 237 gpio-ranges = <&pfc 0 128 32>; 238 #interrupt-cells = <2>; 239 interrupt-controller; 240 clocks = <&cpg CPG_MOD 908>; 241 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 242 resets = <&cpg 908>; 243 }; 244 245 gpio5: gpio@e6055000 { 246 compatible = "renesas,gpio-r8a7791", 247 "renesas,rcar-gen2-gpio"; 248 reg = <0 0xe6055000 0 0x50>; 249 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 250 #gpio-cells = <2>; 251 gpio-controller; 252 gpio-ranges = <&pfc 0 160 32>; 253 #interrupt-cells = <2>; 254 interrupt-controller; 255 clocks = <&cpg CPG_MOD 907>; 256 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 257 resets = <&cpg 907>; 258 }; 259 260 gpio6: gpio@e6055400 { 261 compatible = "renesas,gpio-r8a7791", 262 "renesas,rcar-gen2-gpio"; 263 reg = <0 0xe6055400 0 0x50>; 264 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 265 #gpio-cells = <2>; 266 gpio-controller; 267 gpio-ranges = <&pfc 0 192 32>; 268 #interrupt-cells = <2>; 269 interrupt-controller; 270 clocks = <&cpg CPG_MOD 905>; 271 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 272 resets = <&cpg 905>; 273 }; 274 275 gpio7: gpio@e6055800 { 276 compatible = "renesas,gpio-r8a7791", 277 "renesas,rcar-gen2-gpio"; 278 reg = <0 0xe6055800 0 0x50>; 279 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 280 #gpio-cells = <2>; 281 gpio-controller; 282 gpio-ranges = <&pfc 0 224 26>; 283 #interrupt-cells = <2>; 284 interrupt-controller; 285 clocks = <&cpg CPG_MOD 904>; 286 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 287 resets = <&cpg 904>; 288 }; 289 290 pfc: pinctrl@e6060000 { 291 compatible = "renesas,pfc-r8a7791"; 292 reg = <0 0xe6060000 0 0x250>; 293 }; 294 295 tpu: pwm@e60f0000 { 296 compatible = "renesas,tpu-r8a7791", "renesas,tpu"; 297 reg = <0 0xe60f0000 0 0x148>; 298 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 299 clocks = <&cpg CPG_MOD 304>; 300 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 301 resets = <&cpg 304>; 302 #pwm-cells = <3>; 303 status = "disabled"; 304 }; 305 306 cpg: clock-controller@e6150000 { 307 compatible = "renesas,r8a7791-cpg-mssr"; 308 reg = <0 0xe6150000 0 0x1000>; 309 clocks = <&extal_clk>, <&usb_extal_clk>; 310 clock-names = "extal", "usb_extal"; 311 #clock-cells = <2>; 312 #power-domain-cells = <0>; 313 #reset-cells = <1>; 314 }; 315 316 apmu@e6152000 { 317 compatible = "renesas,r8a7791-apmu", "renesas,apmu"; 318 reg = <0 0xe6152000 0 0x188>; 319 cpus = <&cpu0>, <&cpu1>; 320 }; 321 322 rst: reset-controller@e6160000 { 323 compatible = "renesas,r8a7791-rst"; 324 reg = <0 0xe6160000 0 0x0100>; 325 }; 326 327 sysc: system-controller@e6180000 { 328 compatible = "renesas,r8a7791-sysc"; 329 reg = <0 0xe6180000 0 0x0200>; 330 #power-domain-cells = <1>; 331 }; 332 333 irqc0: interrupt-controller@e61c0000 { 334 compatible = "renesas,irqc-r8a7791", "renesas,irqc"; 335 #interrupt-cells = <2>; 336 interrupt-controller; 337 reg = <0 0xe61c0000 0 0x200>; 338 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 348 clocks = <&cpg CPG_MOD 407>; 349 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 350 resets = <&cpg 407>; 351 }; 352 353 thermal: thermal@e61f0000 { 354 compatible = "renesas,thermal-r8a7791", 355 "renesas,rcar-gen2-thermal", 356 "renesas,rcar-thermal"; 357 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 358 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 359 clocks = <&cpg CPG_MOD 522>; 360 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 361 resets = <&cpg 522>; 362 #thermal-sensor-cells = <0>; 363 }; 364 365 ipmmu_sy0: iommu@e6280000 { 366 compatible = "renesas,ipmmu-r8a7791", 367 "renesas,ipmmu-vmsa"; 368 reg = <0 0xe6280000 0 0x1000>; 369 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 370 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 371 #iommu-cells = <1>; 372 status = "disabled"; 373 }; 374 375 ipmmu_sy1: iommu@e6290000 { 376 compatible = "renesas,ipmmu-r8a7791", 377 "renesas,ipmmu-vmsa"; 378 reg = <0 0xe6290000 0 0x1000>; 379 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 380 #iommu-cells = <1>; 381 status = "disabled"; 382 }; 383 384 ipmmu_ds: iommu@e6740000 { 385 compatible = "renesas,ipmmu-r8a7791", 386 "renesas,ipmmu-vmsa"; 387 reg = <0 0xe6740000 0 0x1000>; 388 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 390 #iommu-cells = <1>; 391 status = "disabled"; 392 }; 393 394 ipmmu_mp: iommu@ec680000 { 395 compatible = "renesas,ipmmu-r8a7791", 396 "renesas,ipmmu-vmsa"; 397 reg = <0 0xec680000 0 0x1000>; 398 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 399 #iommu-cells = <1>; 400 status = "disabled"; 401 }; 402 403 ipmmu_mx: iommu@fe951000 { 404 compatible = "renesas,ipmmu-r8a7791", 405 "renesas,ipmmu-vmsa"; 406 reg = <0 0xfe951000 0 0x1000>; 407 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 409 #iommu-cells = <1>; 410 status = "disabled"; 411 }; 412 413 ipmmu_rt: iommu@ffc80000 { 414 compatible = "renesas,ipmmu-r8a7791", 415 "renesas,ipmmu-vmsa"; 416 reg = <0 0xffc80000 0 0x1000>; 417 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 418 #iommu-cells = <1>; 419 status = "disabled"; 420 }; 421 422 ipmmu_gp: iommu@e62a0000 { 423 compatible = "renesas,ipmmu-r8a7791", 424 "renesas,ipmmu-vmsa"; 425 reg = <0 0xe62a0000 0 0x1000>; 426 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 428 #iommu-cells = <1>; 429 status = "disabled"; 430 }; 431 432 icram0: sram@e63a0000 { 433 compatible = "mmio-sram"; 434 reg = <0 0xe63a0000 0 0x12000>; 435 #address-cells = <1>; 436 #size-cells = <1>; 437 ranges = <0 0 0xe63a0000 0x12000>; 438 }; 439 440 icram1: sram@e63c0000 { 441 compatible = "mmio-sram"; 442 reg = <0 0xe63c0000 0 0x1000>; 443 #address-cells = <1>; 444 #size-cells = <1>; 445 ranges = <0 0 0xe63c0000 0x1000>; 446 447 smp-sram@0 { 448 compatible = "renesas,smp-sram"; 449 reg = <0 0x100>; 450 }; 451 }; 452 453 /* The memory map in the User's Manual maps the cores to 454 * bus numbers 455 */ 456 i2c0: i2c@e6508000 { 457 #address-cells = <1>; 458 #size-cells = <0>; 459 compatible = "renesas,i2c-r8a7791", 460 "renesas,rcar-gen2-i2c"; 461 reg = <0 0xe6508000 0 0x40>; 462 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&cpg CPG_MOD 931>; 464 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 465 resets = <&cpg 931>; 466 i2c-scl-internal-delay-ns = <6>; 467 status = "disabled"; 468 }; 469 470 i2c1: i2c@e6518000 { 471 #address-cells = <1>; 472 #size-cells = <0>; 473 compatible = "renesas,i2c-r8a7791", 474 "renesas,rcar-gen2-i2c"; 475 reg = <0 0xe6518000 0 0x40>; 476 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 930>; 478 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 479 resets = <&cpg 930>; 480 i2c-scl-internal-delay-ns = <6>; 481 status = "disabled"; 482 }; 483 484 i2c2: i2c@e6530000 { 485 #address-cells = <1>; 486 #size-cells = <0>; 487 compatible = "renesas,i2c-r8a7791", 488 "renesas,rcar-gen2-i2c"; 489 reg = <0 0xe6530000 0 0x40>; 490 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 491 clocks = <&cpg CPG_MOD 929>; 492 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 493 resets = <&cpg 929>; 494 i2c-scl-internal-delay-ns = <6>; 495 status = "disabled"; 496 }; 497 498 i2c3: i2c@e6540000 { 499 #address-cells = <1>; 500 #size-cells = <0>; 501 compatible = "renesas,i2c-r8a7791", 502 "renesas,rcar-gen2-i2c"; 503 reg = <0 0xe6540000 0 0x40>; 504 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 505 clocks = <&cpg CPG_MOD 928>; 506 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 507 resets = <&cpg 928>; 508 i2c-scl-internal-delay-ns = <6>; 509 status = "disabled"; 510 }; 511 512 i2c4: i2c@e6520000 { 513 #address-cells = <1>; 514 #size-cells = <0>; 515 compatible = "renesas,i2c-r8a7791", 516 "renesas,rcar-gen2-i2c"; 517 reg = <0 0xe6520000 0 0x40>; 518 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 927>; 520 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 521 resets = <&cpg 927>; 522 i2c-scl-internal-delay-ns = <6>; 523 status = "disabled"; 524 }; 525 526 i2c5: i2c@e6528000 { 527 /* doesn't need pinmux */ 528 #address-cells = <1>; 529 #size-cells = <0>; 530 compatible = "renesas,i2c-r8a7791", 531 "renesas,rcar-gen2-i2c"; 532 reg = <0 0xe6528000 0 0x40>; 533 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 925>; 535 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 536 resets = <&cpg 925>; 537 i2c-scl-internal-delay-ns = <110>; 538 status = "disabled"; 539 }; 540 541 i2c6: i2c@e60b0000 { 542 /* doesn't need pinmux */ 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,iic-r8a7791", 546 "renesas,rcar-gen2-iic", 547 "renesas,rmobile-iic"; 548 reg = <0 0xe60b0000 0 0x425>; 549 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 550 clocks = <&cpg CPG_MOD 926>; 551 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 552 <&dmac1 0x77>, <&dmac1 0x78>; 553 dma-names = "tx", "rx", "tx", "rx"; 554 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 555 resets = <&cpg 926>; 556 status = "disabled"; 557 }; 558 559 i2c7: i2c@e6500000 { 560 #address-cells = <1>; 561 #size-cells = <0>; 562 compatible = "renesas,iic-r8a7791", 563 "renesas,rcar-gen2-iic", 564 "renesas,rmobile-iic"; 565 reg = <0 0xe6500000 0 0x425>; 566 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 318>; 568 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 569 <&dmac1 0x61>, <&dmac1 0x62>; 570 dma-names = "tx", "rx", "tx", "rx"; 571 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 572 resets = <&cpg 318>; 573 status = "disabled"; 574 }; 575 576 i2c8: i2c@e6510000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,iic-r8a7791", 580 "renesas,rcar-gen2-iic", 581 "renesas,rmobile-iic"; 582 reg = <0 0xe6510000 0 0x425>; 583 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 323>; 585 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 586 <&dmac1 0x65>, <&dmac1 0x66>; 587 dma-names = "tx", "rx", "tx", "rx"; 588 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 589 resets = <&cpg 323>; 590 status = "disabled"; 591 }; 592 593 hsusb: usb@e6590000 { 594 compatible = "renesas,usbhs-r8a7791", 595 "renesas,rcar-gen2-usbhs"; 596 reg = <0 0xe6590000 0 0x100>; 597 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&cpg CPG_MOD 704>; 599 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 600 <&usb_dmac1 0>, <&usb_dmac1 1>; 601 dma-names = "ch0", "ch1", "ch2", "ch3"; 602 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 603 resets = <&cpg 704>; 604 renesas,buswait = <4>; 605 phys = <&usb0 1>; 606 phy-names = "usb"; 607 status = "disabled"; 608 }; 609 610 usbphy: usb-phy@e6590100 { 611 compatible = "renesas,usb-phy-r8a7791", 612 "renesas,rcar-gen2-usb-phy"; 613 reg = <0 0xe6590100 0 0x100>; 614 #address-cells = <1>; 615 #size-cells = <0>; 616 clocks = <&cpg CPG_MOD 704>; 617 clock-names = "usbhs"; 618 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 619 resets = <&cpg 704>; 620 status = "disabled"; 621 622 usb0: usb-channel@0 { 623 reg = <0>; 624 #phy-cells = <1>; 625 }; 626 usb2: usb-channel@2 { 627 reg = <2>; 628 #phy-cells = <1>; 629 }; 630 }; 631 632 usb_dmac0: dma-controller@e65a0000 { 633 compatible = "renesas,r8a7791-usb-dmac", 634 "renesas,usb-dmac"; 635 reg = <0 0xe65a0000 0 0x100>; 636 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 637 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 638 interrupt-names = "ch0", "ch1"; 639 clocks = <&cpg CPG_MOD 330>; 640 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 641 resets = <&cpg 330>; 642 #dma-cells = <1>; 643 dma-channels = <2>; 644 }; 645 646 usb_dmac1: dma-controller@e65b0000 { 647 compatible = "renesas,r8a7791-usb-dmac", 648 "renesas,usb-dmac"; 649 reg = <0 0xe65b0000 0 0x100>; 650 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 652 interrupt-names = "ch0", "ch1"; 653 clocks = <&cpg CPG_MOD 331>; 654 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 655 resets = <&cpg 331>; 656 #dma-cells = <1>; 657 dma-channels = <2>; 658 }; 659 660 dmac0: dma-controller@e6700000 { 661 compatible = "renesas,dmac-r8a7791", 662 "renesas,rcar-dmac"; 663 reg = <0 0xe6700000 0 0x20000>; 664 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 665 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 666 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 680 interrupt-names = "error", 681 "ch0", "ch1", "ch2", "ch3", 682 "ch4", "ch5", "ch6", "ch7", 683 "ch8", "ch9", "ch10", "ch11", 684 "ch12", "ch13", "ch14"; 685 clocks = <&cpg CPG_MOD 219>; 686 clock-names = "fck"; 687 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 688 resets = <&cpg 219>; 689 #dma-cells = <1>; 690 dma-channels = <15>; 691 }; 692 693 dmac1: dma-controller@e6720000 { 694 compatible = "renesas,dmac-r8a7791", 695 "renesas,rcar-dmac"; 696 reg = <0 0xe6720000 0 0x20000>; 697 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 702 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 703 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 706 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 707 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 708 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 709 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 710 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 712 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 713 interrupt-names = "error", 714 "ch0", "ch1", "ch2", "ch3", 715 "ch4", "ch5", "ch6", "ch7", 716 "ch8", "ch9", "ch10", "ch11", 717 "ch12", "ch13", "ch14"; 718 clocks = <&cpg CPG_MOD 218>; 719 clock-names = "fck"; 720 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 721 resets = <&cpg 218>; 722 #dma-cells = <1>; 723 dma-channels = <15>; 724 }; 725 726 avb: ethernet@e6800000 { 727 compatible = "renesas,etheravb-r8a7791", 728 "renesas,etheravb-rcar-gen2"; 729 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 730 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&cpg CPG_MOD 812>; 732 clock-names = "fck"; 733 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 734 resets = <&cpg 812>; 735 #address-cells = <1>; 736 #size-cells = <0>; 737 status = "disabled"; 738 }; 739 740 qspi: spi@e6b10000 { 741 compatible = "renesas,qspi-r8a7791", "renesas,qspi"; 742 reg = <0 0xe6b10000 0 0x2c>; 743 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 744 clocks = <&cpg CPG_MOD 917>; 745 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 746 <&dmac1 0x17>, <&dmac1 0x18>; 747 dma-names = "tx", "rx", "tx", "rx"; 748 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 749 resets = <&cpg 917>; 750 num-cs = <1>; 751 #address-cells = <1>; 752 #size-cells = <0>; 753 status = "disabled"; 754 }; 755 756 scifa0: serial@e6c40000 { 757 compatible = "renesas,scifa-r8a7791", 758 "renesas,rcar-gen2-scifa", "renesas,scifa"; 759 reg = <0 0xe6c40000 0 64>; 760 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 761 clocks = <&cpg CPG_MOD 204>; 762 clock-names = "fck"; 763 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 764 <&dmac1 0x21>, <&dmac1 0x22>; 765 dma-names = "tx", "rx", "tx", "rx"; 766 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 767 resets = <&cpg 204>; 768 status = "disabled"; 769 }; 770 771 scifa1: serial@e6c50000 { 772 compatible = "renesas,scifa-r8a7791", 773 "renesas,rcar-gen2-scifa", "renesas,scifa"; 774 reg = <0 0xe6c50000 0 64>; 775 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 776 clocks = <&cpg CPG_MOD 203>; 777 clock-names = "fck"; 778 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 779 <&dmac1 0x25>, <&dmac1 0x26>; 780 dma-names = "tx", "rx", "tx", "rx"; 781 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 782 resets = <&cpg 203>; 783 status = "disabled"; 784 }; 785 786 scifa2: serial@e6c60000 { 787 compatible = "renesas,scifa-r8a7791", 788 "renesas,rcar-gen2-scifa", "renesas,scifa"; 789 reg = <0 0xe6c60000 0 64>; 790 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 791 clocks = <&cpg CPG_MOD 202>; 792 clock-names = "fck"; 793 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 794 <&dmac1 0x27>, <&dmac1 0x28>; 795 dma-names = "tx", "rx", "tx", "rx"; 796 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 797 resets = <&cpg 202>; 798 status = "disabled"; 799 }; 800 801 scifa3: serial@e6c70000 { 802 compatible = "renesas,scifa-r8a7791", 803 "renesas,rcar-gen2-scifa", "renesas,scifa"; 804 reg = <0 0xe6c70000 0 64>; 805 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 806 clocks = <&cpg CPG_MOD 1106>; 807 clock-names = "fck"; 808 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 809 <&dmac1 0x1b>, <&dmac1 0x1c>; 810 dma-names = "tx", "rx", "tx", "rx"; 811 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 812 resets = <&cpg 1106>; 813 status = "disabled"; 814 }; 815 816 scifa4: serial@e6c78000 { 817 compatible = "renesas,scifa-r8a7791", 818 "renesas,rcar-gen2-scifa", "renesas,scifa"; 819 reg = <0 0xe6c78000 0 64>; 820 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 1107>; 822 clock-names = "fck"; 823 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 824 <&dmac1 0x1f>, <&dmac1 0x20>; 825 dma-names = "tx", "rx", "tx", "rx"; 826 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 827 resets = <&cpg 1107>; 828 status = "disabled"; 829 }; 830 831 scifa5: serial@e6c80000 { 832 compatible = "renesas,scifa-r8a7791", 833 "renesas,rcar-gen2-scifa", "renesas,scifa"; 834 reg = <0 0xe6c80000 0 64>; 835 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 836 clocks = <&cpg CPG_MOD 1108>; 837 clock-names = "fck"; 838 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 839 <&dmac1 0x23>, <&dmac1 0x24>; 840 dma-names = "tx", "rx", "tx", "rx"; 841 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 842 resets = <&cpg 1108>; 843 status = "disabled"; 844 }; 845 846 scifb0: serial@e6c20000 { 847 compatible = "renesas,scifb-r8a7791", 848 "renesas,rcar-gen2-scifb", "renesas,scifb"; 849 reg = <0 0xe6c20000 0 0x100>; 850 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 851 clocks = <&cpg CPG_MOD 206>; 852 clock-names = "fck"; 853 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 854 <&dmac1 0x3d>, <&dmac1 0x3e>; 855 dma-names = "tx", "rx", "tx", "rx"; 856 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 857 resets = <&cpg 206>; 858 status = "disabled"; 859 }; 860 861 scifb1: serial@e6c30000 { 862 compatible = "renesas,scifb-r8a7791", 863 "renesas,rcar-gen2-scifb", "renesas,scifb"; 864 reg = <0 0xe6c30000 0 0x100>; 865 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 866 clocks = <&cpg CPG_MOD 207>; 867 clock-names = "fck"; 868 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 869 <&dmac1 0x19>, <&dmac1 0x1a>; 870 dma-names = "tx", "rx", "tx", "rx"; 871 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 872 resets = <&cpg 207>; 873 status = "disabled"; 874 }; 875 876 scifb2: serial@e6ce0000 { 877 compatible = "renesas,scifb-r8a7791", 878 "renesas,rcar-gen2-scifb", "renesas,scifb"; 879 reg = <0 0xe6ce0000 0 0x100>; 880 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 881 clocks = <&cpg CPG_MOD 216>; 882 clock-names = "fck"; 883 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 884 <&dmac1 0x1d>, <&dmac1 0x1e>; 885 dma-names = "tx", "rx", "tx", "rx"; 886 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 887 resets = <&cpg 216>; 888 status = "disabled"; 889 }; 890 891 scif0: serial@e6e60000 { 892 compatible = "renesas,scif-r8a7791", 893 "renesas,rcar-gen2-scif", "renesas,scif"; 894 reg = <0 0xe6e60000 0 64>; 895 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 896 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 897 <&scif_clk>; 898 clock-names = "fck", "brg_int", "scif_clk"; 899 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 900 <&dmac1 0x29>, <&dmac1 0x2a>; 901 dma-names = "tx", "rx", "tx", "rx"; 902 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 903 resets = <&cpg 721>; 904 status = "disabled"; 905 }; 906 907 scif1: serial@e6e68000 { 908 compatible = "renesas,scif-r8a7791", 909 "renesas,rcar-gen2-scif", "renesas,scif"; 910 reg = <0 0xe6e68000 0 64>; 911 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 912 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 913 <&scif_clk>; 914 clock-names = "fck", "brg_int", "scif_clk"; 915 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 916 <&dmac1 0x2d>, <&dmac1 0x2e>; 917 dma-names = "tx", "rx", "tx", "rx"; 918 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 919 resets = <&cpg 720>; 920 status = "disabled"; 921 }; 922 923 scif2: serial@e6e58000 { 924 compatible = "renesas,scif-r8a7791", 925 "renesas,rcar-gen2-scif", "renesas,scif"; 926 reg = <0 0xe6e58000 0 64>; 927 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 928 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 929 <&scif_clk>; 930 clock-names = "fck", "brg_int", "scif_clk"; 931 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 932 <&dmac1 0x2b>, <&dmac1 0x2c>; 933 dma-names = "tx", "rx", "tx", "rx"; 934 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 935 resets = <&cpg 719>; 936 status = "disabled"; 937 }; 938 939 scif3: serial@e6ea8000 { 940 compatible = "renesas,scif-r8a7791", 941 "renesas,rcar-gen2-scif", "renesas,scif"; 942 reg = <0 0xe6ea8000 0 64>; 943 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 944 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 945 <&scif_clk>; 946 clock-names = "fck", "brg_int", "scif_clk"; 947 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 948 <&dmac1 0x2f>, <&dmac1 0x30>; 949 dma-names = "tx", "rx", "tx", "rx"; 950 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 951 resets = <&cpg 718>; 952 status = "disabled"; 953 }; 954 955 scif4: serial@e6ee0000 { 956 compatible = "renesas,scif-r8a7791", 957 "renesas,rcar-gen2-scif", "renesas,scif"; 958 reg = <0 0xe6ee0000 0 64>; 959 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 960 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 961 <&scif_clk>; 962 clock-names = "fck", "brg_int", "scif_clk"; 963 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 964 <&dmac1 0xfb>, <&dmac1 0xfc>; 965 dma-names = "tx", "rx", "tx", "rx"; 966 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 967 resets = <&cpg 715>; 968 status = "disabled"; 969 }; 970 971 scif5: serial@e6ee8000 { 972 compatible = "renesas,scif-r8a7791", 973 "renesas,rcar-gen2-scif", "renesas,scif"; 974 reg = <0 0xe6ee8000 0 64>; 975 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 976 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 977 <&scif_clk>; 978 clock-names = "fck", "brg_int", "scif_clk"; 979 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 980 <&dmac1 0xfd>, <&dmac1 0xfe>; 981 dma-names = "tx", "rx", "tx", "rx"; 982 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 983 resets = <&cpg 714>; 984 status = "disabled"; 985 }; 986 987 hscif0: serial@e62c0000 { 988 compatible = "renesas,hscif-r8a7791", 989 "renesas,rcar-gen2-hscif", "renesas,hscif"; 990 reg = <0 0xe62c0000 0 96>; 991 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 992 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 993 <&scif_clk>; 994 clock-names = "fck", "brg_int", "scif_clk"; 995 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 996 <&dmac1 0x39>, <&dmac1 0x3a>; 997 dma-names = "tx", "rx", "tx", "rx"; 998 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 999 resets = <&cpg 717>; 1000 status = "disabled"; 1001 }; 1002 1003 hscif1: serial@e62c8000 { 1004 compatible = "renesas,hscif-r8a7791", 1005 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1006 reg = <0 0xe62c8000 0 96>; 1007 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 1008 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1009 <&scif_clk>; 1010 clock-names = "fck", "brg_int", "scif_clk"; 1011 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 1012 <&dmac1 0x4d>, <&dmac1 0x4e>; 1013 dma-names = "tx", "rx", "tx", "rx"; 1014 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1015 resets = <&cpg 716>; 1016 status = "disabled"; 1017 }; 1018 1019 hscif2: serial@e62d0000 { 1020 compatible = "renesas,hscif-r8a7791", 1021 "renesas,rcar-gen2-hscif", "renesas,hscif"; 1022 reg = <0 0xe62d0000 0 96>; 1023 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 1024 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, 1025 <&scif_clk>; 1026 clock-names = "fck", "brg_int", "scif_clk"; 1027 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1028 <&dmac1 0x3b>, <&dmac1 0x3c>; 1029 dma-names = "tx", "rx", "tx", "rx"; 1030 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1031 resets = <&cpg 713>; 1032 status = "disabled"; 1033 }; 1034 1035 msiof0: spi@e6e20000 { 1036 compatible = "renesas,msiof-r8a7791", 1037 "renesas,rcar-gen2-msiof"; 1038 reg = <0 0xe6e20000 0 0x0064>; 1039 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 000>; 1041 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1042 <&dmac1 0x51>, <&dmac1 0x52>; 1043 dma-names = "tx", "rx", "tx", "rx"; 1044 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1045 resets = <&cpg 0>; 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 status = "disabled"; 1049 }; 1050 1051 msiof1: spi@e6e10000 { 1052 compatible = "renesas,msiof-r8a7791", 1053 "renesas,rcar-gen2-msiof"; 1054 reg = <0 0xe6e10000 0 0x0064>; 1055 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 208>; 1057 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1058 <&dmac1 0x55>, <&dmac1 0x56>; 1059 dma-names = "tx", "rx", "tx", "rx"; 1060 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1061 resets = <&cpg 208>; 1062 #address-cells = <1>; 1063 #size-cells = <0>; 1064 status = "disabled"; 1065 }; 1066 1067 msiof2: spi@e6e00000 { 1068 compatible = "renesas,msiof-r8a7791", 1069 "renesas,rcar-gen2-msiof"; 1070 reg = <0 0xe6e00000 0 0x0064>; 1071 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 205>; 1073 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1074 <&dmac1 0x41>, <&dmac1 0x42>; 1075 dma-names = "tx", "rx", "tx", "rx"; 1076 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1077 resets = <&cpg 205>; 1078 #address-cells = <1>; 1079 #size-cells = <0>; 1080 status = "disabled"; 1081 }; 1082 1083 pwm0: pwm@e6e30000 { 1084 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1085 reg = <0 0xe6e30000 0 0x8>; 1086 clocks = <&cpg CPG_MOD 523>; 1087 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1088 resets = <&cpg 523>; 1089 #pwm-cells = <2>; 1090 status = "disabled"; 1091 }; 1092 1093 pwm1: pwm@e6e31000 { 1094 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1095 reg = <0 0xe6e31000 0 0x8>; 1096 clocks = <&cpg CPG_MOD 523>; 1097 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1098 resets = <&cpg 523>; 1099 #pwm-cells = <2>; 1100 status = "disabled"; 1101 }; 1102 1103 pwm2: pwm@e6e32000 { 1104 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1105 reg = <0 0xe6e32000 0 0x8>; 1106 clocks = <&cpg CPG_MOD 523>; 1107 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1108 resets = <&cpg 523>; 1109 #pwm-cells = <2>; 1110 status = "disabled"; 1111 }; 1112 1113 pwm3: pwm@e6e33000 { 1114 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1115 reg = <0 0xe6e33000 0 0x8>; 1116 clocks = <&cpg CPG_MOD 523>; 1117 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1118 resets = <&cpg 523>; 1119 #pwm-cells = <2>; 1120 status = "disabled"; 1121 }; 1122 1123 pwm4: pwm@e6e34000 { 1124 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1125 reg = <0 0xe6e34000 0 0x8>; 1126 clocks = <&cpg CPG_MOD 523>; 1127 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1128 resets = <&cpg 523>; 1129 #pwm-cells = <2>; 1130 status = "disabled"; 1131 }; 1132 1133 pwm5: pwm@e6e35000 { 1134 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1135 reg = <0 0xe6e35000 0 0x8>; 1136 clocks = <&cpg CPG_MOD 523>; 1137 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1138 resets = <&cpg 523>; 1139 #pwm-cells = <2>; 1140 status = "disabled"; 1141 }; 1142 1143 pwm6: pwm@e6e36000 { 1144 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; 1145 reg = <0 0xe6e36000 0 0x8>; 1146 clocks = <&cpg CPG_MOD 523>; 1147 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1148 resets = <&cpg 523>; 1149 #pwm-cells = <2>; 1150 status = "disabled"; 1151 }; 1152 1153 adc: adc@e6e54000 { 1154 compatible = "renesas,r8a7791-gyroadc", 1155 "renesas,rcar-gyroadc"; 1156 reg = <0 0xe6e54000 0 64>; 1157 clocks = <&cpg CPG_MOD 901>; 1158 clock-names = "fck"; 1159 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1160 resets = <&cpg 901>; 1161 status = "disabled"; 1162 }; 1163 1164 can0: can@e6e80000 { 1165 compatible = "renesas,can-r8a7791", 1166 "renesas,rcar-gen2-can"; 1167 reg = <0 0xe6e80000 0 0x1000>; 1168 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1169 clocks = <&cpg CPG_MOD 916>, 1170 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1171 clock-names = "clkp1", "clkp2", "can_clk"; 1172 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1173 resets = <&cpg 916>; 1174 status = "disabled"; 1175 }; 1176 1177 can1: can@e6e88000 { 1178 compatible = "renesas,can-r8a7791", 1179 "renesas,rcar-gen2-can"; 1180 reg = <0 0xe6e88000 0 0x1000>; 1181 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1182 clocks = <&cpg CPG_MOD 915>, 1183 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; 1184 clock-names = "clkp1", "clkp2", "can_clk"; 1185 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1186 resets = <&cpg 915>; 1187 status = "disabled"; 1188 }; 1189 1190 vin0: video@e6ef0000 { 1191 compatible = "renesas,vin-r8a7791", 1192 "renesas,rcar-gen2-vin"; 1193 reg = <0 0xe6ef0000 0 0x1000>; 1194 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1195 clocks = <&cpg CPG_MOD 811>; 1196 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1197 resets = <&cpg 811>; 1198 status = "disabled"; 1199 }; 1200 1201 vin1: video@e6ef1000 { 1202 compatible = "renesas,vin-r8a7791", 1203 "renesas,rcar-gen2-vin"; 1204 reg = <0 0xe6ef1000 0 0x1000>; 1205 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1206 clocks = <&cpg CPG_MOD 810>; 1207 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1208 resets = <&cpg 810>; 1209 status = "disabled"; 1210 }; 1211 1212 vin2: video@e6ef2000 { 1213 compatible = "renesas,vin-r8a7791", 1214 "renesas,rcar-gen2-vin"; 1215 reg = <0 0xe6ef2000 0 0x1000>; 1216 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1217 clocks = <&cpg CPG_MOD 809>; 1218 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1219 resets = <&cpg 809>; 1220 status = "disabled"; 1221 }; 1222 1223 rcar_sound: sound@ec500000 { 1224 /* 1225 * #sound-dai-cells is required 1226 * 1227 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1228 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1229 */ 1230 compatible = "renesas,rcar_sound-r8a7791", 1231 "renesas,rcar_sound-gen2"; 1232 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1233 <0 0xec5a0000 0 0x100>, /* ADG */ 1234 <0 0xec540000 0 0x1000>, /* SSIU */ 1235 <0 0xec541000 0 0x280>, /* SSI */ 1236 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1237 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1238 1239 clocks = <&cpg CPG_MOD 1005>, 1240 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1241 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1242 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1243 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1244 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1245 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1246 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1247 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1248 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1249 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1250 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1251 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1252 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1253 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1254 <&cpg CPG_CORE R8A7791_CLK_M2>; 1255 clock-names = "ssi-all", 1256 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1257 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1258 "ssi.1", "ssi.0", "src.9", "src.8", 1259 "src.7", "src.6", "src.5", "src.4", 1260 "src.3", "src.2", "src.1", "src.0", 1261 "ctu.0", "ctu.1", 1262 "mix.0", "mix.1", 1263 "dvc.0", "dvc.1", 1264 "clk_a", "clk_b", "clk_c", "clk_i"; 1265 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1266 resets = <&cpg 1005>, 1267 <&cpg 1006>, <&cpg 1007>, 1268 <&cpg 1008>, <&cpg 1009>, 1269 <&cpg 1010>, <&cpg 1011>, 1270 <&cpg 1012>, <&cpg 1013>, 1271 <&cpg 1014>, <&cpg 1015>; 1272 reset-names = "ssi-all", 1273 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1274 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1275 "ssi.1", "ssi.0"; 1276 1277 status = "disabled"; 1278 1279 rcar_sound,dvc { 1280 dvc0: dvc-0 { 1281 dmas = <&audma1 0xbc>; 1282 dma-names = "tx"; 1283 }; 1284 dvc1: dvc-1 { 1285 dmas = <&audma1 0xbe>; 1286 dma-names = "tx"; 1287 }; 1288 }; 1289 1290 rcar_sound,mix { 1291 mix0: mix-0 { }; 1292 mix1: mix-1 { }; 1293 }; 1294 1295 rcar_sound,ctu { 1296 ctu00: ctu-0 { }; 1297 ctu01: ctu-1 { }; 1298 ctu02: ctu-2 { }; 1299 ctu03: ctu-3 { }; 1300 ctu10: ctu-4 { }; 1301 ctu11: ctu-5 { }; 1302 ctu12: ctu-6 { }; 1303 ctu13: ctu-7 { }; 1304 }; 1305 1306 rcar_sound,src { 1307 src0: src-0 { 1308 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1309 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1310 dma-names = "rx", "tx"; 1311 }; 1312 src1: src-1 { 1313 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1314 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1315 dma-names = "rx", "tx"; 1316 }; 1317 src2: src-2 { 1318 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1319 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1320 dma-names = "rx", "tx"; 1321 }; 1322 src3: src-3 { 1323 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1324 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1325 dma-names = "rx", "tx"; 1326 }; 1327 src4: src-4 { 1328 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1329 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1330 dma-names = "rx", "tx"; 1331 }; 1332 src5: src-5 { 1333 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1334 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1335 dma-names = "rx", "tx"; 1336 }; 1337 src6: src-6 { 1338 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1339 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1340 dma-names = "rx", "tx"; 1341 }; 1342 src7: src-7 { 1343 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1344 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1345 dma-names = "rx", "tx"; 1346 }; 1347 src8: src-8 { 1348 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1349 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1350 dma-names = "rx", "tx"; 1351 }; 1352 src9: src-9 { 1353 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1354 dmas = <&audma0 0x97>, <&audma1 0xba>; 1355 dma-names = "rx", "tx"; 1356 }; 1357 }; 1358 1359 rcar_sound,ssi { 1360 ssi0: ssi-0 { 1361 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1362 dmas = <&audma0 0x01>, <&audma1 0x02>, 1363 <&audma0 0x15>, <&audma1 0x16>; 1364 dma-names = "rx", "tx", "rxu", "txu"; 1365 }; 1366 ssi1: ssi-1 { 1367 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1368 dmas = <&audma0 0x03>, <&audma1 0x04>, 1369 <&audma0 0x49>, <&audma1 0x4a>; 1370 dma-names = "rx", "tx", "rxu", "txu"; 1371 }; 1372 ssi2: ssi-2 { 1373 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1374 dmas = <&audma0 0x05>, <&audma1 0x06>, 1375 <&audma0 0x63>, <&audma1 0x64>; 1376 dma-names = "rx", "tx", "rxu", "txu"; 1377 }; 1378 ssi3: ssi-3 { 1379 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1380 dmas = <&audma0 0x07>, <&audma1 0x08>, 1381 <&audma0 0x6f>, <&audma1 0x70>; 1382 dma-names = "rx", "tx", "rxu", "txu"; 1383 }; 1384 ssi4: ssi-4 { 1385 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1386 dmas = <&audma0 0x09>, <&audma1 0x0a>, 1387 <&audma0 0x71>, <&audma1 0x72>; 1388 dma-names = "rx", "tx", "rxu", "txu"; 1389 }; 1390 ssi5: ssi-5 { 1391 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1392 dmas = <&audma0 0x0b>, <&audma1 0x0c>, 1393 <&audma0 0x73>, <&audma1 0x74>; 1394 dma-names = "rx", "tx", "rxu", "txu"; 1395 }; 1396 ssi6: ssi-6 { 1397 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1398 dmas = <&audma0 0x0d>, <&audma1 0x0e>, 1399 <&audma0 0x75>, <&audma1 0x76>; 1400 dma-names = "rx", "tx", "rxu", "txu"; 1401 }; 1402 ssi7: ssi-7 { 1403 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1404 dmas = <&audma0 0x0f>, <&audma1 0x10>, 1405 <&audma0 0x79>, <&audma1 0x7a>; 1406 dma-names = "rx", "tx", "rxu", "txu"; 1407 }; 1408 ssi8: ssi-8 { 1409 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1410 dmas = <&audma0 0x11>, <&audma1 0x12>, 1411 <&audma0 0x7b>, <&audma1 0x7c>; 1412 dma-names = "rx", "tx", "rxu", "txu"; 1413 }; 1414 ssi9: ssi-9 { 1415 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1416 dmas = <&audma0 0x13>, <&audma1 0x14>, 1417 <&audma0 0x7d>, <&audma1 0x7e>; 1418 dma-names = "rx", "tx", "rxu", "txu"; 1419 }; 1420 }; 1421 }; 1422 1423 audma0: dma-controller@ec700000 { 1424 compatible = "renesas,dmac-r8a7791", 1425 "renesas,rcar-dmac"; 1426 reg = <0 0xec700000 0 0x10000>; 1427 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1428 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1429 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1430 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1431 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1432 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1433 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1434 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1435 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1436 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1437 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1438 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1439 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1440 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1441 interrupt-names = "error", 1442 "ch0", "ch1", "ch2", "ch3", 1443 "ch4", "ch5", "ch6", "ch7", 1444 "ch8", "ch9", "ch10", "ch11", 1445 "ch12"; 1446 clocks = <&cpg CPG_MOD 502>; 1447 clock-names = "fck"; 1448 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1449 resets = <&cpg 502>; 1450 #dma-cells = <1>; 1451 dma-channels = <13>; 1452 }; 1453 1454 audma1: dma-controller@ec720000 { 1455 compatible = "renesas,dmac-r8a7791", 1456 "renesas,rcar-dmac"; 1457 reg = <0 0xec720000 0 0x10000>; 1458 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1459 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1460 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1461 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1462 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1463 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1464 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1465 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1466 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1467 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1468 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1469 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1470 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1471 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1472 interrupt-names = "error", 1473 "ch0", "ch1", "ch2", "ch3", 1474 "ch4", "ch5", "ch6", "ch7", 1475 "ch8", "ch9", "ch10", "ch11", 1476 "ch12"; 1477 clocks = <&cpg CPG_MOD 501>; 1478 clock-names = "fck"; 1479 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1480 resets = <&cpg 501>; 1481 #dma-cells = <1>; 1482 dma-channels = <13>; 1483 }; 1484 1485 xhci: usb@ee000000 { 1486 compatible = "renesas,xhci-r8a7791", 1487 "renesas,rcar-gen2-xhci"; 1488 reg = <0 0xee000000 0 0xc00>; 1489 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 328>; 1491 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1492 resets = <&cpg 328>; 1493 phys = <&usb2 1>; 1494 phy-names = "usb"; 1495 status = "disabled"; 1496 }; 1497 1498 pci0: pci@ee090000 { 1499 compatible = "renesas,pci-r8a7791", 1500 "renesas,pci-rcar-gen2"; 1501 device_type = "pci"; 1502 reg = <0 0xee090000 0 0xc00>, 1503 <0 0xee080000 0 0x1100>; 1504 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1505 clocks = <&cpg CPG_MOD 703>; 1506 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1507 resets = <&cpg 703>; 1508 status = "disabled"; 1509 1510 bus-range = <0 0>; 1511 #address-cells = <3>; 1512 #size-cells = <2>; 1513 #interrupt-cells = <1>; 1514 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1515 interrupt-map-mask = <0xf800 0 0 0x7>; 1516 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1517 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1518 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1519 1520 usb@1,0 { 1521 reg = <0x800 0 0 0 0>; 1522 phys = <&usb0 0>; 1523 phy-names = "usb"; 1524 }; 1525 1526 usb@2,0 { 1527 reg = <0x1000 0 0 0 0>; 1528 phys = <&usb0 0>; 1529 phy-names = "usb"; 1530 }; 1531 }; 1532 1533 pci1: pci@ee0d0000 { 1534 compatible = "renesas,pci-r8a7791", 1535 "renesas,pci-rcar-gen2"; 1536 device_type = "pci"; 1537 reg = <0 0xee0d0000 0 0xc00>, 1538 <0 0xee0c0000 0 0x1100>; 1539 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1540 clocks = <&cpg CPG_MOD 703>; 1541 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1542 resets = <&cpg 703>; 1543 status = "disabled"; 1544 1545 bus-range = <1 1>; 1546 #address-cells = <3>; 1547 #size-cells = <2>; 1548 #interrupt-cells = <1>; 1549 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1550 interrupt-map-mask = <0xf800 0 0 0x7>; 1551 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1552 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1553 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1554 1555 usb@1,0 { 1556 reg = <0x10800 0 0 0 0>; 1557 phys = <&usb2 0>; 1558 phy-names = "usb"; 1559 }; 1560 1561 usb@2,0 { 1562 reg = <0x11000 0 0 0 0>; 1563 phys = <&usb2 0>; 1564 phy-names = "usb"; 1565 }; 1566 }; 1567 1568 sdhi0: mmc@ee100000 { 1569 compatible = "renesas,sdhi-r8a7791", 1570 "renesas,rcar-gen2-sdhi"; 1571 reg = <0 0xee100000 0 0x328>; 1572 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 314>; 1574 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1575 <&dmac1 0xcd>, <&dmac1 0xce>; 1576 dma-names = "tx", "rx", "tx", "rx"; 1577 max-frequency = <195000000>; 1578 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1579 resets = <&cpg 314>; 1580 status = "disabled"; 1581 }; 1582 1583 sdhi1: mmc@ee140000 { 1584 compatible = "renesas,sdhi-r8a7791", 1585 "renesas,rcar-gen2-sdhi"; 1586 reg = <0 0xee140000 0 0x100>; 1587 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1588 clocks = <&cpg CPG_MOD 312>; 1589 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1590 <&dmac1 0xc1>, <&dmac1 0xc2>; 1591 dma-names = "tx", "rx", "tx", "rx"; 1592 max-frequency = <97500000>; 1593 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1594 resets = <&cpg 312>; 1595 status = "disabled"; 1596 }; 1597 1598 sdhi2: mmc@ee160000 { 1599 compatible = "renesas,sdhi-r8a7791", 1600 "renesas,rcar-gen2-sdhi"; 1601 reg = <0 0xee160000 0 0x100>; 1602 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1603 clocks = <&cpg CPG_MOD 311>; 1604 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1605 <&dmac1 0xd3>, <&dmac1 0xd4>; 1606 dma-names = "tx", "rx", "tx", "rx"; 1607 max-frequency = <97500000>; 1608 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1609 resets = <&cpg 311>; 1610 status = "disabled"; 1611 }; 1612 1613 mmcif0: mmc@ee200000 { 1614 compatible = "renesas,mmcif-r8a7791", 1615 "renesas,sh-mmcif"; 1616 reg = <0 0xee200000 0 0x80>; 1617 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1618 clocks = <&cpg CPG_MOD 315>; 1619 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1620 <&dmac1 0xd1>, <&dmac1 0xd2>; 1621 dma-names = "tx", "rx", "tx", "rx"; 1622 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1623 resets = <&cpg 315>; 1624 reg-io-width = <4>; 1625 status = "disabled"; 1626 max-frequency = <97500000>; 1627 }; 1628 1629 sata0: sata@ee300000 { 1630 compatible = "renesas,sata-r8a7791", 1631 "renesas,rcar-gen2-sata"; 1632 reg = <0 0xee300000 0 0x200000>; 1633 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1634 clocks = <&cpg CPG_MOD 815>; 1635 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1636 resets = <&cpg 815>; 1637 status = "disabled"; 1638 }; 1639 1640 sata1: sata@ee500000 { 1641 compatible = "renesas,sata-r8a7791", 1642 "renesas,rcar-gen2-sata"; 1643 reg = <0 0xee500000 0 0x200000>; 1644 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 1645 clocks = <&cpg CPG_MOD 814>; 1646 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1647 resets = <&cpg 814>; 1648 status = "disabled"; 1649 }; 1650 1651 ether: ethernet@ee700000 { 1652 compatible = "renesas,ether-r8a7791", 1653 "renesas,rcar-gen2-ether"; 1654 reg = <0 0xee700000 0 0x400>; 1655 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1656 clocks = <&cpg CPG_MOD 813>; 1657 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1658 resets = <&cpg 813>; 1659 phy-mode = "rmii"; 1660 #address-cells = <1>; 1661 #size-cells = <0>; 1662 status = "disabled"; 1663 }; 1664 1665 gic: interrupt-controller@f1001000 { 1666 compatible = "arm,gic-400"; 1667 #interrupt-cells = <3>; 1668 #address-cells = <0>; 1669 interrupt-controller; 1670 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1671 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1672 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1673 clocks = <&cpg CPG_MOD 408>; 1674 clock-names = "clk"; 1675 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1676 resets = <&cpg 408>; 1677 }; 1678 1679 pciec: pcie@fe000000 { 1680 compatible = "renesas,pcie-r8a7791", 1681 "renesas,pcie-rcar-gen2"; 1682 reg = <0 0xfe000000 0 0x80000>; 1683 #address-cells = <3>; 1684 #size-cells = <2>; 1685 bus-range = <0x00 0xff>; 1686 device_type = "pci"; 1687 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1688 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1689 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1690 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1691 /* Map all possible DDR as inbound ranges */ 1692 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1693 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1694 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1695 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1696 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1697 #interrupt-cells = <1>; 1698 interrupt-map-mask = <0 0 0 0>; 1699 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1700 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1701 clock-names = "pcie", "pcie_bus"; 1702 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1703 resets = <&cpg 319>; 1704 status = "disabled"; 1705 }; 1706 1707 vsp@fe928000 { 1708 compatible = "renesas,vsp1"; 1709 reg = <0 0xfe928000 0 0x8000>; 1710 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 131>; 1712 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1713 resets = <&cpg 131>; 1714 }; 1715 1716 vsp@fe930000 { 1717 compatible = "renesas,vsp1"; 1718 reg = <0 0xfe930000 0 0x8000>; 1719 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1720 clocks = <&cpg CPG_MOD 128>; 1721 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1722 resets = <&cpg 128>; 1723 }; 1724 1725 vsp@fe938000 { 1726 compatible = "renesas,vsp1"; 1727 reg = <0 0xfe938000 0 0x8000>; 1728 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1729 clocks = <&cpg CPG_MOD 127>; 1730 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1731 resets = <&cpg 127>; 1732 }; 1733 1734 fdp1@fe940000 { 1735 compatible = "renesas,fdp1"; 1736 reg = <0 0xfe940000 0 0x2400>; 1737 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1738 clocks = <&cpg CPG_MOD 119>; 1739 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1740 resets = <&cpg 119>; 1741 }; 1742 1743 fdp1@fe944000 { 1744 compatible = "renesas,fdp1"; 1745 reg = <0 0xfe944000 0 0x2400>; 1746 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1747 clocks = <&cpg CPG_MOD 118>; 1748 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1749 resets = <&cpg 118>; 1750 }; 1751 1752 jpu: jpeg-codec@fe980000 { 1753 compatible = "renesas,jpu-r8a7791", 1754 "renesas,rcar-gen2-jpu"; 1755 reg = <0 0xfe980000 0 0x10300>; 1756 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 1757 clocks = <&cpg CPG_MOD 106>; 1758 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1759 resets = <&cpg 106>; 1760 }; 1761 1762 du: display@feb00000 { 1763 compatible = "renesas,du-r8a7791"; 1764 reg = <0 0xfeb00000 0 0x40000>; 1765 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1766 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1767 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1768 clock-names = "du.0", "du.1"; 1769 resets = <&cpg 724>; 1770 reset-names = "du.0"; 1771 status = "disabled"; 1772 1773 ports { 1774 #address-cells = <1>; 1775 #size-cells = <0>; 1776 1777 port@0 { 1778 reg = <0>; 1779 du_out_rgb: endpoint { 1780 }; 1781 }; 1782 port@1 { 1783 reg = <1>; 1784 du_out_lvds0: endpoint { 1785 remote-endpoint = <&lvds0_in>; 1786 }; 1787 }; 1788 }; 1789 }; 1790 1791 lvds0: lvds@feb90000 { 1792 compatible = "renesas,r8a7791-lvds"; 1793 reg = <0 0xfeb90000 0 0x1c>; 1794 clocks = <&cpg CPG_MOD 726>; 1795 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1796 resets = <&cpg 726>; 1797 status = "disabled"; 1798 1799 ports { 1800 #address-cells = <1>; 1801 #size-cells = <0>; 1802 1803 port@0 { 1804 reg = <0>; 1805 lvds0_in: endpoint { 1806 remote-endpoint = <&du_out_lvds0>; 1807 }; 1808 }; 1809 port@1 { 1810 reg = <1>; 1811 lvds0_out: endpoint { 1812 }; 1813 }; 1814 }; 1815 }; 1816 1817 prr: chipid@ff000044 { 1818 compatible = "renesas,prr"; 1819 reg = <0 0xff000044 0 4>; 1820 }; 1821 1822 cmt0: timer@ffca0000 { 1823 compatible = "renesas,r8a7791-cmt0", 1824 "renesas,rcar-gen2-cmt0"; 1825 reg = <0 0xffca0000 0 0x1004>; 1826 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1827 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1828 clocks = <&cpg CPG_MOD 124>; 1829 clock-names = "fck"; 1830 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1831 resets = <&cpg 124>; 1832 1833 status = "disabled"; 1834 }; 1835 1836 cmt1: timer@e6130000 { 1837 compatible = "renesas,r8a7791-cmt1", 1838 "renesas,rcar-gen2-cmt1"; 1839 reg = <0 0xe6130000 0 0x1004>; 1840 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1841 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1842 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1843 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1844 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1845 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1846 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1847 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1848 clocks = <&cpg CPG_MOD 329>; 1849 clock-names = "fck"; 1850 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1851 resets = <&cpg 329>; 1852 1853 status = "disabled"; 1854 }; 1855 }; 1856 1857 thermal-zones { 1858 cpu_thermal: cpu-thermal { 1859 polling-delay-passive = <0>; 1860 polling-delay = <0>; 1861 1862 thermal-sensors = <&thermal>; 1863 1864 trips { 1865 cpu-crit { 1866 temperature = <95000>; 1867 hysteresis = <0>; 1868 type = "critical"; 1869 }; 1870 }; 1871 cooling-maps { 1872 }; 1873 }; 1874 }; 1875 1876 timer { 1877 compatible = "arm,armv7-timer"; 1878 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1879 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1880 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1881 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1882 }; 1883 1884 /* External USB clock - can be overridden by the board */ 1885 usb_extal_clk: usb_extal { 1886 compatible = "fixed-clock"; 1887 #clock-cells = <0>; 1888 clock-frequency = <48000000>; 1889 }; 1890}; 1891