1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/gpio-keys.h>
5#include <dt-bindings/input/input.h>
6#include <dt-bindings/thermal/thermal.h>
7
8#include "tegra30.dtsi"
9#include "tegra30-cpu-opp.dtsi"
10#include "tegra30-cpu-opp-microvolt.dtsi"
11
12/ {
13	model = "Ouya Game Console";
14	compatible = "ouya,ouya", "nvidia,tegra30";
15
16	aliases {
17		mmc0 = &sdmmc4; /* eMMC */
18		mmc1 = &sdmmc3; /* WiFi */
19		rtc0 = &pmic;
20		rtc1 = "/rtc@7000e000";
21		serial0 = &uartd; /* Debug Port */
22		serial1 = &uartc; /* Bluetooth */
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@80000000 {
30		reg = <0x80000000 0x40000000>;
31	};
32
33	reserved-memory {
34		#address-cells = <1>;
35		#size-cells = <1>;
36		ranges;
37
38		linux,cma@80000000 {
39			compatible = "shared-dma-pool";
40			alloc-ranges = <0x80000000 0x30000000>;
41			size = <0x10000000>; /* 256MiB */
42			linux,cma-default;
43			reusable;
44		};
45
46		ramoops@bfdf0000 {
47			compatible = "ramoops";
48			reg = <0xbfdf0000 0x10000>;	/* 64kB */
49			console-size = <0x8000>;	/* 32kB */
50			record-size = <0x400>;		/*  1kB */
51			ecc-size = <16>;
52		};
53
54		trustzone@bfe00000 {
55			reg = <0xbfe00000 0x200000>;
56			no-map;
57		};
58	};
59
60	host1x@50000000 {
61		hdmi@54280000 {
62			status = "okay";
63			vdd-supply = <&vdd_vid_reg>;
64			pll-supply = <&ldo7_reg>;
65			hdmi-supply = <&sys_3v3_reg>;
66			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
67			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68		};
69	};
70
71	gpio: gpio@6000d000 {
72		gpio-ranges = <&pinmux 0 0 248>;
73		#reset-cells = <1>;
74	};
75
76	pinmux@70000868 {
77		pinctrl-names = "default";
78		pinctrl-0 = <&state_default>;
79		state_default: pinmux {
80			/* located at $state_default below */
81		};
82	};
83
84	uartc: serial@70006200 {
85		status = "okay";
86		compatible = "nvidia,tegra30-hsuart";
87
88		nvidia,adjust-baud-rates = <0 9600 100>,
89					   <9600 115200 200>,
90					   <1000000 4000000 136>;
91
92		/* Azurewave AW-NH660 BCM4330B1 */
93		bluetooth {
94			compatible = "brcm,bcm4330-bt";
95
96			interrupt-parent = <&gpio>;
97			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
98			interrupt-names = "host-wakeup";
99
100			max-speed = <4000000>;
101
102			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
103			clock-names = "txco";
104
105			vbat-supply  = <&sys_3v3_reg>;
106			vddio-supply = <&vdd_1v8>;
107
108			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
109			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
110		};
111	};
112
113	uartd: serial@70006300 {
114		status = "okay";
115	};
116
117	hdmi_ddc: i2c@7000c700 {
118		status = "okay";
119		clock-frequency = <100000>;
120	};
121
122	i2c@7000d000 {
123		status = "okay";
124		clock-frequency = <400000>;
125
126		cpu_temp: nct1008@4c {
127			compatible = "onnn,nct1008";
128			reg = <0x4c>;
129			vcc-supply = <&sys_3v3_reg>;
130
131			interrupt-parent = <&gpio>;
132			interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
133
134			#thermal-sensor-cells = <1>;
135		};
136
137		pmic: pmic@2d {
138			compatible = "ti,tps65911";
139			reg = <0x2d>;
140
141			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
142			#interrupt-cells = <2>;
143			interrupt-controller;
144			wakeup-source;
145
146			ti,en-gpio-sleep = <0 1 1 1 1 1 0 0 1>;
147			ti,system-power-controller;
148			ti,sleep-keep-ck32k;
149			ti,sleep-enable;
150
151			#gpio-cells = <2>;
152			gpio-controller;
153
154			vcc1-supply = <&vdd_5v0_reg>;
155			vcc2-supply = <&vdd_5v0_reg>;
156			vcc3-supply = <&vdd_1v8>;
157			vcc4-supply = <&vdd_5v0_reg>;
158			vcc5-supply = <&vdd_5v0_reg>;
159			vcc6-supply = <&vdd2_reg>;
160			vcc7-supply = <&vdd_5v0_reg>;
161			vccio-supply = <&vdd_5v0_reg>;
162
163			regulators {
164				vdd1_reg: vdd1 {
165					regulator-name = "vddio_ddr_1v2";
166					regulator-min-microvolt = <1200000>;
167					regulator-max-microvolt = <1200000>;
168					regulator-always-on;
169				};
170
171				vdd2_reg: vdd2 {
172					regulator-name = "vdd_1v5_gen";
173					regulator-min-microvolt = <1500000>;
174					regulator-max-microvolt = <1500000>;
175					regulator-always-on;
176				};
177
178				vdd_cpu: vddctrl {
179					regulator-name = "vdd_cpu,vdd_sys";
180					regulator-min-microvolt = <800000>;
181					regulator-max-microvolt = <1270000>;
182					regulator-coupled-with = <&vdd_core>;
183					regulator-coupled-max-spread = <300000>;
184					regulator-max-step-microvolt = <100000>;
185					regulator-always-on;
186
187					nvidia,tegra-cpu-regulator;
188				};
189
190				vdd_1v8: vio {
191					regulator-name = "vdd_1v8_gen";
192					regulator-min-microvolt = <1800000>;
193					regulator-max-microvolt = <1800000>;
194					regulator-always-on;
195				};
196
197				ldo1_reg: ldo1 {
198					regulator-name = "vdd_pexa,vdd_pexb";
199					regulator-min-microvolt = <1050000>;
200					regulator-max-microvolt = <1050000>;
201					regulator-always-on;
202				};
203
204				ldo2_reg: ldo2 {
205					regulator-name = "vdd_sata,avdd_plle";
206					regulator-min-microvolt = <1050000>;
207					regulator-max-microvolt = <1050000>;
208					regulator-always-on;
209				};
210
211				/* LDO3 is not connected to anything */
212
213				ldo4_reg: ldo4 {
214					regulator-name = "vdd_rtc";
215					regulator-min-microvolt = <1200000>;
216					regulator-max-microvolt = <1200000>;
217					regulator-always-on;
218				};
219
220				ldo5_reg: ldo5 {
221					regulator-name = "vddio_sdmmc,avdd_vdac";
222					regulator-min-microvolt = <1800000>;
223					regulator-max-microvolt = <3300000>;
224					regulator-always-on;
225				};
226
227				ldo6_reg: ldo6 {
228					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
229					regulator-min-microvolt = <1200000>;
230					regulator-max-microvolt = <1200000>;
231					regulator-always-on;
232				};
233
234				ldo7_reg: ldo7 {
235					regulator-name = "vdd_pllm,x,u,a_p_c_s";
236					regulator-min-microvolt = <1200000>;
237					regulator-max-microvolt = <1200000>;
238					regulator-always-on;
239				};
240
241				ldo8_reg: ldo8 {
242					regulator-name = "vdd_ddr_hs";
243					regulator-min-microvolt = <1000000>;
244					regulator-max-microvolt = <1000000>;
245					regulator-always-on;
246				};
247			};
248		};
249
250		vdd_core: tps62361@60 {
251			compatible = "ti,tps62361";
252			reg = <0x60>;
253
254			regulator-name = "vdd_core";
255			regulator-min-microvolt = <950000>;
256			regulator-max-microvolt = <1350000>;
257			regulator-coupled-with = <&vdd_cpu>;
258			regulator-coupled-max-spread = <300000>;
259			regulator-max-step-microvolt = <100000>;
260			regulator-boot-on;
261			regulator-always-on;
262			ti,vsel0-state-high;
263			ti,vsel1-state-high;
264			ti,enable-vout-discharge;
265
266			nvidia,tegra-core-regulator;
267		};
268	};
269
270	pmc@7000e400 {
271		status = "okay";
272		nvidia,invert-interrupt;
273		nvidia,suspend-mode = <1>;
274		nvidia,cpu-pwr-good-time = <2000>;
275		nvidia,cpu-pwr-off-time = <200>;
276		nvidia,core-pwr-good-time = <3845 3845>;
277		nvidia,core-pwr-off-time = <458>;
278		nvidia,core-power-req-active-high;
279		nvidia,sys-clock-req-active-high;
280	};
281
282	mc_timings: memory-controller@7000f000 {
283		/* timings located at &mc_timings below */
284	};
285
286	emc_timings: memory-controller@7000f400 {
287		/* timings located at &emc_timings below */
288	};
289
290	hda@70030000 {
291		status = "okay";
292	};
293
294	wifi_pwrseq: wifi_pwrseq {
295		compatible = "mmc-pwrseq-simple";
296
297		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
298		clock-names = "ext_clock";
299
300		reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
301		post-power-on-delay-ms = <300>;
302		power-off-delay-us = <300>;
303	};
304
305	sdmmc3: mmc@78000400 {
306		status = "okay";
307
308		#address-cells = <1>;
309		#size-cells = <0>;
310
311		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
312		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
313		assigned-clock-rates = <50000000>;
314
315		max-frequency = <50000000>;
316		keep-power-in-suspend;
317
318		bus-width = <4>;
319		non-removable;
320
321		mmc-pwrseq = <&wifi_pwrseq>;
322		vmmc-supply = <&sdmmc_3v3_reg>;
323		vqmmc-supply = <&vdd_1v8>;
324
325		/* Azurewave AW-NH660 BCM4330 */
326		brcmf: wifi@1 {
327			reg = <1>;
328			compatible = "brcm,bcm4329-fmac";
329			interrupt-parent = <&gpio>;
330			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
331			interrupt-names = "host-wake";
332		};
333	};
334
335	sdmmc4: mmc@78000600 {
336		status = "okay";
337
338		keep-power-in-suspend;
339		bus-width = <8>;
340		non-removable;
341		vmmc-supply = <&sys_3v3_reg>;
342		vqmmc-supply = <&vdd_1v8>;
343		nvidia,default-tap = <0x0F>;
344		max-frequency = <25500000>;
345	};
346
347	usb@7d000000 {
348		compatible = "nvidia,tegra30-udc";
349		status = "okay";
350	};
351
352	usb-phy@7d000000 {
353		status = "okay";
354		dr_mode = "peripheral";
355	};
356
357	usb@7d004000 {
358		status = "okay";
359		#address-cells = <1>;
360		#size-cells = <0>;
361
362		smsc@2 { /* SMSC 10/100T Ethernet Controller */
363			compatible = "usb424,9e00";
364			reg = <2>;
365			local-mac-address = [00 11 22 33 44 55];
366		};
367	};
368
369	usb-phy@7d004000 {
370		vbus-supply = <&vdd_smsc>;
371		status = "okay";
372	};
373
374	usb@7d008000 {
375		status = "okay";
376	};
377
378	usb-phy@7d008000 {
379		vbus-supply = <&usb3_vbus_reg>;
380		status = "okay";
381	};
382
383	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
384	clk32k_in: clock {
385		compatible = "fixed-clock";
386		#clock-cells = <0>;
387		clock-frequency = <32768>;
388		clock-output-names = "pmic-oscillator";
389	};
390
391	cpus {
392		cpu0: cpu@0 {
393			operating-points-v2 = <&cpu0_opp_table>;
394			cpu-supply = <&vdd_cpu>;
395			#cooling-cells = <2>;
396		};
397
398		cpu1: cpu@1 {
399			operating-points-v2 = <&cpu0_opp_table>;
400			cpu-supply = <&vdd_cpu>;
401			#cooling-cells = <2>;
402		};
403
404		cpu2: cpu@2 {
405			operating-points-v2 = <&cpu0_opp_table>;
406			cpu-supply = <&vdd_cpu>;
407			#cooling-cells = <2>;
408		};
409
410		cpu3: cpu@3 {
411			operating-points-v2 = <&cpu0_opp_table>;
412			cpu-supply = <&vdd_cpu>;
413			#cooling-cells = <2>;
414		};
415	};
416
417	firmware {
418		trusted-foundations {
419			compatible = "tlm,trusted-foundations";
420			tlm,version-major = <0x0>;
421			tlm,version-minor = <0x0>;
422		};
423	};
424
425	fan: gpio_fan {
426		compatible = "gpio-fan";
427		gpios = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
428		gpio-fan,speed-map = <0    0
429				      4500 1>;
430		#cooling-cells = <2>;
431	};
432
433	thermal-zones {
434		cpu_thermal: cpu-thermal {
435			polling-delay = <5000>;
436			polling-delay-passive = <5000>;
437
438			thermal-sensors = <&cpu_temp 1>;
439
440			trips {
441				cpu_alert0: cpu-alert0 {
442					temperature = <50000>;
443					hysteresis = <10000>;
444					type = "active";
445				};
446				cpu_alert1: cpu-alert1 {
447					temperature = <70000>;
448					hysteresis = <5000>;
449					type = "passive";
450				};
451				cpu_crit: cpu-crit {
452					temperature = <90000>;
453					hysteresis = <2000>;
454					type = "critical";
455				};
456			};
457
458			cooling-maps {
459				map0 {
460					trip = <&cpu_alert0>;
461					cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
462				};
463				map1 {
464					trip = <&cpu_alert1>;
465					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
466							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
467							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
468							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
469							 <&actmon THERMAL_NO_LIMIT
470								  THERMAL_NO_LIMIT>;
471				};
472			};
473		};
474	};
475
476	vdd_12v_in: vdd_12v_in {
477		compatible = "regulator-fixed";
478		regulator-name = "vdd_12v_in";
479		regulator-min-microvolt = <12000000>;
480		regulator-max-microvolt = <12000000>;
481		regulator-always-on;
482	};
483
484	sdmmc_3v3_reg: sdmmc_3v3_reg {
485		compatible = "regulator-fixed";
486		regulator-name = "sdmmc_3v3";
487		regulator-min-microvolt = <3300000>;
488		regulator-max-microvolt = <3300000>;
489		enable-active-high;
490		regulator-always-on;
491		gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
492		vin-supply = <&sys_3v3_reg>;
493	};
494
495	vdd_fuse_3v3_reg: vdd_fuse_3v3_reg {
496		compatible = "regulator-fixed";
497		regulator-name = "vdd_fuse_3v3";
498		regulator-min-microvolt = <3300000>;
499		regulator-max-microvolt = <3300000>;
500		enable-active-high;
501		gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
502		vin-supply = <&sys_3v3_reg>;
503		regulator-always-on;
504	};
505
506	vdd_vid_reg: vdd_vid_reg {
507		compatible = "regulator-fixed";
508		regulator-name = "vddio_vid";
509		regulator-min-microvolt = <5000000>;
510		regulator-max-microvolt = <5000000>;
511		enable-active-high;
512		gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
513		vin-supply = <&vdd_5v0_reg>;
514		regulator-boot-on;
515	};
516
517	ddr_reg: ddr_reg {
518		compatible = "regulator-fixed";
519		regulator-name = "vdd_ddr";
520		regulator-min-microvolt = <1500000>;
521		regulator-max-microvolt = <1500000>;
522		regulator-always-on;
523		enable-active-high;
524		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
525		regulator-boot-on;
526		vin-supply = <&vdd_12v_in>;
527	};
528
529	sys_3v3_reg: sys_3v3_reg {
530		compatible = "regulator-fixed";
531		regulator-name = "sys_3v3";
532		regulator-min-microvolt = <3300000>;
533		regulator-max-microvolt = <3300000>;
534		enable-active-high;
535		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
536		regulator-always-on;
537		regulator-boot-on;
538		vin-supply = <&vdd_12v_in>;
539	};
540
541	vdd_5v0_reg: vdd_5v0_reg {
542		compatible = "regulator-fixed";
543		regulator-name = "vdd_5v0";
544		regulator-min-microvolt = <5000000>;
545		regulator-max-microvolt = <5000000>;
546		enable-active-high;
547		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
548		regulator-always-on;
549		regulator-boot-on;
550		vin-supply = <&vdd_12v_in>;
551	};
552
553	vdd_smsc: vdd_smsc {
554		compatible = "regulator-fixed";
555		regulator-name = "vdd_smsc";
556		enable-active-high;
557		gpio = <&gpio TEGRA_GPIO(DD, 5) GPIO_ACTIVE_HIGH>;
558	};
559
560	usb3_vbus_reg: usb3_vbus_reg {
561		compatible = "regulator-fixed";
562		regulator-name = "usb3_vbus";
563		regulator-min-microvolt = <5000000>;
564		regulator-max-microvolt = <5000000>;
565		enable-active-high;
566		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
567		vin-supply = <&vdd_5v0_reg>;
568	};
569
570	gpio-keys {
571		compatible = "gpio-keys";
572
573		power {
574			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
575			debounce-interval = <10>;
576			linux,code = <KEY_POWER>;
577			wakeup-event-action = <EV_ACT_ASSERTED>;
578			wakeup-source;
579		};
580	};
581
582
583	leds {
584		compatible = "gpio-leds";
585
586		led-power {
587			label = "power-led";
588			gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
589			default-state = "on";
590			linux,default-trigger = "heartbeat";
591			retain-state-suspended;
592		};
593	};
594};
595&mc_timings {
596	emc-timings-0 {
597		nvidia,ram-code = <0>; /* Samsung RAM */
598		timing-25500000 {
599			clock-frequency = <25500000>;
600			nvidia,emem-configuration = <
601				0x00030003 /* MC_EMEM_ARB_CFG */
602				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
603				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
604				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
605				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
606				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
607				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
608				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
609				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
610				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
611				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
612				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
613				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
614				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
615				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
616				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
617				0x75830303 /* MC_EMEM_ARB_MISC0 */
618				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
619			>;
620		};
621		timing-51000000 {
622			clock-frequency = <51000000>;
623			nvidia,emem-configuration = <
624				0x00010003 /* MC_EMEM_ARB_CFG */
625				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
626				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
627				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
628				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
629				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
630				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
631				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
632				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
633				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
634				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
635				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
636				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
637				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
638				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
639				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
640				0x74630303 /* MC_EMEM_ARB_MISC0 */
641				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
642			>;
643		};
644		timing-102000000 {
645			clock-frequency = <102000000>;
646			nvidia,emem-configuration = <
647				0x00000003 /* MC_EMEM_ARB_CFG */
648				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
649				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
650				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
651				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
652				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
653				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
654				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
655				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
656				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
657				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
658				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
659				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
660				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
661				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
662				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
663				0x73c30504 /* MC_EMEM_ARB_MISC0 */
664				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
665			>;
666		};
667		timing-204000000 {
668			clock-frequency = <204000000>;
669			nvidia,emem-configuration = <
670				0x00000006 /* MC_EMEM_ARB_CFG */
671				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
672				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
673				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
674				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
675				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
676				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
677				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
678				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
679				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
680				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
681				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
682				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
683				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
684				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
685				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
686				0x73840a06 /* MC_EMEM_ARB_MISC0 */
687				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
688			>;
689		};
690		timing-400000000 {
691			clock-frequency = <400000000>;
692			nvidia,emem-configuration = <
693				0x0000000c /* MC_EMEM_ARB_CFG */
694				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
695				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
696				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
697				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
698				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
699				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
700				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
701				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
702				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
703				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
704				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
705				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
706				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
707				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
708				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
709				0x7086120a /* MC_EMEM_ARB_MISC0 */
710				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
711			>;
712		};
713		timing-800000000 {
714			clock-frequency = <800000000>;
715			nvidia,emem-configuration = <
716				0x00000018 /* MC_EMEM_ARB_CFG */
717				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
718				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
719				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
720				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
721				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
722				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
723				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
724				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
725				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
726				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
727				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
728				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
729				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
730				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
731				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
732				0x712c2414 /* MC_EMEM_ARB_MISC0 */
733				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
734			>;
735		};
736	};
737	emc-timings-1 {
738		nvidia,ram-code = <1>; /* Hynix M RAM */
739		timing-25500000 {
740			clock-frequency = <25500000>;
741			nvidia,emem-configuration = <
742				0x00030003 /* MC_EMEM_ARB_CFG */
743				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
744				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
745				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
746				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
747				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
748				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
749				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
750				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
751				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
752				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
753				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
754				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
755				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
756				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
757				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
758				0x75830303 /* MC_EMEM_ARB_MISC0 */
759				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
760			>;
761		};
762		timing-51000000 {
763			clock-frequency = <51000000>;
764			nvidia,emem-configuration = <
765				0x00010003 /* MC_EMEM_ARB_CFG */
766				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
767				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
768				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
769				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
770				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
771				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
772				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
773				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
774				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
775				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
776				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
777				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
778				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
779				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
780				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
781				0x74630303 /* MC_EMEM_ARB_MISC0 */
782				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
783			>;
784		};
785		timing-102000000 {
786			clock-frequency = <102000000>;
787			nvidia,emem-configuration = <
788				0x00000003 /* MC_EMEM_ARB_CFG */
789				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
790				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
791				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
792				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
793				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
794				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
795				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
796				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
797				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
798				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
799				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
800				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
801				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
802				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
803				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
804				0x73c30504 /* MC_EMEM_ARB_MISC0 */
805				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
806			>;
807		};
808		timing-204000000 {
809			clock-frequency = <204000000>;
810			nvidia,emem-configuration = <
811				0x00000006 /* MC_EMEM_ARB_CFG */
812				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
813				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
814				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
815				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
816				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
817				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
818				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
819				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
820				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
821				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
822				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
823				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
824				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
825				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
826				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
827				0x73840a06 /* MC_EMEM_ARB_MISC0 */
828				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
829			>;
830		};
831		timing-400000000 {
832			clock-frequency = <400000000>;
833			nvidia,emem-configuration = <
834				0x0000000c /* MC_EMEM_ARB_CFG */
835				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
836				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
837				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
838				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
839				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
840				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
841				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
842				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
843				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
844				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
845				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
846				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
847				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
848				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
849				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
850				0x7086120a /* MC_EMEM_ARB_MISC0 */
851				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
852			>;
853		};
854		timing-800000000 {
855			clock-frequency = <800000000>;
856			nvidia,emem-configuration = <
857				0x00000018 /* MC_EMEM_ARB_CFG */
858				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
859				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
860				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
861				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
862				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
863				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
864				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
865				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
866				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
867				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
868				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
869				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
870				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
871				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
872				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
873				0x712c2414 /* MC_EMEM_ARB_MISC0 */
874				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
875			>;
876		};
877	};
878	emc-timings-2 {
879		nvidia,ram-code = <2>; /* Hynix A RAM */
880		timing-25500000 {
881			clock-frequency = <25500000>;
882			nvidia,emem-configuration = <
883				0x00030003 /* MC_EMEM_ARB_CFG */
884				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
885				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
886				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
887				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
888				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
889				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
890				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
891				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
892				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
893				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
894				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
895				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
896				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
897				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
898				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
899				0x75e30303 /* MC_EMEM_ARB_MISC0 */
900				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
901			>;
902		};
903		timing-51000000 {
904			clock-frequency = <51000000>;
905			nvidia,emem-configuration = <
906				0x00010003 /* MC_EMEM_ARB_CFG */
907				0xc0000010 /* MC_EMEM_ARB_OUTSTANDING_REQ */
908				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
909				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
910				0x00000002 /* MC_EMEM_ARB_TIMING_RC */
911				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
912				0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
913				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
914				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
915				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
916				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
917				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
918				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
919				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
920				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
921				0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
922				0x74e30303 /* MC_EMEM_ARB_MISC0 */
923				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
924			>;
925		};
926		timing-102000000 {
927			clock-frequency = <102000000>;
928			nvidia,emem-configuration = <
929				0x00000003 /* MC_EMEM_ARB_CFG */
930				0xc0000018 /* MC_EMEM_ARB_OUTSTANDING_REQ */
931				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
932				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
933				0x00000003 /* MC_EMEM_ARB_TIMING_RC */
934				0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
935				0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
936				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
937				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
938				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
939				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
940				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
941				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
942				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
943				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
944				0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
945				0x74430504 /* MC_EMEM_ARB_MISC0 */
946				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
947			>;
948		};
949		timing-204000000 {
950			clock-frequency = <204000000>;
951			nvidia,emem-configuration = <
952				0x00000006 /* MC_EMEM_ARB_CFG */
953				0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
954				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
955				0x00000001 /* MC_EMEM_ARB_TIMING_RP */
956				0x00000005 /* MC_EMEM_ARB_TIMING_RC */
957				0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
958				0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
959				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
960				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
961				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
962				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
963				0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
964				0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
965				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
966				0x06020102 /* MC_EMEM_ARB_DA_TURNS */
967				0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
968				0x74040a06 /* MC_EMEM_ARB_MISC0 */
969				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
970			>;
971		};
972		timing-400000000 {
973			clock-frequency = <400000000>;
974			nvidia,emem-configuration = <
975				0x0000000c /* MC_EMEM_ARB_CFG */
976				0xc0000048 /* MC_EMEM_ARB_OUTSTANDING_REQ */
977				0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
978				0x00000002 /* MC_EMEM_ARB_TIMING_RP */
979				0x00000009 /* MC_EMEM_ARB_TIMING_RC */
980				0x00000005 /* MC_EMEM_ARB_TIMING_RAS */
981				0x00000007 /* MC_EMEM_ARB_TIMING_FAW */
982				0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
983				0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
984				0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
985				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
986				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
987				0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
988				0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
989				0x06030202 /* MC_EMEM_ARB_DA_TURNS */
990				0x000d0709 /* MC_EMEM_ARB_DA_COVERS */
991				0x7086120a /* MC_EMEM_ARB_MISC0 */
992				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
993			>;
994		};
995		timing-800000000 {
996			clock-frequency = <800000000>;
997			nvidia,emem-configuration = <
998				0x00000018 /* MC_EMEM_ARB_CFG */
999				0xc0000090 /* MC_EMEM_ARB_OUTSTANDING_REQ */
1000				0x00000004 /* MC_EMEM_ARB_TIMING_RCD */
1001				0x00000005 /* MC_EMEM_ARB_TIMING_RP */
1002				0x00000013 /* MC_EMEM_ARB_TIMING_RC */
1003				0x0000000c /* MC_EMEM_ARB_TIMING_RAS */
1004				0x0000000f /* MC_EMEM_ARB_TIMING_FAW */
1005				0x00000002 /* MC_EMEM_ARB_TIMING_RRD */
1006				0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
1007				0x0000000c /* MC_EMEM_ARB_TIMING_WAP2PRE */
1008				0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
1009				0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
1010				0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
1011				0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
1012				0x08040202 /* MC_EMEM_ARB_DA_TURNS */
1013				0x00160d13 /* MC_EMEM_ARB_DA_COVERS */
1014				0x712c2414 /* MC_EMEM_ARB_MISC0 */
1015				0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
1016			>;
1017		};
1018	};
1019};
1020&emc_timings {
1021	emc-timings-0 {
1022		nvidia,ram-code = <0>;  /* Samsung RAM */
1023		timing-25500000 {
1024			clock-frequency = <25500000>;
1025			nvidia,emc-auto-cal-interval = <0x001fffff>;
1026			nvidia,emc-mode-1 = <0x80100003>;
1027			nvidia,emc-mode-2 = <0x80200008>;
1028			nvidia,emc-mode-reset = <0x80001221>;
1029			nvidia,emc-zcal-cnt-long = <0x00000040>;
1030			nvidia,emc-cfg-periodic-qrst;
1031			nvidia,emc-cfg-dyn-self-ref;
1032			nvidia,emc-configuration = <
1033				0x00000001 /* EMC_RC */
1034				0x00000006 /* EMC_RFC */
1035				0x00000000 /* EMC_RAS */
1036				0x00000000 /* EMC_RP */
1037				0x00000002 /* EMC_R2W */
1038				0x0000000a /* EMC_W2R */
1039				0x00000005 /* EMC_R2P */
1040				0x0000000b /* EMC_W2P */
1041				0x00000000 /* EMC_RD_RCD */
1042				0x00000000 /* EMC_WR_RCD */
1043				0x00000003 /* EMC_RRD */
1044				0x00000001 /* EMC_REXT */
1045				0x00000000 /* EMC_WEXT */
1046				0x00000005 /* EMC_WDV */
1047				0x00000005 /* EMC_QUSE */
1048				0x00000004 /* EMC_QRST */
1049				0x0000000a /* EMC_QSAFE */
1050				0x0000000b /* EMC_RDV */
1051				0x000000c0 /* EMC_REFRESH */
1052				0x00000000 /* EMC_BURST_REFRESH_NUM */
1053				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
1054				0x00000002 /* EMC_PDEX2WR */
1055				0x00000002 /* EMC_PDEX2RD */
1056				0x00000001 /* EMC_PCHG2PDEN */
1057				0x00000000 /* EMC_ACT2PDEN */
1058				0x00000007 /* EMC_AR2PDEN */
1059				0x0000000f /* EMC_RW2PDEN */
1060				0x00000007 /* EMC_TXSR */
1061				0x00000007 /* EMC_TXSRDLL */
1062				0x00000004 /* EMC_TCKE */
1063				0x00000002 /* EMC_TFAW */
1064				0x00000000 /* EMC_TRPAB */
1065				0x00000004 /* EMC_TCLKSTABLE */
1066				0x00000005 /* EMC_TCLKSTOP */
1067				0x000000c7 /* EMC_TREFBW */
1068				0x00000006 /* EMC_QUSE_EXTRA */
1069				0x00000004 /* EMC_FBIO_CFG6 */
1070				0x00000000 /* EMC_ODT_WRITE */
1071				0x00000000 /* EMC_ODT_READ */
1072				0x00004288 /* EMC_FBIO_CFG5 */
1073				0x007800a4 /* EMC_CFG_DIG_DLL */
1074				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1075				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1076				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1077				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1078				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1079				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1080				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1081				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1082				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1083				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1084				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1085				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1086				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1087				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1088				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1089				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1090				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1091				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1092				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1093				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1094				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1095				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1096				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1097				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1098				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1099				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1100				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1101				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1102				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1103				0x000002a0 /* EMC_XM2CMDPADCTRL */
1104				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1105				0x00000000 /* EMC_XM2DQPADCTRL2 */
1106				0x77fff884 /* EMC_XM2CLKPADCTRL */
1107				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1108				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1109				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1110				0x08000168 /* EMC_XM2QUSEPADCTRL */
1111				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1112				0x00000802 /* EMC_CTT_TERM_CTRL */
1113				0x00000000 /* EMC_ZCAL_INTERVAL */
1114				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1115				0x000c000c /* EMC_MRS_WAIT_CNT */
1116				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1117				0x00000000 /* EMC_CTT */
1118				0x00000000 /* EMC_CTT_DURATION */
1119				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1120				0xe8000000 /* EMC_FBIO_SPARE */
1121				0xff00ff00 /* EMC_CFG_RSV */
1122			>;
1123		};
1124		timing-51000000 {
1125			clock-frequency = <51000000>;
1126			nvidia,emc-auto-cal-interval = <0x001fffff>;
1127			nvidia,emc-mode-1 = <0x80100003>;
1128			nvidia,emc-mode-2 = <0x80200008>;
1129			nvidia,emc-mode-reset = <0x80001221>;
1130			nvidia,emc-zcal-cnt-long = <0x00000040>;
1131			nvidia,emc-cfg-periodic-qrst;
1132			nvidia,emc-cfg-dyn-self-ref;
1133			nvidia,emc-configuration = <
1134				0x00000002 /* EMC_RC */
1135				0x0000000d /* EMC_RFC */
1136				0x00000001 /* EMC_RAS */
1137				0x00000000 /* EMC_RP */
1138				0x00000002 /* EMC_R2W */
1139				0x0000000a /* EMC_W2R */
1140				0x00000005 /* EMC_R2P */
1141				0x0000000b /* EMC_W2P */
1142				0x00000000 /* EMC_RD_RCD */
1143				0x00000000 /* EMC_WR_RCD */
1144				0x00000003 /* EMC_RRD */
1145				0x00000001 /* EMC_REXT */
1146				0x00000000 /* EMC_WEXT */
1147				0x00000005 /* EMC_WDV */
1148				0x00000005 /* EMC_QUSE */
1149				0x00000004 /* EMC_QRST */
1150				0x0000000a /* EMC_QSAFE */
1151				0x0000000b /* EMC_RDV */
1152				0x00000181 /* EMC_REFRESH */
1153				0x00000000 /* EMC_BURST_REFRESH_NUM */
1154				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1155				0x00000002 /* EMC_PDEX2WR */
1156				0x00000002 /* EMC_PDEX2RD */
1157				0x00000001 /* EMC_PCHG2PDEN */
1158				0x00000000 /* EMC_ACT2PDEN */
1159				0x00000007 /* EMC_AR2PDEN */
1160				0x0000000f /* EMC_RW2PDEN */
1161				0x0000000e /* EMC_TXSR */
1162				0x0000000e /* EMC_TXSRDLL */
1163				0x00000004 /* EMC_TCKE */
1164				0x00000003 /* EMC_TFAW */
1165				0x00000000 /* EMC_TRPAB */
1166				0x00000004 /* EMC_TCLKSTABLE */
1167				0x00000005 /* EMC_TCLKSTOP */
1168				0x0000018e /* EMC_TREFBW */
1169				0x00000006 /* EMC_QUSE_EXTRA */
1170				0x00000004 /* EMC_FBIO_CFG6 */
1171				0x00000000 /* EMC_ODT_WRITE */
1172				0x00000000 /* EMC_ODT_READ */
1173				0x00004288 /* EMC_FBIO_CFG5 */
1174				0x007800a4 /* EMC_CFG_DIG_DLL */
1175				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1176				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1177				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1178				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1179				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1180				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1181				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1182				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1183				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1184				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1185				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1186				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1187				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1188				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1189				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1190				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1191				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1192				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1193				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1194				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1195				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1196				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1197				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1198				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1199				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1200				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1201				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1202				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1203				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1204				0x000002a0 /* EMC_XM2CMDPADCTRL */
1205				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1206				0x00000000 /* EMC_XM2DQPADCTRL2 */
1207				0x77fff884 /* EMC_XM2CLKPADCTRL */
1208				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1209				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1210				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1211				0x08000168 /* EMC_XM2QUSEPADCTRL */
1212				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1213				0x00000802 /* EMC_CTT_TERM_CTRL */
1214				0x00000000 /* EMC_ZCAL_INTERVAL */
1215				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1216				0x000c000c /* EMC_MRS_WAIT_CNT */
1217				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1218				0x00000000 /* EMC_CTT */
1219				0x00000000 /* EMC_CTT_DURATION */
1220				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1221				0xe8000000 /* EMC_FBIO_SPARE */
1222				0xff00ff00 /* EMC_CFG_RSV */
1223			>;
1224		};
1225		timing-102000000 {
1226			clock-frequency = <102000000>;
1227			nvidia,emc-auto-cal-interval = <0x001fffff>;
1228			nvidia,emc-mode-1 = <0x80100003>;
1229			nvidia,emc-mode-2 = <0x80200008>;
1230			nvidia,emc-mode-reset = <0x80001221>;
1231			nvidia,emc-zcal-cnt-long = <0x00000040>;
1232			nvidia,emc-cfg-periodic-qrst;
1233			nvidia,emc-cfg-dyn-self-ref;
1234			nvidia,emc-configuration = <
1235				0x00000004 /* EMC_RC */
1236				0x0000001a /* EMC_RFC */
1237				0x00000003 /* EMC_RAS */
1238				0x00000001 /* EMC_RP */
1239				0x00000002 /* EMC_R2W */
1240				0x0000000a /* EMC_W2R */
1241				0x00000005 /* EMC_R2P */
1242				0x0000000b /* EMC_W2P */
1243				0x00000001 /* EMC_RD_RCD */
1244				0x00000001 /* EMC_WR_RCD */
1245				0x00000003 /* EMC_RRD */
1246				0x00000001 /* EMC_REXT */
1247				0x00000000 /* EMC_WEXT */
1248				0x00000005 /* EMC_WDV */
1249				0x00000005 /* EMC_QUSE */
1250				0x00000004 /* EMC_QRST */
1251				0x0000000a /* EMC_QSAFE */
1252				0x0000000b /* EMC_RDV */
1253				0x00000303 /* EMC_REFRESH */
1254				0x00000000 /* EMC_BURST_REFRESH_NUM */
1255				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1256				0x00000002 /* EMC_PDEX2WR */
1257				0x00000002 /* EMC_PDEX2RD */
1258				0x00000001 /* EMC_PCHG2PDEN */
1259				0x00000000 /* EMC_ACT2PDEN */
1260				0x00000007 /* EMC_AR2PDEN */
1261				0x0000000f /* EMC_RW2PDEN */
1262				0x0000001c /* EMC_TXSR */
1263				0x0000001c /* EMC_TXSRDLL */
1264				0x00000004 /* EMC_TCKE */
1265				0x00000005 /* EMC_TFAW */
1266				0x00000000 /* EMC_TRPAB */
1267				0x00000004 /* EMC_TCLKSTABLE */
1268				0x00000005 /* EMC_TCLKSTOP */
1269				0x0000031c /* EMC_TREFBW */
1270				0x00000006 /* EMC_QUSE_EXTRA */
1271				0x00000004 /* EMC_FBIO_CFG6 */
1272				0x00000000 /* EMC_ODT_WRITE */
1273				0x00000000 /* EMC_ODT_READ */
1274				0x00004288 /* EMC_FBIO_CFG5 */
1275				0x007800a4 /* EMC_CFG_DIG_DLL */
1276				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1277				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1278				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1279				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1280				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1281				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1282				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1283				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1284				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1285				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1286				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1287				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1288				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1289				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1290				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1291				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1292				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1293				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1294				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1295				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1296				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1297				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1298				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1299				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1300				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1301				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1302				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1303				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1304				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1305				0x000002a0 /* EMC_XM2CMDPADCTRL */
1306				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1307				0x00000000 /* EMC_XM2DQPADCTRL2 */
1308				0x77fff884 /* EMC_XM2CLKPADCTRL */
1309				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1310				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1311				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1312				0x08000168 /* EMC_XM2QUSEPADCTRL */
1313				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1314				0x00000802 /* EMC_CTT_TERM_CTRL */
1315				0x00000000 /* EMC_ZCAL_INTERVAL */
1316				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1317				0x000c000c /* EMC_MRS_WAIT_CNT */
1318				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1319				0x00000000 /* EMC_CTT */
1320				0x00000000 /* EMC_CTT_DURATION */
1321				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1322				0xe8000000 /* EMC_FBIO_SPARE */
1323				0xff00ff00 /* EMC_CFG_RSV */
1324			>;
1325		};
1326		timing-204000000 {
1327			clock-frequency = <204000000>;
1328			nvidia,emc-auto-cal-interval = <0x001fffff>;
1329			nvidia,emc-mode-1 = <0x80100003>;
1330			nvidia,emc-mode-2 = <0x80200008>;
1331			nvidia,emc-mode-reset = <0x80001221>;
1332			nvidia,emc-zcal-cnt-long = <0x00000040>;
1333			nvidia,emc-cfg-periodic-qrst;
1334			nvidia,emc-cfg-dyn-self-ref;
1335			nvidia,emc-configuration = <
1336				0x00000009 /* EMC_RC */
1337				0x00000035 /* EMC_RFC */
1338				0x00000007 /* EMC_RAS */
1339				0x00000002 /* EMC_RP */
1340				0x00000002 /* EMC_R2W */
1341				0x0000000a /* EMC_W2R */
1342				0x00000005 /* EMC_R2P */
1343				0x0000000b /* EMC_W2P */
1344				0x00000002 /* EMC_RD_RCD */
1345				0x00000002 /* EMC_WR_RCD */
1346				0x00000003 /* EMC_RRD */
1347				0x00000001 /* EMC_REXT */
1348				0x00000000 /* EMC_WEXT */
1349				0x00000005 /* EMC_WDV */
1350				0x00000005 /* EMC_QUSE */
1351				0x00000004 /* EMC_QRST */
1352				0x0000000a /* EMC_QSAFE */
1353				0x0000000b /* EMC_RDV */
1354				0x00000607 /* EMC_REFRESH */
1355				0x00000000 /* EMC_BURST_REFRESH_NUM */
1356				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1357				0x00000002 /* EMC_PDEX2WR */
1358				0x00000002 /* EMC_PDEX2RD */
1359				0x00000001 /* EMC_PCHG2PDEN */
1360				0x00000000 /* EMC_ACT2PDEN */
1361				0x00000007 /* EMC_AR2PDEN */
1362				0x0000000f /* EMC_RW2PDEN */
1363				0x00000038 /* EMC_TXSR */
1364				0x00000038 /* EMC_TXSRDLL */
1365				0x00000004 /* EMC_TCKE */
1366				0x00000009 /* EMC_TFAW */
1367				0x00000000 /* EMC_TRPAB */
1368				0x00000004 /* EMC_TCLKSTABLE */
1369				0x00000005 /* EMC_TCLKSTOP */
1370				0x00000638 /* EMC_TREFBW */
1371				0x00000006 /* EMC_QUSE_EXTRA */
1372				0x00000006 /* EMC_FBIO_CFG6 */
1373				0x00000000 /* EMC_ODT_WRITE */
1374				0x00000000 /* EMC_ODT_READ */
1375				0x00004288 /* EMC_FBIO_CFG5 */
1376				0x004400a4 /* EMC_CFG_DIG_DLL */
1377				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1378				0x00080000 /* EMC_DLL_XFORM_DQS0 */
1379				0x00080000 /* EMC_DLL_XFORM_DQS1 */
1380				0x00080000 /* EMC_DLL_XFORM_DQS2 */
1381				0x00080000 /* EMC_DLL_XFORM_DQS3 */
1382				0x00080000 /* EMC_DLL_XFORM_DQS4 */
1383				0x00080000 /* EMC_DLL_XFORM_DQS5 */
1384				0x00080000 /* EMC_DLL_XFORM_DQS6 */
1385				0x00080000 /* EMC_DLL_XFORM_DQS7 */
1386				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1387				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1388				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1389				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1390				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1391				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1392				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1393				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1394				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1395				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1396				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1397				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1398				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1399				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1400				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1401				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1402				0x00080000 /* EMC_DLL_XFORM_DQ0 */
1403				0x00080000 /* EMC_DLL_XFORM_DQ1 */
1404				0x00080000 /* EMC_DLL_XFORM_DQ2 */
1405				0x00080000 /* EMC_DLL_XFORM_DQ3 */
1406				0x000002a0 /* EMC_XM2CMDPADCTRL */
1407				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1408				0x00000000 /* EMC_XM2DQPADCTRL2 */
1409				0x77fff884 /* EMC_XM2CLKPADCTRL */
1410				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1411				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1412				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1413				0x08000168 /* EMC_XM2QUSEPADCTRL */
1414				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1415				0x00000802 /* EMC_CTT_TERM_CTRL */
1416				0x00020000 /* EMC_ZCAL_INTERVAL */
1417				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1418				0x000c000c /* EMC_MRS_WAIT_CNT */
1419				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1420				0x00000000 /* EMC_CTT */
1421				0x00000000 /* EMC_CTT_DURATION */
1422				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
1423				0xe8000000 /* EMC_FBIO_SPARE */
1424				0xff00ff00 /* EMC_CFG_RSV */
1425			>;
1426		};
1427		timing-400000000 {
1428			clock-frequency = <400000000>;
1429			nvidia,emc-auto-cal-interval = <0x001fffff>;
1430			nvidia,emc-mode-1 = <0x80100002>;
1431			nvidia,emc-mode-2 = <0x80200000>;
1432			nvidia,emc-mode-reset = <0x80000521>;
1433			nvidia,emc-zcal-cnt-long = <0x00000040>;
1434			nvidia,emc-configuration = <
1435				0x00000012 /* EMC_RC */
1436				0x00000066 /* EMC_RFC */
1437				0x0000000c /* EMC_RAS */
1438				0x00000004 /* EMC_RP */
1439				0x00000003 /* EMC_R2W */
1440				0x00000008 /* EMC_W2R */
1441				0x00000002 /* EMC_R2P */
1442				0x0000000a /* EMC_W2P */
1443				0x00000004 /* EMC_RD_RCD */
1444				0x00000004 /* EMC_WR_RCD */
1445				0x00000002 /* EMC_RRD */
1446				0x00000001 /* EMC_REXT */
1447				0x00000000 /* EMC_WEXT */
1448				0x00000004 /* EMC_WDV */
1449				0x00000006 /* EMC_QUSE */
1450				0x00000004 /* EMC_QRST */
1451				0x0000000a /* EMC_QSAFE */
1452				0x0000000c /* EMC_RDV */
1453				0x00000bf0 /* EMC_REFRESH */
1454				0x00000000 /* EMC_BURST_REFRESH_NUM */
1455				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
1456				0x00000001 /* EMC_PDEX2WR */
1457				0x00000008 /* EMC_PDEX2RD */
1458				0x00000001 /* EMC_PCHG2PDEN */
1459				0x00000000 /* EMC_ACT2PDEN */
1460				0x00000008 /* EMC_AR2PDEN */
1461				0x0000000f /* EMC_RW2PDEN */
1462				0x0000006c /* EMC_TXSR */
1463				0x00000200 /* EMC_TXSRDLL */
1464				0x00000004 /* EMC_TCKE */
1465				0x00000010 /* EMC_TFAW */
1466				0x00000000 /* EMC_TRPAB */
1467				0x00000004 /* EMC_TCLKSTABLE */
1468				0x00000005 /* EMC_TCLKSTOP */
1469				0x00000c30 /* EMC_TREFBW */
1470				0x00000000 /* EMC_QUSE_EXTRA */
1471				0x00000004 /* EMC_FBIO_CFG6 */
1472				0x00000000 /* EMC_ODT_WRITE */
1473				0x00000000 /* EMC_ODT_READ */
1474				0x00007088 /* EMC_FBIO_CFG5 */
1475				0x001d0084 /* EMC_CFG_DIG_DLL */
1476				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1477				0x0003c000 /* EMC_DLL_XFORM_DQS0 */
1478				0x0003c000 /* EMC_DLL_XFORM_DQS1 */
1479				0x0003c000 /* EMC_DLL_XFORM_DQS2 */
1480				0x0003c000 /* EMC_DLL_XFORM_DQS3 */
1481				0x0003c000 /* EMC_DLL_XFORM_DQS4 */
1482				0x0003c000 /* EMC_DLL_XFORM_DQS5 */
1483				0x0003c000 /* EMC_DLL_XFORM_DQS6 */
1484				0x0003c000 /* EMC_DLL_XFORM_DQS7 */
1485				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1486				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1487				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1488				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1489				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1490				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1491				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1492				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1493				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1494				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1495				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1496				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1497				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1498				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1499				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1500				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1501				0x00048000 /* EMC_DLL_XFORM_DQ0 */
1502				0x00048000 /* EMC_DLL_XFORM_DQ1 */
1503				0x00048000 /* EMC_DLL_XFORM_DQ2 */
1504				0x00048000 /* EMC_DLL_XFORM_DQ3 */
1505				0x000002a0 /* EMC_XM2CMDPADCTRL */
1506				0x0800013d /* EMC_XM2DQSPADCTRL2 */
1507				0x00000000 /* EMC_XM2DQPADCTRL2 */
1508				0x77fff884 /* EMC_XM2CLKPADCTRL */
1509				0x01f1f508 /* EMC_XM2COMPPADCTRL */
1510				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1511				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1512				0x080001e8 /* EMC_XM2QUSEPADCTRL */
1513				0x08000021 /* EMC_XM2DQSPADCTRL3 */
1514				0x00000802 /* EMC_CTT_TERM_CTRL */
1515				0x00020000 /* EMC_ZCAL_INTERVAL */
1516				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1517				0x0158000c /* EMC_MRS_WAIT_CNT */
1518				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1519				0x00000000 /* EMC_CTT */
1520				0x00000000 /* EMC_CTT_DURATION */
1521				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
1522				0xe8000000 /* EMC_FBIO_SPARE */
1523				0xff00ff89 /* EMC_CFG_RSV */
1524			>;
1525		};
1526		timing-800000000 {
1527			clock-frequency = <800000000>;
1528			nvidia,emc-auto-cal-interval = <0x001fffff>;
1529			nvidia,emc-mode-1 = <0x80100002>;
1530			nvidia,emc-mode-2 = <0x80200018>;
1531			nvidia,emc-mode-reset = <0x80000d71>;
1532			nvidia,emc-zcal-cnt-long = <0x00000040>;
1533			nvidia,emc-cfg-periodic-qrst;
1534			nvidia,emc-configuration = <
1535				0x00000025 /* EMC_RC */
1536				0x000000ce /* EMC_RFC */
1537				0x0000001a /* EMC_RAS */
1538				0x00000009 /* EMC_RP */
1539				0x00000005 /* EMC_R2W */
1540				0x0000000d /* EMC_W2R */
1541				0x00000004 /* EMC_R2P */
1542				0x00000013 /* EMC_W2P */
1543				0x00000009 /* EMC_RD_RCD */
1544				0x00000009 /* EMC_WR_RCD */
1545				0x00000004 /* EMC_RRD */
1546				0x00000001 /* EMC_REXT */
1547				0x00000000 /* EMC_WEXT */
1548				0x00000007 /* EMC_WDV */
1549				0x0000000a /* EMC_QUSE */
1550				0x00000009 /* EMC_QRST */
1551				0x0000000b /* EMC_QSAFE */
1552				0x00000011 /* EMC_RDV */
1553				0x00001820 /* EMC_REFRESH */
1554				0x00000000 /* EMC_BURST_REFRESH_NUM */
1555				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
1556				0x00000003 /* EMC_PDEX2WR */
1557				0x00000012 /* EMC_PDEX2RD */
1558				0x00000001 /* EMC_PCHG2PDEN */
1559				0x00000000 /* EMC_ACT2PDEN */
1560				0x0000000f /* EMC_AR2PDEN */
1561				0x00000018 /* EMC_RW2PDEN */
1562				0x000000d8 /* EMC_TXSR */
1563				0x00000200 /* EMC_TXSRDLL */
1564				0x00000005 /* EMC_TCKE */
1565				0x00000020 /* EMC_TFAW */
1566				0x00000000 /* EMC_TRPAB */
1567				0x00000007 /* EMC_TCLKSTABLE */
1568				0x00000008 /* EMC_TCLKSTOP */
1569				0x00001860 /* EMC_TREFBW */
1570				0x0000000b /* EMC_QUSE_EXTRA */
1571				0x00000006 /* EMC_FBIO_CFG6 */
1572				0x00000000 /* EMC_ODT_WRITE */
1573				0x00000000 /* EMC_ODT_READ */
1574				0x00005088 /* EMC_FBIO_CFG5 */
1575				0xf0070191 /* EMC_CFG_DIG_DLL */
1576				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1577				0x0000800a /* EMC_DLL_XFORM_DQS0 */
1578				0x0000000a /* EMC_DLL_XFORM_DQS1 */
1579				0x0000000a /* EMC_DLL_XFORM_DQS2 */
1580				0x0000000a /* EMC_DLL_XFORM_DQS3 */
1581				0x0000000a /* EMC_DLL_XFORM_DQS4 */
1582				0x0000000a /* EMC_DLL_XFORM_DQS5 */
1583				0x0000000a /* EMC_DLL_XFORM_DQS6 */
1584				0x0000000a /* EMC_DLL_XFORM_DQS7 */
1585				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
1586				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
1587				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
1588				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
1589				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
1590				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
1591				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
1592				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
1593				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1594				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1595				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1596				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1597				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1598				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1599				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1600				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1601				0x0000000a /* EMC_DLL_XFORM_DQ0 */
1602				0x0000000a /* EMC_DLL_XFORM_DQ1 */
1603				0x0000000a /* EMC_DLL_XFORM_DQ2 */
1604				0x0000000a /* EMC_DLL_XFORM_DQ3 */
1605				0x000002a0 /* EMC_XM2CMDPADCTRL */
1606				0x0600013d /* EMC_XM2DQSPADCTRL2 */
1607				0x22220000 /* EMC_XM2DQPADCTRL2 */
1608				0x77fff884 /* EMC_XM2CLKPADCTRL */
1609				0x01f1f501 /* EMC_XM2COMPPADCTRL */
1610				0x07077404 /* EMC_XM2VTTGENPADCTRL */
1611				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
1612				0x080001e8 /* EMC_XM2QUSEPADCTRL */
1613				0x08000021 /* EMC_XM2DQSPADCTRL3 */
1614				0x00000802 /* EMC_CTT_TERM_CTRL */
1615				0x00020000 /* EMC_ZCAL_INTERVAL */
1616				0x00000100 /* EMC_ZCAL_WAIT_CNT */
1617				0x00f0000c /* EMC_MRS_WAIT_CNT */
1618				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1619				0x00000000 /* EMC_CTT */
1620				0x00000000 /* EMC_CTT_DURATION */
1621				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
1622				0xe8000000 /* EMC_FBIO_SPARE */
1623				0xff00ff49 /* EMC_CFG_RSV */
1624			>;
1625		};
1626	};
1627	emc-timings-1 {
1628		nvidia,ram-code = <1>;  /* Hynix M RAM */
1629		timing-25500000 {
1630			clock-frequency = <25500000>;
1631			nvidia,emc-auto-cal-interval = <0x001fffff>;
1632			nvidia,emc-mode-1 = <0x80100003>;
1633			nvidia,emc-mode-2 = <0x80200008>;
1634			nvidia,emc-mode-reset = <0x80001221>;
1635			nvidia,emc-zcal-cnt-long = <0x00000040>;
1636			nvidia,emc-cfg-periodic-qrst;
1637			nvidia,emc-cfg-dyn-self-ref;
1638			nvidia,emc-configuration = <
1639				0x00000001 /* EMC_RC */
1640				0x00000006 /* EMC_RFC */
1641				0x00000000 /* EMC_RAS */
1642				0x00000000 /* EMC_RP */
1643				0x00000002 /* EMC_R2W */
1644				0x0000000a /* EMC_W2R */
1645				0x00000005 /* EMC_R2P */
1646				0x0000000b /* EMC_W2P */
1647				0x00000000 /* EMC_RD_RCD */
1648				0x00000000 /* EMC_WR_RCD */
1649				0x00000003 /* EMC_RRD */
1650				0x00000001 /* EMC_REXT */
1651				0x00000000 /* EMC_WEXT */
1652				0x00000005 /* EMC_WDV */
1653				0x00000005 /* EMC_QUSE */
1654				0x00000004 /* EMC_QRST */
1655				0x0000000a /* EMC_QSAFE */
1656				0x0000000b /* EMC_RDV */
1657				0x000000c0 /* EMC_REFRESH */
1658				0x00000000 /* EMC_BURST_REFRESH_NUM */
1659				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
1660				0x00000002 /* EMC_PDEX2WR */
1661				0x00000002 /* EMC_PDEX2RD */
1662				0x00000001 /* EMC_PCHG2PDEN */
1663				0x00000000 /* EMC_ACT2PDEN */
1664				0x00000007 /* EMC_AR2PDEN */
1665				0x0000000f /* EMC_RW2PDEN */
1666				0x00000007 /* EMC_TXSR */
1667				0x00000007 /* EMC_TXSRDLL */
1668				0x00000004 /* EMC_TCKE */
1669				0x00000002 /* EMC_TFAW */
1670				0x00000000 /* EMC_TRPAB */
1671				0x00000004 /* EMC_TCLKSTABLE */
1672				0x00000005 /* EMC_TCLKSTOP */
1673				0x000000c7 /* EMC_TREFBW */
1674				0x00000006 /* EMC_QUSE_EXTRA */
1675				0x00000004 /* EMC_FBIO_CFG6 */
1676				0x00000000 /* EMC_ODT_WRITE */
1677				0x00000000 /* EMC_ODT_READ */
1678				0x00004288 /* EMC_FBIO_CFG5 */
1679				0x007800a4 /* EMC_CFG_DIG_DLL */
1680				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1681				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1682				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1683				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1684				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1685				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1686				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1687				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1688				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1689				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1690				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1691				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1692				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1693				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1694				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1695				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1696				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1697				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1698				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1699				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1700				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1701				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1702				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1703				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1704				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1705				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1706				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1707				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1708				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1709				0x000002a0 /* EMC_XM2CMDPADCTRL */
1710				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1711				0x00000000 /* EMC_XM2DQPADCTRL2 */
1712				0x77fff884 /* EMC_XM2CLKPADCTRL */
1713				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1714				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1715				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1716				0x08000168 /* EMC_XM2QUSEPADCTRL */
1717				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1718				0x00000802 /* EMC_CTT_TERM_CTRL */
1719				0x00000000 /* EMC_ZCAL_INTERVAL */
1720				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1721				0x000c000c /* EMC_MRS_WAIT_CNT */
1722				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1723				0x00000000 /* EMC_CTT */
1724				0x00000000 /* EMC_CTT_DURATION */
1725				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1726				0xe8000000 /* EMC_FBIO_SPARE */
1727				0xff00ff00 /* EMC_CFG_RSV */
1728			>;
1729		};
1730		timing-51000000 {
1731			clock-frequency = <51000000>;
1732			nvidia,emc-auto-cal-interval = <0x001fffff>;
1733			nvidia,emc-mode-1 = <0x80100003>;
1734			nvidia,emc-mode-2 = <0x80200008>;
1735			nvidia,emc-mode-reset = <0x80001221>;
1736			nvidia,emc-zcal-cnt-long = <0x00000040>;
1737			nvidia,emc-cfg-periodic-qrst;
1738			nvidia,emc-cfg-dyn-self-ref;
1739			nvidia,emc-configuration = <
1740				0x00000002 /* EMC_RC */
1741				0x0000000d /* EMC_RFC */
1742				0x00000001 /* EMC_RAS */
1743				0x00000000 /* EMC_RP */
1744				0x00000002 /* EMC_R2W */
1745				0x0000000a /* EMC_W2R */
1746				0x00000005 /* EMC_R2P */
1747				0x0000000b /* EMC_W2P */
1748				0x00000000 /* EMC_RD_RCD */
1749				0x00000000 /* EMC_WR_RCD */
1750				0x00000003 /* EMC_RRD */
1751				0x00000001 /* EMC_REXT */
1752				0x00000000 /* EMC_WEXT */
1753				0x00000005 /* EMC_WDV */
1754				0x00000005 /* EMC_QUSE */
1755				0x00000004 /* EMC_QRST */
1756				0x0000000a /* EMC_QSAFE */
1757				0x0000000b /* EMC_RDV */
1758				0x00000181 /* EMC_REFRESH */
1759				0x00000000 /* EMC_BURST_REFRESH_NUM */
1760				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1761				0x00000002 /* EMC_PDEX2WR */
1762				0x00000002 /* EMC_PDEX2RD */
1763				0x00000001 /* EMC_PCHG2PDEN */
1764				0x00000000 /* EMC_ACT2PDEN */
1765				0x00000007 /* EMC_AR2PDEN */
1766				0x0000000f /* EMC_RW2PDEN */
1767				0x0000000e /* EMC_TXSR */
1768				0x0000000e /* EMC_TXSRDLL */
1769				0x00000004 /* EMC_TCKE */
1770				0x00000003 /* EMC_TFAW */
1771				0x00000000 /* EMC_TRPAB */
1772				0x00000004 /* EMC_TCLKSTABLE */
1773				0x00000005 /* EMC_TCLKSTOP */
1774				0x0000018e /* EMC_TREFBW */
1775				0x00000006 /* EMC_QUSE_EXTRA */
1776				0x00000004 /* EMC_FBIO_CFG6 */
1777				0x00000000 /* EMC_ODT_WRITE */
1778				0x00000000 /* EMC_ODT_READ */
1779				0x00004288 /* EMC_FBIO_CFG5 */
1780				0x007800a4 /* EMC_CFG_DIG_DLL */
1781				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1782				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1783				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1784				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1785				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1786				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1787				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1788				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1789				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1790				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1791				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1792				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1793				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1794				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1795				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1796				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1797				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1798				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1799				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1800				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1801				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1802				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1803				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1804				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1805				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1806				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1807				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1808				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1809				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1810				0x000002a0 /* EMC_XM2CMDPADCTRL */
1811				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1812				0x00000000 /* EMC_XM2DQPADCTRL2 */
1813				0x77fff884 /* EMC_XM2CLKPADCTRL */
1814				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1815				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1816				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1817				0x08000168 /* EMC_XM2QUSEPADCTRL */
1818				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1819				0x00000802 /* EMC_CTT_TERM_CTRL */
1820				0x00000000 /* EMC_ZCAL_INTERVAL */
1821				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1822				0x000c000c /* EMC_MRS_WAIT_CNT */
1823				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1824				0x00000000 /* EMC_CTT */
1825				0x00000000 /* EMC_CTT_DURATION */
1826				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1827				0xe8000000 /* EMC_FBIO_SPARE */
1828				0xff00ff00 /* EMC_CFG_RSV */
1829			>;
1830		};
1831		timing-102000000 {
1832			clock-frequency = <102000000>;
1833			nvidia,emc-auto-cal-interval = <0x001fffff>;
1834			nvidia,emc-mode-1 = <0x80100003>;
1835			nvidia,emc-mode-2 = <0x80200008>;
1836			nvidia,emc-mode-reset = <0x80001221>;
1837			nvidia,emc-zcal-cnt-long = <0x00000040>;
1838			nvidia,emc-cfg-periodic-qrst;
1839			nvidia,emc-cfg-dyn-self-ref;
1840			nvidia,emc-configuration = <
1841				0x00000004 /* EMC_RC */
1842				0x0000001a /* EMC_RFC */
1843				0x00000003 /* EMC_RAS */
1844				0x00000001 /* EMC_RP */
1845				0x00000002 /* EMC_R2W */
1846				0x0000000a /* EMC_W2R */
1847				0x00000005 /* EMC_R2P */
1848				0x0000000b /* EMC_W2P */
1849				0x00000001 /* EMC_RD_RCD */
1850				0x00000001 /* EMC_WR_RCD */
1851				0x00000003 /* EMC_RRD */
1852				0x00000001 /* EMC_REXT */
1853				0x00000000 /* EMC_WEXT */
1854				0x00000005 /* EMC_WDV */
1855				0x00000005 /* EMC_QUSE */
1856				0x00000004 /* EMC_QRST */
1857				0x0000000a /* EMC_QSAFE */
1858				0x0000000b /* EMC_RDV */
1859				0x00000303 /* EMC_REFRESH */
1860				0x00000000 /* EMC_BURST_REFRESH_NUM */
1861				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1862				0x00000002 /* EMC_PDEX2WR */
1863				0x00000002 /* EMC_PDEX2RD */
1864				0x00000001 /* EMC_PCHG2PDEN */
1865				0x00000000 /* EMC_ACT2PDEN */
1866				0x00000007 /* EMC_AR2PDEN */
1867				0x0000000f /* EMC_RW2PDEN */
1868				0x0000001c /* EMC_TXSR */
1869				0x0000001c /* EMC_TXSRDLL */
1870				0x00000004 /* EMC_TCKE */
1871				0x00000005 /* EMC_TFAW */
1872				0x00000000 /* EMC_TRPAB */
1873				0x00000004 /* EMC_TCLKSTABLE */
1874				0x00000005 /* EMC_TCLKSTOP */
1875				0x0000031c /* EMC_TREFBW */
1876				0x00000006 /* EMC_QUSE_EXTRA */
1877				0x00000004 /* EMC_FBIO_CFG6 */
1878				0x00000000 /* EMC_ODT_WRITE */
1879				0x00000000 /* EMC_ODT_READ */
1880				0x00004288 /* EMC_FBIO_CFG5 */
1881				0x007800a4 /* EMC_CFG_DIG_DLL */
1882				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1883				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1884				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1885				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1886				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1887				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1888				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1889				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1890				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1891				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1892				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1893				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1894				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1895				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1896				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1897				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1898				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1899				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1900				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1901				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1902				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1903				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1904				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1905				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1906				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1907				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1908				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1909				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1910				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1911				0x000002a0 /* EMC_XM2CMDPADCTRL */
1912				0x0800211c /* EMC_XM2DQSPADCTRL2 */
1913				0x00000000 /* EMC_XM2DQPADCTRL2 */
1914				0x77fff884 /* EMC_XM2CLKPADCTRL */
1915				0x01f1f108 /* EMC_XM2COMPPADCTRL */
1916				0x05057404 /* EMC_XM2VTTGENPADCTRL */
1917				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1918				0x08000168 /* EMC_XM2QUSEPADCTRL */
1919				0x08000000 /* EMC_XM2DQSPADCTRL3 */
1920				0x00000802 /* EMC_CTT_TERM_CTRL */
1921				0x00000000 /* EMC_ZCAL_INTERVAL */
1922				0x00000040 /* EMC_ZCAL_WAIT_CNT */
1923				0x000c000c /* EMC_MRS_WAIT_CNT */
1924				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1925				0x00000000 /* EMC_CTT */
1926				0x00000000 /* EMC_CTT_DURATION */
1927				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1928				0xe8000000 /* EMC_FBIO_SPARE */
1929				0xff00ff00 /* EMC_CFG_RSV */
1930			>;
1931		};
1932		timing-204000000 {
1933			clock-frequency = <204000000>;
1934			nvidia,emc-auto-cal-interval = <0x001fffff>;
1935			nvidia,emc-mode-1 = <0x80100003>;
1936			nvidia,emc-mode-2 = <0x80200008>;
1937			nvidia,emc-mode-reset = <0x80001221>;
1938			nvidia,emc-zcal-cnt-long = <0x00000040>;
1939			nvidia,emc-cfg-periodic-qrst;
1940			nvidia,emc-cfg-dyn-self-ref;
1941			nvidia,emc-configuration = <
1942				0x00000009 /* EMC_RC */
1943				0x00000035 /* EMC_RFC */
1944				0x00000007 /* EMC_RAS */
1945				0x00000002 /* EMC_RP */
1946				0x00000002 /* EMC_R2W */
1947				0x0000000a /* EMC_W2R */
1948				0x00000005 /* EMC_R2P */
1949				0x0000000b /* EMC_W2P */
1950				0x00000002 /* EMC_RD_RCD */
1951				0x00000002 /* EMC_WR_RCD */
1952				0x00000003 /* EMC_RRD */
1953				0x00000001 /* EMC_REXT */
1954				0x00000000 /* EMC_WEXT */
1955				0x00000005 /* EMC_WDV */
1956				0x00000005 /* EMC_QUSE */
1957				0x00000004 /* EMC_QRST */
1958				0x0000000a /* EMC_QSAFE */
1959				0x0000000b /* EMC_RDV */
1960				0x00000607 /* EMC_REFRESH */
1961				0x00000000 /* EMC_BURST_REFRESH_NUM */
1962				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1963				0x00000002 /* EMC_PDEX2WR */
1964				0x00000002 /* EMC_PDEX2RD */
1965				0x00000001 /* EMC_PCHG2PDEN */
1966				0x00000000 /* EMC_ACT2PDEN */
1967				0x00000007 /* EMC_AR2PDEN */
1968				0x0000000f /* EMC_RW2PDEN */
1969				0x00000038 /* EMC_TXSR */
1970				0x00000038 /* EMC_TXSRDLL */
1971				0x00000004 /* EMC_TCKE */
1972				0x00000009 /* EMC_TFAW */
1973				0x00000000 /* EMC_TRPAB */
1974				0x00000004 /* EMC_TCLKSTABLE */
1975				0x00000005 /* EMC_TCLKSTOP */
1976				0x00000638 /* EMC_TREFBW */
1977				0x00000006 /* EMC_QUSE_EXTRA */
1978				0x00000006 /* EMC_FBIO_CFG6 */
1979				0x00000000 /* EMC_ODT_WRITE */
1980				0x00000000 /* EMC_ODT_READ */
1981				0x00004288 /* EMC_FBIO_CFG5 */
1982				0x004400a4 /* EMC_CFG_DIG_DLL */
1983				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1984				0x00080000 /* EMC_DLL_XFORM_DQS0 */
1985				0x00080000 /* EMC_DLL_XFORM_DQS1 */
1986				0x00080000 /* EMC_DLL_XFORM_DQS2 */
1987				0x00080000 /* EMC_DLL_XFORM_DQS3 */
1988				0x00080000 /* EMC_DLL_XFORM_DQS4 */
1989				0x00080000 /* EMC_DLL_XFORM_DQS5 */
1990				0x00080000 /* EMC_DLL_XFORM_DQS6 */
1991				0x00080000 /* EMC_DLL_XFORM_DQS7 */
1992				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1993				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1994				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1995				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1996				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1997				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1998				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1999				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2000				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2001				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2002				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2003				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2004				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2005				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2006				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2007				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2008				0x00080000 /* EMC_DLL_XFORM_DQ0 */
2009				0x00080000 /* EMC_DLL_XFORM_DQ1 */
2010				0x00080000 /* EMC_DLL_XFORM_DQ2 */
2011				0x00080000 /* EMC_DLL_XFORM_DQ3 */
2012				0x000002a0 /* EMC_XM2CMDPADCTRL */
2013				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2014				0x00000000 /* EMC_XM2DQPADCTRL2 */
2015				0x77fff884 /* EMC_XM2CLKPADCTRL */
2016				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2017				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2018				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2019				0x08000168 /* EMC_XM2QUSEPADCTRL */
2020				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2021				0x00000802 /* EMC_CTT_TERM_CTRL */
2022				0x00020000 /* EMC_ZCAL_INTERVAL */
2023				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2024				0x000c000c /* EMC_MRS_WAIT_CNT */
2025				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2026				0x00000000 /* EMC_CTT */
2027				0x00000000 /* EMC_CTT_DURATION */
2028				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
2029				0xe8000000 /* EMC_FBIO_SPARE */
2030				0xff00ff00 /* EMC_CFG_RSV */
2031			>;
2032		};
2033		timing-400000000 {
2034			clock-frequency = <400000000>;
2035			nvidia,emc-auto-cal-interval = <0x001fffff>;
2036			nvidia,emc-mode-1 = <0x80100002>;
2037			nvidia,emc-mode-2 = <0x80200000>;
2038			nvidia,emc-mode-reset = <0x80000521>;
2039			nvidia,emc-zcal-cnt-long = <0x00000040>;
2040			nvidia,emc-configuration = <
2041				0x00000012 /* EMC_RC */
2042				0x00000066 /* EMC_RFC */
2043				0x0000000c /* EMC_RAS */
2044				0x00000004 /* EMC_RP */
2045				0x00000003 /* EMC_R2W */
2046				0x00000008 /* EMC_W2R */
2047				0x00000002 /* EMC_R2P */
2048				0x0000000a /* EMC_W2P */
2049				0x00000004 /* EMC_RD_RCD */
2050				0x00000004 /* EMC_WR_RCD */
2051				0x00000002 /* EMC_RRD */
2052				0x00000001 /* EMC_REXT */
2053				0x00000000 /* EMC_WEXT */
2054				0x00000004 /* EMC_WDV */
2055				0x00000006 /* EMC_QUSE */
2056				0x00000004 /* EMC_QRST */
2057				0x0000000a /* EMC_QSAFE */
2058				0x0000000c /* EMC_RDV */
2059				0x00000bf0 /* EMC_REFRESH */
2060				0x00000000 /* EMC_BURST_REFRESH_NUM */
2061				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
2062				0x00000001 /* EMC_PDEX2WR */
2063				0x00000008 /* EMC_PDEX2RD */
2064				0x00000001 /* EMC_PCHG2PDEN */
2065				0x00000000 /* EMC_ACT2PDEN */
2066				0x00000008 /* EMC_AR2PDEN */
2067				0x0000000f /* EMC_RW2PDEN */
2068				0x0000006c /* EMC_TXSR */
2069				0x00000200 /* EMC_TXSRDLL */
2070				0x00000004 /* EMC_TCKE */
2071				0x00000010 /* EMC_TFAW */
2072				0x00000000 /* EMC_TRPAB */
2073				0x00000004 /* EMC_TCLKSTABLE */
2074				0x00000005 /* EMC_TCLKSTOP */
2075				0x00000c30 /* EMC_TREFBW */
2076				0x00000000 /* EMC_QUSE_EXTRA */
2077				0x00000004 /* EMC_FBIO_CFG6 */
2078				0x00000000 /* EMC_ODT_WRITE */
2079				0x00000000 /* EMC_ODT_READ */
2080				0x00007088 /* EMC_FBIO_CFG5 */
2081				0x001d0084 /* EMC_CFG_DIG_DLL */
2082				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2083				0x0003c000 /* EMC_DLL_XFORM_DQS0 */
2084				0x0003c000 /* EMC_DLL_XFORM_DQS1 */
2085				0x0003c000 /* EMC_DLL_XFORM_DQS2 */
2086				0x0003c000 /* EMC_DLL_XFORM_DQS3 */
2087				0x0003c000 /* EMC_DLL_XFORM_DQS4 */
2088				0x0003c000 /* EMC_DLL_XFORM_DQS5 */
2089				0x0003c000 /* EMC_DLL_XFORM_DQS6 */
2090				0x0003c000 /* EMC_DLL_XFORM_DQS7 */
2091				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2092				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2093				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2094				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2095				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2096				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2097				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2098				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2099				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2100				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2101				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2102				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2103				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2104				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2105				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2106				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2107				0x00048000 /* EMC_DLL_XFORM_DQ0 */
2108				0x00048000 /* EMC_DLL_XFORM_DQ1 */
2109				0x00048000 /* EMC_DLL_XFORM_DQ2 */
2110				0x00048000 /* EMC_DLL_XFORM_DQ3 */
2111				0x000002a0 /* EMC_XM2CMDPADCTRL */
2112				0x0800013d /* EMC_XM2DQSPADCTRL2 */
2113				0x00000000 /* EMC_XM2DQPADCTRL2 */
2114				0x77fff884 /* EMC_XM2CLKPADCTRL */
2115				0x01f1f508 /* EMC_XM2COMPPADCTRL */
2116				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2117				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2118				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2119				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2120				0x00000802 /* EMC_CTT_TERM_CTRL */
2121				0x00020000 /* EMC_ZCAL_INTERVAL */
2122				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2123				0x0158000c /* EMC_MRS_WAIT_CNT */
2124				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2125				0x00000000 /* EMC_CTT */
2126				0x00000000 /* EMC_CTT_DURATION */
2127				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
2128				0xe8000000 /* EMC_FBIO_SPARE */
2129				0xff00ff89 /* EMC_CFG_RSV */
2130			>;
2131		};
2132		timing-800000000 {
2133			clock-frequency = <800000000>;
2134			nvidia,emc-auto-cal-interval = <0x001fffff>;
2135			nvidia,emc-mode-1 = <0x80100002>;
2136			nvidia,emc-mode-2 = <0x80200018>;
2137			nvidia,emc-mode-reset = <0x80000d71>;
2138			nvidia,emc-zcal-cnt-long = <0x00000040>;
2139			nvidia,emc-cfg-periodic-qrst;
2140			nvidia,emc-configuration = <
2141				0x00000025 /* EMC_RC */
2142				0x000000ce /* EMC_RFC */
2143				0x0000001a /* EMC_RAS */
2144				0x00000009 /* EMC_RP */
2145				0x00000005 /* EMC_R2W */
2146				0x0000000d /* EMC_W2R */
2147				0x00000004 /* EMC_R2P */
2148				0x00000013 /* EMC_W2P */
2149				0x00000009 /* EMC_RD_RCD */
2150				0x00000009 /* EMC_WR_RCD */
2151				0x00000004 /* EMC_RRD */
2152				0x00000001 /* EMC_REXT */
2153				0x00000000 /* EMC_WEXT */
2154				0x00000007 /* EMC_WDV */
2155				0x0000000a /* EMC_QUSE */
2156				0x00000009 /* EMC_QRST */
2157				0x0000000b /* EMC_QSAFE */
2158				0x00000011 /* EMC_RDV */
2159				0x00001820 /* EMC_REFRESH */
2160				0x00000000 /* EMC_BURST_REFRESH_NUM */
2161				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
2162				0x00000003 /* EMC_PDEX2WR */
2163				0x00000012 /* EMC_PDEX2RD */
2164				0x00000001 /* EMC_PCHG2PDEN */
2165				0x00000000 /* EMC_ACT2PDEN */
2166				0x0000000f /* EMC_AR2PDEN */
2167				0x00000018 /* EMC_RW2PDEN */
2168				0x000000d8 /* EMC_TXSR */
2169				0x00000200 /* EMC_TXSRDLL */
2170				0x00000005 /* EMC_TCKE */
2171				0x00000020 /* EMC_TFAW */
2172				0x00000000 /* EMC_TRPAB */
2173				0x00000007 /* EMC_TCLKSTABLE */
2174				0x00000008 /* EMC_TCLKSTOP */
2175				0x00001860 /* EMC_TREFBW */
2176				0x0000000b /* EMC_QUSE_EXTRA */
2177				0x00000006 /* EMC_FBIO_CFG6 */
2178				0x00000000 /* EMC_ODT_WRITE */
2179				0x00000000 /* EMC_ODT_READ */
2180				0x00005088 /* EMC_FBIO_CFG5 */
2181				0xf0070191 /* EMC_CFG_DIG_DLL */
2182				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2183				0x0000800a /* EMC_DLL_XFORM_DQS0 */
2184				0x0000000a /* EMC_DLL_XFORM_DQS1 */
2185				0x0000000a /* EMC_DLL_XFORM_DQS2 */
2186				0x0000000a /* EMC_DLL_XFORM_DQS3 */
2187				0x0000000a /* EMC_DLL_XFORM_DQS4 */
2188				0x0000000a /* EMC_DLL_XFORM_DQS5 */
2189				0x0000000a /* EMC_DLL_XFORM_DQS6 */
2190				0x0000000a /* EMC_DLL_XFORM_DQS7 */
2191				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
2192				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
2193				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
2194				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
2195				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
2196				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
2197				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
2198				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
2199				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2200				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2201				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2202				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2203				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2204				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2205				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2206				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2207				0x0000000a /* EMC_DLL_XFORM_DQ0 */
2208				0x0000000a /* EMC_DLL_XFORM_DQ1 */
2209				0x0000000a /* EMC_DLL_XFORM_DQ2 */
2210				0x0000000a /* EMC_DLL_XFORM_DQ3 */
2211				0x000002a0 /* EMC_XM2CMDPADCTRL */
2212				0x0600013d /* EMC_XM2DQSPADCTRL2 */
2213				0x22220000 /* EMC_XM2DQPADCTRL2 */
2214				0x77fff884 /* EMC_XM2CLKPADCTRL */
2215				0x01f1f501 /* EMC_XM2COMPPADCTRL */
2216				0x07077404 /* EMC_XM2VTTGENPADCTRL */
2217				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
2218				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2219				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2220				0x00000802 /* EMC_CTT_TERM_CTRL */
2221				0x00020000 /* EMC_ZCAL_INTERVAL */
2222				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2223				0x00f0000c /* EMC_MRS_WAIT_CNT */
2224				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2225				0x00000000 /* EMC_CTT */
2226				0x00000000 /* EMC_CTT_DURATION */
2227				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
2228				0xe8000000 /* EMC_FBIO_SPARE */
2229				0xff00ff49 /* EMC_CFG_RSV */
2230			>;
2231		};
2232	};
2233	emc-timings-2 {
2234		nvidia,ram-code = <2>;  /* Hynix A RAM */
2235		timing-25500000 {
2236			clock-frequency = <25500000>;
2237			nvidia,emc-auto-cal-interval = <0x001fffff>;
2238			nvidia,emc-mode-1 = <0x80100003>;
2239			nvidia,emc-mode-2 = <0x80200008>;
2240			nvidia,emc-mode-reset = <0x80001221>;
2241			nvidia,emc-zcal-cnt-long = <0x00000040>;
2242			nvidia,emc-cfg-periodic-qrst;
2243			nvidia,emc-cfg-dyn-self-ref;
2244			nvidia,emc-configuration = <
2245				0x00000001 /* EMC_RC */
2246				0x00000007 /* EMC_RFC */
2247				0x00000000 /* EMC_RAS */
2248				0x00000000 /* EMC_RP */
2249				0x00000002 /* EMC_R2W */
2250				0x0000000a /* EMC_W2R */
2251				0x00000005 /* EMC_R2P */
2252				0x0000000b /* EMC_W2P */
2253				0x00000000 /* EMC_RD_RCD */
2254				0x00000000 /* EMC_WR_RCD */
2255				0x00000003 /* EMC_RRD */
2256				0x00000001 /* EMC_REXT */
2257				0x00000000 /* EMC_WEXT */
2258				0x00000005 /* EMC_WDV */
2259				0x00000005 /* EMC_QUSE */
2260				0x00000004 /* EMC_QRST */
2261				0x0000000a /* EMC_QSAFE */
2262				0x0000000b /* EMC_RDV */
2263				0x000000c0 /* EMC_REFRESH */
2264				0x00000000 /* EMC_BURST_REFRESH_NUM */
2265				0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
2266				0x00000002 /* EMC_PDEX2WR */
2267				0x00000002 /* EMC_PDEX2RD */
2268				0x00000001 /* EMC_PCHG2PDEN */
2269				0x00000000 /* EMC_ACT2PDEN */
2270				0x00000007 /* EMC_AR2PDEN */
2271				0x0000000f /* EMC_RW2PDEN */
2272				0x00000008 /* EMC_TXSR */
2273				0x00000008 /* EMC_TXSRDLL */
2274				0x00000004 /* EMC_TCKE */
2275				0x00000002 /* EMC_TFAW */
2276				0x00000000 /* EMC_TRPAB */
2277				0x00000004 /* EMC_TCLKSTABLE */
2278				0x00000005 /* EMC_TCLKSTOP */
2279				0x000000c7 /* EMC_TREFBW */
2280				0x00000006 /* EMC_QUSE_EXTRA */
2281				0x00000004 /* EMC_FBIO_CFG6 */
2282				0x00000000 /* EMC_ODT_WRITE */
2283				0x00000000 /* EMC_ODT_READ */
2284				0x00004288 /* EMC_FBIO_CFG5 */
2285				0x007800a4 /* EMC_CFG_DIG_DLL */
2286				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2287				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2288				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2289				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2290				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2291				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2292				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2293				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2294				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2295				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2296				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2297				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2298				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2299				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2300				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2301				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2302				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2303				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2304				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2305				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2306				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2307				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2308				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2309				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2310				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2311				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2312				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2313				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2314				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2315				0x000002a0 /* EMC_XM2CMDPADCTRL */
2316				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2317				0x00000000 /* EMC_XM2DQPADCTRL2 */
2318				0x77fff884 /* EMC_XM2CLKPADCTRL */
2319				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2320				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2321				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2322				0x08000168 /* EMC_XM2QUSEPADCTRL */
2323				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2324				0x00000802 /* EMC_CTT_TERM_CTRL */
2325				0x00000000 /* EMC_ZCAL_INTERVAL */
2326				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2327				0x000c000c /* EMC_MRS_WAIT_CNT */
2328				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2329				0x00000000 /* EMC_CTT */
2330				0x00000000 /* EMC_CTT_DURATION */
2331				0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
2332				0xe8000000 /* EMC_FBIO_SPARE */
2333				0xff00ff00 /* EMC_CFG_RSV */
2334			>;
2335		};
2336		timing-51000000 {
2337			clock-frequency = <51000000>;
2338			nvidia,emc-auto-cal-interval = <0x001fffff>;
2339			nvidia,emc-mode-1 = <0x80100003>;
2340			nvidia,emc-mode-2 = <0x80200008>;
2341			nvidia,emc-mode-reset = <0x80001221>;
2342			nvidia,emc-zcal-cnt-long = <0x00000040>;
2343			nvidia,emc-cfg-periodic-qrst;
2344			nvidia,emc-cfg-dyn-self-ref;
2345			nvidia,emc-configuration = <
2346				0x00000002 /* EMC_RC */
2347				0x0000000f /* EMC_RFC */
2348				0x00000001 /* EMC_RAS */
2349				0x00000000 /* EMC_RP */
2350				0x00000002 /* EMC_R2W */
2351				0x0000000a /* EMC_W2R */
2352				0x00000005 /* EMC_R2P */
2353				0x0000000b /* EMC_W2P */
2354				0x00000000 /* EMC_RD_RCD */
2355				0x00000000 /* EMC_WR_RCD */
2356				0x00000003 /* EMC_RRD */
2357				0x00000001 /* EMC_REXT */
2358				0x00000000 /* EMC_WEXT */
2359				0x00000005 /* EMC_WDV */
2360				0x00000005 /* EMC_QUSE */
2361				0x00000004 /* EMC_QRST */
2362				0x0000000a /* EMC_QSAFE */
2363				0x0000000b /* EMC_RDV */
2364				0x00000181 /* EMC_REFRESH */
2365				0x00000000 /* EMC_BURST_REFRESH_NUM */
2366				0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
2367				0x00000002 /* EMC_PDEX2WR */
2368				0x00000002 /* EMC_PDEX2RD */
2369				0x00000001 /* EMC_PCHG2PDEN */
2370				0x00000000 /* EMC_ACT2PDEN */
2371				0x00000007 /* EMC_AR2PDEN */
2372				0x0000000f /* EMC_RW2PDEN */
2373				0x00000010 /* EMC_TXSR */
2374				0x00000010 /* EMC_TXSRDLL */
2375				0x00000004 /* EMC_TCKE */
2376				0x00000003 /* EMC_TFAW */
2377				0x00000000 /* EMC_TRPAB */
2378				0x00000004 /* EMC_TCLKSTABLE */
2379				0x00000005 /* EMC_TCLKSTOP */
2380				0x0000018e /* EMC_TREFBW */
2381				0x00000006 /* EMC_QUSE_EXTRA */
2382				0x00000004 /* EMC_FBIO_CFG6 */
2383				0x00000000 /* EMC_ODT_WRITE */
2384				0x00000000 /* EMC_ODT_READ */
2385				0x00004288 /* EMC_FBIO_CFG5 */
2386				0x007800a4 /* EMC_CFG_DIG_DLL */
2387				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2388				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2389				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2390				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2391				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2392				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2393				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2394				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2395				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2396				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2397				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2398				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2399				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2400				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2401				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2402				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2403				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2404				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2405				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2406				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2407				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2408				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2409				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2410				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2411				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2412				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2413				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2414				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2415				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2416				0x000002a0 /* EMC_XM2CMDPADCTRL */
2417				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2418				0x00000000 /* EMC_XM2DQPADCTRL2 */
2419				0x77fff884 /* EMC_XM2CLKPADCTRL */
2420				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2421				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2422				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2423				0x08000168 /* EMC_XM2QUSEPADCTRL */
2424				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2425				0x00000802 /* EMC_CTT_TERM_CTRL */
2426				0x00000000 /* EMC_ZCAL_INTERVAL */
2427				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2428				0x000c000c /* EMC_MRS_WAIT_CNT */
2429				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2430				0x00000000 /* EMC_CTT */
2431				0x00000000 /* EMC_CTT_DURATION */
2432				0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
2433				0xe8000000 /* EMC_FBIO_SPARE */
2434				0xff00ff00 /* EMC_CFG_RSV */
2435			>;
2436		};
2437		timing-102000000 {
2438			clock-frequency = <102000000>;
2439			nvidia,emc-auto-cal-interval = <0x001fffff>;
2440			nvidia,emc-mode-1 = <0x80100003>;
2441			nvidia,emc-mode-2 = <0x80200008>;
2442			nvidia,emc-mode-reset = <0x80001221>;
2443			nvidia,emc-zcal-cnt-long = <0x00000040>;
2444			nvidia,emc-cfg-periodic-qrst;
2445			nvidia,emc-cfg-dyn-self-ref;
2446			nvidia,emc-configuration = <
2447				0x00000004 /* EMC_RC */
2448				0x0000001e /* EMC_RFC */
2449				0x00000003 /* EMC_RAS */
2450				0x00000001 /* EMC_RP */
2451				0x00000002 /* EMC_R2W */
2452				0x0000000a /* EMC_W2R */
2453				0x00000005 /* EMC_R2P */
2454				0x0000000b /* EMC_W2P */
2455				0x00000001 /* EMC_RD_RCD */
2456				0x00000001 /* EMC_WR_RCD */
2457				0x00000003 /* EMC_RRD */
2458				0x00000001 /* EMC_REXT */
2459				0x00000000 /* EMC_WEXT */
2460				0x00000005 /* EMC_WDV */
2461				0x00000005 /* EMC_QUSE */
2462				0x00000004 /* EMC_QRST */
2463				0x0000000a /* EMC_QSAFE */
2464				0x0000000b /* EMC_RDV */
2465				0x00000303 /* EMC_REFRESH */
2466				0x00000000 /* EMC_BURST_REFRESH_NUM */
2467				0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
2468				0x00000002 /* EMC_PDEX2WR */
2469				0x00000002 /* EMC_PDEX2RD */
2470				0x00000001 /* EMC_PCHG2PDEN */
2471				0x00000000 /* EMC_ACT2PDEN */
2472				0x00000007 /* EMC_AR2PDEN */
2473				0x0000000f /* EMC_RW2PDEN */
2474				0x00000020 /* EMC_TXSR */
2475				0x00000020 /* EMC_TXSRDLL */
2476				0x00000004 /* EMC_TCKE */
2477				0x00000005 /* EMC_TFAW */
2478				0x00000000 /* EMC_TRPAB */
2479				0x00000004 /* EMC_TCLKSTABLE */
2480				0x00000005 /* EMC_TCLKSTOP */
2481				0x0000031c /* EMC_TREFBW */
2482				0x00000006 /* EMC_QUSE_EXTRA */
2483				0x00000004 /* EMC_FBIO_CFG6 */
2484				0x00000000 /* EMC_ODT_WRITE */
2485				0x00000000 /* EMC_ODT_READ */
2486				0x00004288 /* EMC_FBIO_CFG5 */
2487				0x007800a4 /* EMC_CFG_DIG_DLL */
2488				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2489				0x000fc000 /* EMC_DLL_XFORM_DQS0 */
2490				0x000fc000 /* EMC_DLL_XFORM_DQS1 */
2491				0x000fc000 /* EMC_DLL_XFORM_DQS2 */
2492				0x000fc000 /* EMC_DLL_XFORM_DQS3 */
2493				0x000fc000 /* EMC_DLL_XFORM_DQS4 */
2494				0x000fc000 /* EMC_DLL_XFORM_DQS5 */
2495				0x000fc000 /* EMC_DLL_XFORM_DQS6 */
2496				0x000fc000 /* EMC_DLL_XFORM_DQS7 */
2497				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2498				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2499				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2500				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2501				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2502				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2503				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2504				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2505				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2506				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2507				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2508				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2509				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2510				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2511				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2512				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2513				0x000fc000 /* EMC_DLL_XFORM_DQ0 */
2514				0x000fc000 /* EMC_DLL_XFORM_DQ1 */
2515				0x000fc000 /* EMC_DLL_XFORM_DQ2 */
2516				0x000fc000 /* EMC_DLL_XFORM_DQ3 */
2517				0x000002a0 /* EMC_XM2CMDPADCTRL */
2518				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2519				0x00000000 /* EMC_XM2DQPADCTRL2 */
2520				0x77fff884 /* EMC_XM2CLKPADCTRL */
2521				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2522				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2523				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2524				0x08000168 /* EMC_XM2QUSEPADCTRL */
2525				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2526				0x00000802 /* EMC_CTT_TERM_CTRL */
2527				0x00000000 /* EMC_ZCAL_INTERVAL */
2528				0x00000040 /* EMC_ZCAL_WAIT_CNT */
2529				0x000c000c /* EMC_MRS_WAIT_CNT */
2530				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2531				0x00000000 /* EMC_CTT */
2532				0x00000000 /* EMC_CTT_DURATION */
2533				0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
2534				0xe8000000 /* EMC_FBIO_SPARE */
2535				0xff00ff00 /* EMC_CFG_RSV */
2536			>;
2537		};
2538		timing-204000000 {
2539			clock-frequency = <204000000>;
2540			nvidia,emc-auto-cal-interval = <0x001fffff>;
2541			nvidia,emc-mode-1 = <0x80100003>;
2542			nvidia,emc-mode-2 = <0x80200008>;
2543			nvidia,emc-mode-reset = <0x80001221>;
2544			nvidia,emc-zcal-cnt-long = <0x00000040>;
2545			nvidia,emc-cfg-periodic-qrst;
2546			nvidia,emc-cfg-dyn-self-ref;
2547			nvidia,emc-configuration = <
2548				0x00000009 /* EMC_RC */
2549				0x0000003d /* EMC_RFC */
2550				0x00000007 /* EMC_RAS */
2551				0x00000002 /* EMC_RP */
2552				0x00000002 /* EMC_R2W */
2553				0x0000000a /* EMC_W2R */
2554				0x00000005 /* EMC_R2P */
2555				0x0000000b /* EMC_W2P */
2556				0x00000002 /* EMC_RD_RCD */
2557				0x00000002 /* EMC_WR_RCD */
2558				0x00000003 /* EMC_RRD */
2559				0x00000001 /* EMC_REXT */
2560				0x00000000 /* EMC_WEXT */
2561				0x00000005 /* EMC_WDV */
2562				0x00000005 /* EMC_QUSE */
2563				0x00000004 /* EMC_QRST */
2564				0x0000000a /* EMC_QSAFE */
2565				0x0000000b /* EMC_RDV */
2566				0x00000607 /* EMC_REFRESH */
2567				0x00000000 /* EMC_BURST_REFRESH_NUM */
2568				0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
2569				0x00000002 /* EMC_PDEX2WR */
2570				0x00000002 /* EMC_PDEX2RD */
2571				0x00000001 /* EMC_PCHG2PDEN */
2572				0x00000000 /* EMC_ACT2PDEN */
2573				0x00000007 /* EMC_AR2PDEN */
2574				0x0000000f /* EMC_RW2PDEN */
2575				0x00000040 /* EMC_TXSR */
2576				0x00000040 /* EMC_TXSRDLL */
2577				0x00000004 /* EMC_TCKE */
2578				0x00000009 /* EMC_TFAW */
2579				0x00000000 /* EMC_TRPAB */
2580				0x00000004 /* EMC_TCLKSTABLE */
2581				0x00000005 /* EMC_TCLKSTOP */
2582				0x00000638 /* EMC_TREFBW */
2583				0x00000006 /* EMC_QUSE_EXTRA */
2584				0x00000006 /* EMC_FBIO_CFG6 */
2585				0x00000000 /* EMC_ODT_WRITE */
2586				0x00000000 /* EMC_ODT_READ */
2587				0x00004288 /* EMC_FBIO_CFG5 */
2588				0x004400a4 /* EMC_CFG_DIG_DLL */
2589				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2590				0x00080000 /* EMC_DLL_XFORM_DQS0 */
2591				0x00080000 /* EMC_DLL_XFORM_DQS1 */
2592				0x00080000 /* EMC_DLL_XFORM_DQS2 */
2593				0x00080000 /* EMC_DLL_XFORM_DQS3 */
2594				0x00080000 /* EMC_DLL_XFORM_DQS4 */
2595				0x00080000 /* EMC_DLL_XFORM_DQS5 */
2596				0x00080000 /* EMC_DLL_XFORM_DQS6 */
2597				0x00080000 /* EMC_DLL_XFORM_DQS7 */
2598				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2599				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2600				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2601				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2602				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2603				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2604				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2605				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2606				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2607				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2608				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2609				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2610				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2611				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2612				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2613				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2614				0x00080000 /* EMC_DLL_XFORM_DQ0 */
2615				0x00080000 /* EMC_DLL_XFORM_DQ1 */
2616				0x00080000 /* EMC_DLL_XFORM_DQ2 */
2617				0x00080000 /* EMC_DLL_XFORM_DQ3 */
2618				0x000002a0 /* EMC_XM2CMDPADCTRL */
2619				0x0800211c /* EMC_XM2DQSPADCTRL2 */
2620				0x00000000 /* EMC_XM2DQPADCTRL2 */
2621				0x77fff884 /* EMC_XM2CLKPADCTRL */
2622				0x01f1f108 /* EMC_XM2COMPPADCTRL */
2623				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2624				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2625				0x08000168 /* EMC_XM2QUSEPADCTRL */
2626				0x08000000 /* EMC_XM2DQSPADCTRL3 */
2627				0x00000802 /* EMC_CTT_TERM_CTRL */
2628				0x00020000 /* EMC_ZCAL_INTERVAL */
2629				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2630				0x000c000c /* EMC_MRS_WAIT_CNT */
2631				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2632				0x00000000 /* EMC_CTT */
2633				0x00000000 /* EMC_CTT_DURATION */
2634				0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
2635				0xe8000000 /* EMC_FBIO_SPARE */
2636				0xff00ff00 /* EMC_CFG_RSV */
2637			>;
2638		};
2639		timing-400000000 {
2640			clock-frequency = <400000000>;
2641			nvidia,emc-auto-cal-interval = <0x001fffff>;
2642			nvidia,emc-mode-1 = <0x80100002>;
2643			nvidia,emc-mode-2 = <0x80200000>;
2644			nvidia,emc-mode-reset = <0x80000521>;
2645			nvidia,emc-zcal-cnt-long = <0x00000040>;
2646			nvidia,emc-configuration = <
2647				0x00000012 /* EMC_RC */
2648				0x00000076 /* EMC_RFC */
2649				0x0000000c /* EMC_RAS */
2650				0x00000004 /* EMC_RP */
2651				0x00000003 /* EMC_R2W */
2652				0x00000008 /* EMC_W2R */
2653				0x00000002 /* EMC_R2P */
2654				0x0000000a /* EMC_W2P */
2655				0x00000004 /* EMC_RD_RCD */
2656				0x00000004 /* EMC_WR_RCD */
2657				0x00000002 /* EMC_RRD */
2658				0x00000001 /* EMC_REXT */
2659				0x00000000 /* EMC_WEXT */
2660				0x00000004 /* EMC_WDV */
2661				0x00000006 /* EMC_QUSE */
2662				0x00000004 /* EMC_QRST */
2663				0x0000000a /* EMC_QSAFE */
2664				0x0000000c /* EMC_RDV */
2665				0x00000bf0 /* EMC_REFRESH */
2666				0x00000000 /* EMC_BURST_REFRESH_NUM */
2667				0x000002fc /* EMC_PRE_REFRESH_REQ_CNT */
2668				0x00000001 /* EMC_PDEX2WR */
2669				0x00000008 /* EMC_PDEX2RD */
2670				0x00000001 /* EMC_PCHG2PDEN */
2671				0x00000000 /* EMC_ACT2PDEN */
2672				0x00000008 /* EMC_AR2PDEN */
2673				0x0000000f /* EMC_RW2PDEN */
2674				0x0000007c /* EMC_TXSR */
2675				0x00000200 /* EMC_TXSRDLL */
2676				0x00000004 /* EMC_TCKE */
2677				0x00000010 /* EMC_TFAW */
2678				0x00000000 /* EMC_TRPAB */
2679				0x00000004 /* EMC_TCLKSTABLE */
2680				0x00000005 /* EMC_TCLKSTOP */
2681				0x00000c30 /* EMC_TREFBW */
2682				0x00000000 /* EMC_QUSE_EXTRA */
2683				0x00000004 /* EMC_FBIO_CFG6 */
2684				0x00000000 /* EMC_ODT_WRITE */
2685				0x00000000 /* EMC_ODT_READ */
2686				0x00007088 /* EMC_FBIO_CFG5 */
2687				0x001d0084 /* EMC_CFG_DIG_DLL */
2688				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2689				0x00044000 /* EMC_DLL_XFORM_DQS0 */
2690				0x00044000 /* EMC_DLL_XFORM_DQS1 */
2691				0x00044000 /* EMC_DLL_XFORM_DQS2 */
2692				0x00044000 /* EMC_DLL_XFORM_DQS3 */
2693				0x00044000 /* EMC_DLL_XFORM_DQS4 */
2694				0x00044000 /* EMC_DLL_XFORM_DQS5 */
2695				0x00044000 /* EMC_DLL_XFORM_DQS6 */
2696				0x00044000 /* EMC_DLL_XFORM_DQS7 */
2697				0x00000000 /* EMC_DLL_XFORM_QUSE0 */
2698				0x00000000 /* EMC_DLL_XFORM_QUSE1 */
2699				0x00000000 /* EMC_DLL_XFORM_QUSE2 */
2700				0x00000000 /* EMC_DLL_XFORM_QUSE3 */
2701				0x00000000 /* EMC_DLL_XFORM_QUSE4 */
2702				0x00000000 /* EMC_DLL_XFORM_QUSE5 */
2703				0x00000000 /* EMC_DLL_XFORM_QUSE6 */
2704				0x00000000 /* EMC_DLL_XFORM_QUSE7 */
2705				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2706				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2707				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2708				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2709				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2710				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2711				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2712				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2713				0x00058000 /* EMC_DLL_XFORM_DQ0 */
2714				0x00058000 /* EMC_DLL_XFORM_DQ1 */
2715				0x00058000 /* EMC_DLL_XFORM_DQ2 */
2716				0x00058000 /* EMC_DLL_XFORM_DQ3 */
2717				0x000002a0 /* EMC_XM2CMDPADCTRL */
2718				0x0800013d /* EMC_XM2DQSPADCTRL2 */
2719				0x00000000 /* EMC_XM2DQPADCTRL2 */
2720				0x77fff884 /* EMC_XM2CLKPADCTRL */
2721				0x01f1f508 /* EMC_XM2COMPPADCTRL */
2722				0x05057404 /* EMC_XM2VTTGENPADCTRL */
2723				0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
2724				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2725				0x08000021 /* EMC_XM2DQSPADCTRL3 */
2726				0x00000802 /* EMC_CTT_TERM_CTRL */
2727				0x00020000 /* EMC_ZCAL_INTERVAL */
2728				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2729				0x0148000c /* EMC_MRS_WAIT_CNT */
2730				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2731				0x00000000 /* EMC_CTT */
2732				0x00000000 /* EMC_CTT_DURATION */
2733				0x800018c8 /* EMC_DYN_SELF_REF_CONTROL */
2734				0xe8000000 /* EMC_FBIO_SPARE */
2735				0xff00ff89 /* EMC_CFG_RSV */
2736			>;
2737		};
2738		timing-800000000 {
2739			clock-frequency = <800000000>;
2740			nvidia,emc-auto-cal-interval = <0x001fffff>;
2741			nvidia,emc-mode-1 = <0x80100002>;
2742			nvidia,emc-mode-2 = <0x80200018>;
2743			nvidia,emc-mode-reset = <0x80000d71>;
2744			nvidia,emc-zcal-cnt-long = <0x00000040>;
2745			nvidia,emc-cfg-periodic-qrst;
2746			nvidia,emc-configuration = <
2747				0x00000025 /* EMC_RC */
2748				0x000000ee /* EMC_RFC */
2749				0x0000001a /* EMC_RAS */
2750				0x00000009 /* EMC_RP */
2751				0x00000005 /* EMC_R2W */
2752				0x0000000d /* EMC_W2R */
2753				0x00000004 /* EMC_R2P */
2754				0x00000013 /* EMC_W2P */
2755				0x00000009 /* EMC_RD_RCD */
2756				0x00000009 /* EMC_WR_RCD */
2757				0x00000003 /* EMC_RRD */
2758				0x00000001 /* EMC_REXT */
2759				0x00000000 /* EMC_WEXT */
2760				0x00000007 /* EMC_WDV */
2761				0x0000000a /* EMC_QUSE */
2762				0x00000009 /* EMC_QRST */
2763				0x0000000b /* EMC_QSAFE */
2764				0x00000011 /* EMC_RDV */
2765				0x00001820 /* EMC_REFRESH */
2766				0x00000000 /* EMC_BURST_REFRESH_NUM */
2767				0x00000608 /* EMC_PRE_REFRESH_REQ_CNT */
2768				0x00000003 /* EMC_PDEX2WR */
2769				0x00000012 /* EMC_PDEX2RD */
2770				0x00000001 /* EMC_PCHG2PDEN */
2771				0x00000000 /* EMC_ACT2PDEN */
2772				0x0000000f /* EMC_AR2PDEN */
2773				0x00000018 /* EMC_RW2PDEN */
2774				0x000000f8 /* EMC_TXSR */
2775				0x00000200 /* EMC_TXSRDLL */
2776				0x00000005 /* EMC_TCKE */
2777				0x00000020 /* EMC_TFAW */
2778				0x00000000 /* EMC_TRPAB */
2779				0x00000007 /* EMC_TCLKSTABLE */
2780				0x00000008 /* EMC_TCLKSTOP */
2781				0x00001860 /* EMC_TREFBW */
2782				0x0000000b /* EMC_QUSE_EXTRA */
2783				0x00000006 /* EMC_FBIO_CFG6 */
2784				0x00000000 /* EMC_ODT_WRITE */
2785				0x00000000 /* EMC_ODT_READ */
2786				0x00005088 /* EMC_FBIO_CFG5 */
2787				0xf0070191 /* EMC_CFG_DIG_DLL */
2788				0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
2789				0x0000000c /* EMC_DLL_XFORM_DQS0 */
2790				0x007fc00a /* EMC_DLL_XFORM_DQS1 */
2791				0x00000008 /* EMC_DLL_XFORM_DQS2 */
2792				0x0000000a /* EMC_DLL_XFORM_DQS3 */
2793				0x0000000a /* EMC_DLL_XFORM_DQS4 */
2794				0x0000000a /* EMC_DLL_XFORM_DQS5 */
2795				0x0000000a /* EMC_DLL_XFORM_DQS6 */
2796				0x0000000a /* EMC_DLL_XFORM_DQS7 */
2797				0x00018000 /* EMC_DLL_XFORM_QUSE0 */
2798				0x00018000 /* EMC_DLL_XFORM_QUSE1 */
2799				0x00018000 /* EMC_DLL_XFORM_QUSE2 */
2800				0x00018000 /* EMC_DLL_XFORM_QUSE3 */
2801				0x00018000 /* EMC_DLL_XFORM_QUSE4 */
2802				0x00018000 /* EMC_DLL_XFORM_QUSE5 */
2803				0x00018000 /* EMC_DLL_XFORM_QUSE6 */
2804				0x00018000 /* EMC_DLL_XFORM_QUSE7 */
2805				0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
2806				0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
2807				0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
2808				0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
2809				0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
2810				0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
2811				0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
2812				0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
2813				0x0000000a /* EMC_DLL_XFORM_DQ0 */
2814				0x0000000c /* EMC_DLL_XFORM_DQ1 */
2815				0x0000000a /* EMC_DLL_XFORM_DQ2 */
2816				0x0000000a /* EMC_DLL_XFORM_DQ3 */
2817				0x000002a0 /* EMC_XM2CMDPADCTRL */
2818				0x0600013d /* EMC_XM2DQSPADCTRL2 */
2819				0x22220000 /* EMC_XM2DQPADCTRL2 */
2820				0x77fff884 /* EMC_XM2CLKPADCTRL */
2821				0x01f1f501 /* EMC_XM2COMPPADCTRL */
2822				0x07077404 /* EMC_XM2VTTGENPADCTRL */
2823				0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
2824				0x080001e8 /* EMC_XM2QUSEPADCTRL */
2825				0x0a000021 /* EMC_XM2DQSPADCTRL3 */
2826				0x00000802 /* EMC_CTT_TERM_CTRL */
2827				0x00020000 /* EMC_ZCAL_INTERVAL */
2828				0x00000100 /* EMC_ZCAL_WAIT_CNT */
2829				0x00d0000c /* EMC_MRS_WAIT_CNT */
2830				0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
2831				0x00000000 /* EMC_CTT */
2832				0x00000000 /* EMC_CTT_DURATION */
2833				0x8000308c /* EMC_DYN_SELF_REF_CONTROL */
2834				0xe8000000 /* EMC_FBIO_SPARE */
2835				0xff00ff49 /* EMC_CFG_RSV */
2836			>;
2837		};
2838	};
2839};
2840&state_default {
2841	clk_32k_out_pa0 {
2842		nvidia,pins = "clk_32k_out_pa0";
2843		nvidia,function = "blink";
2844		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2845		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2846		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2847	};
2848	uart3_cts_n_pa1 {
2849		nvidia,pins = "uart3_cts_n_pa1";
2850		nvidia,function = "uartc";
2851		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2852		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2853		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2854	};
2855	dap2_fs_pa2 {
2856		nvidia,pins = "dap2_fs_pa2";
2857		nvidia,function = "i2s1";
2858		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2859		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2860		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2861	};
2862	dap2_sclk_pa3 {
2863		nvidia,pins = "dap2_sclk_pa3";
2864		nvidia,function = "i2s1";
2865		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2866		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2867		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2868	};
2869	dap2_din_pa4 {
2870		nvidia,pins = "dap2_din_pa4";
2871		nvidia,function = "i2s1";
2872		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2873		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2874		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2875	};
2876	dap2_dout_pa5 {
2877		nvidia,pins = "dap2_dout_pa5";
2878		nvidia,function = "i2s1";
2879		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2880		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2881		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2882	};
2883	sdmmc3_clk_pa6 {
2884		nvidia,pins = "sdmmc3_clk_pa6";
2885		nvidia,function = "sdmmc3";
2886		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2887		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2888		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2889	};
2890	sdmmc3_cmd_pa7 {
2891		nvidia,pins = "sdmmc3_cmd_pa7";
2892		nvidia,function = "sdmmc3";
2893		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2894		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2895		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2896	};
2897	gmi_a17_pb0 {
2898		nvidia,pins = "gmi_a17_pb0";
2899		nvidia,function = "spi4";
2900		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2901		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2902		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2903	};
2904	gmi_a18_pb1 {
2905		nvidia,pins = "gmi_a18_pb1";
2906		nvidia,function = "spi4";
2907		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2908		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2909		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2910	};
2911	lcd_pwr0_pb2 {
2912		nvidia,pins = "lcd_pwr0_pb2";
2913		nvidia,function = "displaya";
2914		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2915		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2916		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2917	};
2918	lcd_pclk_pb3 {
2919		nvidia,pins = "lcd_pclk_pb3";
2920		nvidia,function = "displaya";
2921		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2922		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2923		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2924	};
2925	sdmmc3_dat3_pb4 {
2926		nvidia,pins = "sdmmc3_dat3_pb4";
2927		nvidia,function = "sdmmc3";
2928		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2929		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2930		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2931	};
2932	sdmmc3_dat2_pb5 {
2933		nvidia,pins = "sdmmc3_dat2_pb5";
2934		nvidia,function = "sdmmc3";
2935		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2936		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2937		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2938	};
2939	sdmmc3_dat1_pb6 {
2940		nvidia,pins = "sdmmc3_dat1_pb6";
2941		nvidia,function = "sdmmc3";
2942		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2943		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2944		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2945	};
2946	sdmmc3_dat0_pb7 {
2947		nvidia,pins = "sdmmc3_dat0_pb7";
2948		nvidia,function = "sdmmc3";
2949		nvidia,pull = <TEGRA_PIN_PULL_UP>;
2950		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2951		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
2952	};
2953	uart3_rts_n_pc0 {
2954		nvidia,pins = "uart3_rts_n_pc0";
2955		nvidia,function = "uartc";
2956		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2957		nvidia,tristate = <TEGRA_PIN_DISABLE>;
2958		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2959	};
2960	lcd_pwr1_pc1 {
2961		nvidia,pins = "lcd_pwr1_pc1";
2962		nvidia,function = "displaya";
2963		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2964		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2965		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2966	};
2967	uart2_txd_pc2 {
2968		nvidia,pins = "uart2_txd_pc2";
2969		nvidia,function = "uartb";
2970		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2971		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2972		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2973	};
2974	uart2_rxd_pc3 {
2975		nvidia,pins = "uart2_rxd_pc3";
2976		nvidia,function = "uartb";
2977		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2978		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2979		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2980	};
2981	gen1_i2c_scl_pc4 {
2982		nvidia,pins = "gen1_i2c_scl_pc4";
2983		nvidia,function = "i2c1";
2984		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2985		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2986		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2987		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
2988	};
2989	gen1_i2c_sda_pc5 {
2990		nvidia,pins = "gen1_i2c_sda_pc5";
2991		nvidia,function = "i2c1";
2992		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
2993		nvidia,tristate = <TEGRA_PIN_ENABLE>;
2994		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
2995		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
2996	};
2997	lcd_pwr2_pc6 {
2998		nvidia,pins = "lcd_pwr2_pc6";
2999		nvidia,function = "displaya";
3000		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3001		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3002		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3003	};
3004	gmi_wp_n_pc7 {
3005		nvidia,pins = "gmi_wp_n_pc7";
3006		nvidia,function = "gmi";
3007		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3008		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3009		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3010	};
3011	sdmmc3_dat5_pd0 {
3012		nvidia,pins = "sdmmc3_dat5_pd0";
3013		nvidia,function = "sdmmc3";
3014		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3015		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3016		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3017	};
3018	sdmmc3_dat4_pd1 {
3019		nvidia,pins = "sdmmc3_dat4_pd1";
3020		nvidia,function = "sdmmc3";
3021		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3022		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3023		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3024	};
3025	lcd_dc1_pd2 {
3026		nvidia,pins = "lcd_dc1_pd2";
3027		nvidia,function = "displaya";
3028		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3029		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3030		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3031	};
3032	sdmmc3_dat6_pd3 {
3033		nvidia,pins = "sdmmc3_dat6_pd3";
3034		nvidia,function = "spi4";
3035		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3036		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3037		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3038	};
3039	sdmmc3_dat7_pd4 {
3040		nvidia,pins = "sdmmc3_dat7_pd4";
3041		nvidia,function = "spi4";
3042		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3043		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3044		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3045	};
3046	vi_d1_pd5 {
3047		nvidia,pins = "vi_d1_pd5";
3048		nvidia,function = "sdmmc2";
3049		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3050		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3051		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3052	};
3053	vi_vsync_pd6 {
3054		nvidia,pins = "vi_vsync_pd6";
3055		nvidia,function = "ddr";
3056		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3057		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3058		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3059	};
3060	vi_hsync_pd7 {
3061		nvidia,pins = "vi_hsync_pd7";
3062		nvidia,function = "ddr";
3063		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3064		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3065		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3066	};
3067	lcd_d0_pe0 {
3068		nvidia,pins = "lcd_d0_pe0";
3069		nvidia,function = "displaya";
3070		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3071		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3072		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3073	};
3074	lcd_d1_pe1 {
3075		nvidia,pins = "lcd_d1_pe1";
3076		nvidia,function = "displaya";
3077		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3078		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3079		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3080	};
3081	lcd_d2_pe2 {
3082		nvidia,pins = "lcd_d2_pe2";
3083		nvidia,function = "displaya";
3084		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3085		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3086		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3087	};
3088	lcd_d3_pe3 {
3089		nvidia,pins = "lcd_d3_pe3";
3090		nvidia,function = "displaya";
3091		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3092		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3093		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3094	};
3095	lcd_d4_pe4 {
3096		nvidia,pins = "lcd_d4_pe4";
3097		nvidia,function = "displaya";
3098		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3099		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3100		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3101	};
3102	lcd_d5_pe5 {
3103		nvidia,pins = "lcd_d5_pe5";
3104		nvidia,function = "displaya";
3105		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3106		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3107		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3108	};
3109	lcd_d6_pe6 {
3110		nvidia,pins = "lcd_d6_pe6";
3111		nvidia,function = "displaya";
3112		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3113		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3114		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3115	};
3116	lcd_d7_pe7 {
3117		nvidia,pins = "lcd_d7_pe7";
3118		nvidia,function = "displaya";
3119		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3120		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3121		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3122	};
3123	lcd_d8_pf0 {
3124		nvidia,pins = "lcd_d8_pf0";
3125		nvidia,function = "displaya";
3126		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3127		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3128		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3129	};
3130	lcd_d9_pf1 {
3131		nvidia,pins = "lcd_d9_pf1";
3132		nvidia,function = "displaya";
3133		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3134		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3135		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3136	};
3137	lcd_d10_pf2 {
3138		nvidia,pins = "lcd_d10_pf2";
3139		nvidia,function = "displaya";
3140		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3141		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3142		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3143	};
3144	lcd_d11_pf3 {
3145		nvidia,pins = "lcd_d11_pf3";
3146		nvidia,function = "displaya";
3147		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3148		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3149		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3150	};
3151	lcd_d12_pf4 {
3152		nvidia,pins = "lcd_d12_pf4";
3153		nvidia,function = "displaya";
3154		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3155		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3156		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3157	};
3158	lcd_d13_pf5 {
3159		nvidia,pins = "lcd_d13_pf5";
3160		nvidia,function = "displaya";
3161		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3162		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3163		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3164	};
3165	lcd_d14_pf6 {
3166		nvidia,pins = "lcd_d14_pf6";
3167		nvidia,function = "displaya";
3168		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3169		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3170		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3171	};
3172	lcd_d15_pf7 {
3173		nvidia,pins = "lcd_d15_pf7";
3174		nvidia,function = "displaya";
3175		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3176		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3177		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3178	};
3179	gmi_ad0_pg0 {
3180		nvidia,pins = "gmi_ad0_pg0";
3181		nvidia,function = "nand";
3182		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3183		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3184		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3185	};
3186	gmi_ad1_pg1 {
3187		nvidia,pins = "gmi_ad1_pg1";
3188		nvidia,function = "nand";
3189		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3190		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3191		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3192	};
3193	gmi_ad2_pg2 {
3194		nvidia,pins = "gmi_ad2_pg2";
3195		nvidia,function = "nand";
3196		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3197		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3198		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3199	};
3200	gmi_ad3_pg3 {
3201		nvidia,pins = "gmi_ad3_pg3";
3202		nvidia,function = "nand";
3203		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3204		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3205		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3206	};
3207	gmi_ad4_pg4 {
3208		nvidia,pins = "gmi_ad4_pg4";
3209		nvidia,function = "nand";
3210		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3211		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3212		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3213	};
3214	gmi_ad5_pg5 {
3215		nvidia,pins = "gmi_ad5_pg5";
3216		nvidia,function = "nand";
3217		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3218		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3219		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3220	};
3221	gmi_ad6_pg6 {
3222		nvidia,pins = "gmi_ad6_pg6";
3223		nvidia,function = "nand";
3224		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3225		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3226		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3227	};
3228	gmi_ad7_pg7 {
3229		nvidia,pins = "gmi_ad7_pg7";
3230		nvidia,function = "nand";
3231		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3232		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3233		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3234	};
3235	gmi_ad8_ph0 {
3236		nvidia,pins = "gmi_ad8_ph0";
3237		nvidia,function = "pwm0";
3238		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3239		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3240		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3241	};
3242	gmi_ad9_ph1 {
3243		nvidia,pins = "gmi_ad9_ph1";
3244		nvidia,function = "pwm1";
3245		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3246		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3247		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3248	};
3249	gmi_ad10_ph2 {
3250		nvidia,pins = "gmi_ad10_ph2";
3251		nvidia,function = "pwm2";
3252		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3253		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3254		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3255	};
3256	gmi_ad11_ph3 {
3257		nvidia,pins = "gmi_ad11_ph3";
3258		nvidia,function = "nand";
3259		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3260		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3261		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3262	};
3263	gmi_ad12_ph4 {
3264		nvidia,pins = "gmi_ad12_ph4";
3265		nvidia,function = "nand";
3266		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3267		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3268		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3269	};
3270	gmi_ad13_ph5 {
3271		nvidia,pins = "gmi_ad13_ph5";
3272		nvidia,function = "nand";
3273		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3274		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3275		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3276	};
3277	gmi_ad14_ph6 {
3278		nvidia,pins = "gmi_ad14_ph6";
3279		nvidia,function = "nand";
3280		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3281		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3282		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3283	};
3284	gmi_wr_n_pi0 {
3285		nvidia,pins = "gmi_wr_n_pi0";
3286		nvidia,function = "nand";
3287		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3288		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3289		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3290	};
3291	gmi_oe_n_pi1 {
3292		nvidia,pins = "gmi_oe_n_pi1";
3293		nvidia,function = "nand";
3294		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3295		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3296		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3297	};
3298	gmi_dqs_pi2 {
3299		nvidia,pins = "gmi_dqs_pi2";
3300		nvidia,function = "nand";
3301		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3302		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3303		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3304	};
3305	gmi_iordy_pi5 {
3306		nvidia,pins = "gmi_iordy_pi5";
3307		nvidia,function = "rsvd1";
3308		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3309		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3310		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3311	};
3312	gmi_cs7_n_pi6 {
3313		nvidia,pins = "gmi_cs7_n_pi6";
3314		nvidia,function = "nand";
3315		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3316		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3317		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3318	};
3319	gmi_wait_pi7 {
3320		nvidia,pins = "gmi_wait_pi7";
3321		nvidia,function = "nand";
3322		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3323		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3324		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3325	};
3326	lcd_de_pj1 {
3327		nvidia,pins = "lcd_de_pj1";
3328		nvidia,function = "displaya";
3329		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3330		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3331		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3332	};
3333	gmi_cs1_n_pj2 {
3334		nvidia,pins = "gmi_cs1_n_pj2";
3335		nvidia,function = "rsvd1";
3336		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3337		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3338		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3339	};
3340	lcd_hsync_pj3 {
3341		nvidia,pins = "lcd_hsync_pj3";
3342		nvidia,function = "displaya";
3343		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3344		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3345		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3346	};
3347	lcd_vsync_pj4 {
3348		nvidia,pins = "lcd_vsync_pj4";
3349		nvidia,function = "displaya";
3350		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3351		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3352		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3353	};
3354	uart2_cts_n_pj5 {
3355		nvidia,pins = "uart2_cts_n_pj5";
3356		nvidia,function = "uartb";
3357		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
3358		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3359		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3360	};
3361	uart2_rts_n_pj6 {
3362		nvidia,pins = "uart2_rts_n_pj6";
3363		nvidia,function = "uartb";
3364		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3365		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3366		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3367	};
3368	gmi_a16_pj7 {
3369		nvidia,pins = "gmi_a16_pj7";
3370		nvidia,function = "spi4";
3371		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3372		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3373		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3374	};
3375	gmi_adv_n_pk0 {
3376		nvidia,pins = "gmi_adv_n_pk0";
3377		nvidia,function = "nand";
3378		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3379		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3380		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3381	};
3382	gmi_clk_pk1 {
3383		nvidia,pins = "gmi_clk_pk1";
3384		nvidia,function = "nand";
3385		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3386		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3387		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3388	};
3389	gmi_cs2_n_pk3 {
3390		nvidia,pins = "gmi_cs2_n_pk3";
3391		nvidia,function = "rsvd1";
3392		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3393		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3394		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3395	};
3396	gmi_cs3_n_pk4 {
3397		nvidia,pins = "gmi_cs3_n_pk4";
3398		nvidia,function = "nand";
3399		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3400		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3401		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3402	};
3403	spdif_out_pk5 {
3404		nvidia,pins = "spdif_out_pk5";
3405		nvidia,function = "spdif";
3406		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3407		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3408		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3409	};
3410	spdif_in_pk6 {
3411		nvidia,pins = "spdif_in_pk6";
3412		nvidia,function = "spdif";
3413		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3414		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3415		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3416	};
3417	gmi_a19_pk7 {
3418		nvidia,pins = "gmi_a19_pk7";
3419		nvidia,function = "spi4";
3420		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3421		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3422		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3423	};
3424	vi_d2_pl0 {
3425		nvidia,pins = "vi_d2_pl0";
3426		nvidia,function = "sdmmc2";
3427		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3428		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3429		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3430	};
3431	vi_d3_pl1 {
3432		nvidia,pins = "vi_d3_pl1";
3433		nvidia,function = "sdmmc2";
3434		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3435		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3436		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3437	};
3438	vi_d4_pl2 {
3439		nvidia,pins = "vi_d4_pl2";
3440		nvidia,function = "vi";
3441		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3442		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3443		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3444	};
3445	vi_d5_pl3 {
3446		nvidia,pins = "vi_d5_pl3";
3447		nvidia,function = "sdmmc2";
3448		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3449		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3450		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3451	};
3452	vi_d6_pl4 {
3453		nvidia,pins = "vi_d6_pl4";
3454		nvidia,function = "vi";
3455		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3456		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3457		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3458	};
3459	vi_d7_pl5 {
3460		nvidia,pins = "vi_d7_pl5";
3461		nvidia,function = "sdmmc2";
3462		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3463		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3464		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3465	};
3466	vi_d8_pl6 {
3467		nvidia,pins = "vi_d8_pl6";
3468		nvidia,function = "sdmmc2";
3469		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3470		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3471		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3472	};
3473	vi_d9_pl7 {
3474		nvidia,pins = "vi_d9_pl7";
3475		nvidia,function = "sdmmc2";
3476		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3477		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3478		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3479	};
3480	lcd_d16_pm0 {
3481		nvidia,pins = "lcd_d16_pm0";
3482		nvidia,function = "displaya";
3483		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3484		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3485		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3486	};
3487	lcd_d17_pm1 {
3488		nvidia,pins = "lcd_d17_pm1";
3489		nvidia,function = "displaya";
3490		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3491		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3492		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3493	};
3494	lcd_d18_pm2 {
3495		nvidia,pins = "lcd_d18_pm2";
3496		nvidia,function = "displaya";
3497		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3498		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3499		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3500	};
3501	lcd_d19_pm3 {
3502		nvidia,pins = "lcd_d19_pm3";
3503		nvidia,function = "displaya";
3504		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3505		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3506		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3507	};
3508	lcd_d20_pm4 {
3509		nvidia,pins = "lcd_d20_pm4";
3510		nvidia,function = "displaya";
3511		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3512		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3513		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3514	};
3515	lcd_d21_pm5 {
3516		nvidia,pins = "lcd_d21_pm5";
3517		nvidia,function = "displaya";
3518		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3519		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3520		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3521	};
3522	lcd_d22_pm6 {
3523		nvidia,pins = "lcd_d22_pm6";
3524		nvidia,function = "displaya";
3525		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3526		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3527		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3528	};
3529	lcd_d23_pm7 {
3530		nvidia,pins = "lcd_d23_pm7";
3531		nvidia,function = "displaya";
3532		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3533		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3534		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3535	};
3536	dap1_fs_pn0 {
3537		nvidia,pins = "dap1_fs_pn0";
3538		nvidia,function = "i2s0";
3539		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3540		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3541		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3542	};
3543	dap1_din_pn1 {
3544		nvidia,pins = "dap1_din_pn1";
3545		nvidia,function = "i2s0";
3546		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3547		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3548		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3549	};
3550	dap1_dout_pn2 {
3551		nvidia,pins = "dap1_dout_pn2";
3552		nvidia,function = "i2s0";
3553		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3554		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3555		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3556	};
3557	dap1_sclk_pn3 {
3558		nvidia,pins = "dap1_sclk_pn3";
3559		nvidia,function = "i2s0";
3560		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3561		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3562		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3563	};
3564	lcd_cs0_n_pn4 {
3565		nvidia,pins = "lcd_cs0_n_pn4";
3566		nvidia,function = "displaya";
3567		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3568		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3569		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3570	};
3571	lcd_sdout_pn5 {
3572		nvidia,pins = "lcd_sdout_pn5";
3573		nvidia,function = "displaya";
3574		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3575		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3576		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3577	};
3578	lcd_dc0_pn6 {
3579		nvidia,pins = "lcd_dc0_pn6";
3580		nvidia,function = "displaya";
3581		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3582		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3583		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3584	};
3585	hdmi_int_pn7 {
3586		nvidia,pins = "hdmi_int_pn7";
3587		nvidia,function = "hdmi";
3588		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3589		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3590		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3591	};
3592	ulpi_data7_po0 {
3593		nvidia,pins = "ulpi_data7_po0";
3594		nvidia,function = "uarta";
3595		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
3596		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3597		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3598	};
3599	ulpi_data0_po1 {
3600		nvidia,pins = "ulpi_data0_po1";
3601		nvidia,function = "uarta";
3602		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3603		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3604		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3605	};
3606	ulpi_data1_po2 {
3607		nvidia,pins = "ulpi_data1_po2";
3608		nvidia,function = "uarta";
3609		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3610		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3611		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3612	};
3613	ulpi_data2_po3 {
3614		nvidia,pins = "ulpi_data2_po3";
3615		nvidia,function = "uarta";
3616		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3617		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3618		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3619	};
3620	ulpi_data3_po4 {
3621		nvidia,pins = "ulpi_data3_po4";
3622		nvidia,function = "uarta";
3623		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3624		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3625		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3626	};
3627	ulpi_data4_po5 {
3628		nvidia,pins = "ulpi_data4_po5";
3629		nvidia,function = "uarta";
3630		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3631		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3632		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3633	};
3634	ulpi_data5_po6 {
3635		nvidia,pins = "ulpi_data5_po6";
3636		nvidia,function = "uarta";
3637		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3638		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3639		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3640	};
3641	ulpi_data6_po7 {
3642		nvidia,pins = "ulpi_data6_po7";
3643		nvidia,function = "uarta";
3644		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3645		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3646		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3647	};
3648	dap3_fs_pp0 {
3649		nvidia,pins = "dap3_fs_pp0";
3650		nvidia,function = "i2s2";
3651		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3652		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3653		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3654	};
3655	dap3_din_pp1 {
3656		nvidia,pins = "dap3_din_pp1";
3657		nvidia,function = "i2s2";
3658		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3659		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3660		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3661	};
3662	dap3_dout_pp2 {
3663		nvidia,pins = "dap3_dout_pp2";
3664		nvidia,function = "i2s2";
3665		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3666		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3667		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3668	};
3669	dap3_sclk_pp3 {
3670		nvidia,pins = "dap3_sclk_pp3";
3671		nvidia,function = "i2s2";
3672		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3673		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3674		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3675	};
3676	dap4_fs_pp4 {
3677		nvidia,pins = "dap4_fs_pp4";
3678		nvidia,function = "i2s3";
3679		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3680		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3681		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3682	};
3683	dap4_din_pp5 {
3684		nvidia,pins = "dap4_din_pp5";
3685		nvidia,function = "i2s3";
3686		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3687		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3688		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3689	};
3690	dap4_dout_pp6 {
3691		nvidia,pins = "dap4_dout_pp6";
3692		nvidia,function = "i2s3";
3693		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3694		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3695		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3696	};
3697	dap4_sclk_pp7 {
3698		nvidia,pins = "dap4_sclk_pp7";
3699		nvidia,function = "i2s3";
3700		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3701		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3702		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3703	};
3704	kb_col0_pq0 {
3705		nvidia,pins = "kb_col0_pq0";
3706		nvidia,function = "kbc";
3707		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3708		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3709		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3710	};
3711	kb_col1_pq1 {
3712		nvidia,pins = "kb_col1_pq1";
3713		nvidia,function = "kbc";
3714		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3715		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3716		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3717	};
3718	kb_col2_pq2 {
3719		nvidia,pins = "kb_col2_pq2";
3720		nvidia,function = "kbc";
3721		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3722		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3723		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3724	};
3725	kb_col3_pq3 {
3726		nvidia,pins = "kb_col3_pq3";
3727		nvidia,function = "kbc";
3728		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3729		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3730		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3731	};
3732	kb_col4_pq4 {
3733		nvidia,pins = "kb_col4_pq4";
3734		nvidia,function = "kbc";
3735		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3736		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3737		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3738	};
3739	kb_col5_pq5 {
3740		nvidia,pins = "kb_col5_pq5";
3741		nvidia,function = "kbc";
3742		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3743		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3744		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3745	};
3746	kb_col6_pq6 {
3747		nvidia,pins = "kb_col6_pq6";
3748		nvidia,function = "kbc";
3749		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3750		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3751		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3752	};
3753	kb_col7_pq7 {
3754		nvidia,pins = "kb_col7_pq7";
3755		nvidia,function = "kbc";
3756		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3757		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3758		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3759	};
3760	kb_row0_pr0 {
3761		nvidia,pins = "kb_row0_pr0";
3762		nvidia,function = "kbc";
3763		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3764		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3765		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3766	};
3767	kb_row1_pr1 {
3768		nvidia,pins = "kb_row1_pr1";
3769		nvidia,function = "kbc";
3770		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3771		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3772		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3773	};
3774	kb_row2_pr2 {
3775		nvidia,pins = "kb_row2_pr2";
3776		nvidia,function = "kbc";
3777		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3778		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3779		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3780	};
3781	kb_row3_pr3 {
3782		nvidia,pins = "kb_row3_pr3";
3783		nvidia,function = "kbc";
3784		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3785		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3786		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3787	};
3788	kb_row4_pr4 {
3789		nvidia,pins = "kb_row4_pr4";
3790		nvidia,function = "kbc";
3791		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3792		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3793		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3794	};
3795	kb_row5_pr5 {
3796		nvidia,pins = "kb_row5_pr5";
3797		nvidia,function = "kbc";
3798		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3799		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3800		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3801	};
3802	kb_row6_pr6 {
3803		nvidia,pins = "kb_row6_pr6";
3804		nvidia,function = "kbc";
3805		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3806		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3807		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3808	};
3809	kb_row7_pr7 {
3810		nvidia,pins = "kb_row7_pr7";
3811		nvidia,function = "kbc";
3812		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3813		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3814		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3815	};
3816	kb_row8_ps0 {
3817		nvidia,pins = "kb_row8_ps0";
3818		nvidia,function = "kbc";
3819		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3820		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3821		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3822	};
3823	kb_row9_ps1 {
3824		nvidia,pins = "kb_row9_ps1";
3825		nvidia,function = "kbc";
3826		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3827		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3828		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3829	};
3830	kb_row10_ps2 {
3831		nvidia,pins = "kb_row10_ps2";
3832		nvidia,function = "kbc";
3833		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3834		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3835		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3836	};
3837	kb_row11_ps3 {
3838		nvidia,pins = "kb_row11_ps3";
3839		nvidia,function = "kbc";
3840		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3841		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3842		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3843	};
3844	kb_row12_ps4 {
3845		nvidia,pins = "kb_row12_ps4";
3846		nvidia,function = "kbc";
3847		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3848		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3849		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3850	};
3851	kb_row13_ps5 {
3852		nvidia,pins = "kb_row13_ps5";
3853		nvidia,function = "kbc";
3854		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3855		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3856		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3857	};
3858	kb_row14_ps6 {
3859		nvidia,pins = "kb_row14_ps6";
3860		nvidia,function = "kbc";
3861		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3862		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3863		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3864	};
3865	kb_row15_ps7 {
3866		nvidia,pins = "kb_row15_ps7";
3867		nvidia,function = "kbc";
3868		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3869		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3870		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3871	};
3872	vi_pclk_pt0 {
3873		nvidia,pins = "vi_pclk_pt0";
3874		nvidia,function = "rsvd1";
3875		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3876		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3877		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3878	};
3879	vi_mclk_pt1 {
3880		nvidia,pins = "vi_mclk_pt1";
3881		nvidia,function = "vi";
3882		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3883		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3884		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3885	};
3886	vi_d10_pt2 {
3887		nvidia,pins = "vi_d10_pt2";
3888		nvidia,function = "ddr";
3889		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3890		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3891		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3892	};
3893	vi_d11_pt3 {
3894		nvidia,pins = "vi_d11_pt3";
3895		nvidia,function = "ddr";
3896		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3897		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3898		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3899	};
3900	vi_d0_pt4 {
3901		nvidia,pins = "vi_d0_pt4";
3902		nvidia,function = "ddr";
3903		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3904		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3905		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3906	};
3907	gen2_i2c_scl_pt5 {
3908		nvidia,pins = "gen2_i2c_scl_pt5";
3909		nvidia,function = "i2c2";
3910		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3911		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3912		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3913		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
3914	};
3915	gen2_i2c_sda_pt6 {
3916		nvidia,pins = "gen2_i2c_sda_pt6";
3917		nvidia,function = "i2c2";
3918		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3919		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3920		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3921		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
3922	};
3923	sdmmc4_cmd_pt7 {
3924		nvidia,pins = "sdmmc4_cmd_pt7";
3925		nvidia,function = "sdmmc4";
3926		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3927		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3928		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3929		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
3930	};
3931	pu0 {
3932		nvidia,pins = "pu0";
3933		nvidia,function = "owr";
3934		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3935		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3936		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3937	};
3938	pu1 {
3939		nvidia,pins = "pu1";
3940		nvidia,function = "rsvd1";
3941		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3942		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3943		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3944	};
3945	pu2 {
3946		nvidia,pins = "pu2";
3947		nvidia,function = "rsvd1";
3948		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3949		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3950		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3951	};
3952	pu3 {
3953		nvidia,pins = "pu3";
3954		nvidia,function = "pwm0";
3955		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3956		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3957		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3958	};
3959	pu4 {
3960		nvidia,pins = "pu4";
3961		nvidia,function = "pwm1";
3962		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3963		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3964		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3965	};
3966	pu5 {
3967		nvidia,pins = "pu5";
3968		nvidia,function = "rsvd4";
3969		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3970		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3971		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3972	};
3973	pu6 {
3974		nvidia,pins = "pu6";
3975		nvidia,function = "pwm3";
3976		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3977		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3978		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3979	};
3980	jtag_rtck_pu7 {
3981		nvidia,pins = "jtag_rtck_pu7";
3982		nvidia,function = "rtck";
3983		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3984		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3985		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
3986	};
3987	pv0 {
3988		nvidia,pins = "pv0";
3989		nvidia,function = "rsvd1";
3990		nvidia,pull = <TEGRA_PIN_PULL_UP>;
3991		nvidia,tristate = <TEGRA_PIN_DISABLE>;
3992		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
3993	};
3994	pv1 {
3995		nvidia,pins = "pv1";
3996		nvidia,function = "rsvd1";
3997		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
3998		nvidia,tristate = <TEGRA_PIN_ENABLE>;
3999		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4000	};
4001	pv2 {
4002		nvidia,pins = "pv2";
4003		nvidia,function = "owr";
4004		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4005		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4006		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4007	};
4008	pv3 {
4009		nvidia,pins = "pv3";
4010		nvidia,function = "clk_12m_out";
4011		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4012		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4013		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4014	};
4015	ddc_scl_pv4 {
4016		nvidia,pins = "ddc_scl_pv4";
4017		nvidia,function = "i2c4";
4018		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4019		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4020		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4021	};
4022	ddc_sda_pv5 {
4023		nvidia,pins = "ddc_sda_pv5";
4024		nvidia,function = "i2c4";
4025		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4026		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4027		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4028	};
4029	crt_hsync_pv6 {
4030		nvidia,pins = "crt_hsync_pv6";
4031		nvidia,function = "crt";
4032		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4033		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4034		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4035	};
4036	crt_vsync_pv7 {
4037		nvidia,pins = "crt_vsync_pv7";
4038		nvidia,function = "crt";
4039		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4040		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4041		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4042	};
4043	lcd_cs1_n_pw0 {
4044		nvidia,pins = "lcd_cs1_n_pw0";
4045		nvidia,function = "displaya";
4046		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4047		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4048		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4049	};
4050	lcd_m1_pw1 {
4051		nvidia,pins = "lcd_m1_pw1";
4052		nvidia,function = "displaya";
4053		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
4054		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4055		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4056	};
4057	spi2_cs1_n_pw2 {
4058		nvidia,pins = "spi2_cs1_n_pw2";
4059		nvidia,function = "spi2";
4060		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4061		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4062		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4063	};
4064	clk1_out_pw4 {
4065		nvidia,pins = "clk1_out_pw4";
4066		nvidia,function = "extperiph1";
4067		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4068		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4069		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4070	};
4071	clk2_out_pw5 {
4072		nvidia,pins = "clk2_out_pw5";
4073		nvidia,function = "extperiph2";
4074		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4075		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4076		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4077	};
4078	uart3_txd_pw6 {
4079		nvidia,pins = "uart3_txd_pw6";
4080		nvidia,function = "uartc";
4081		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4082		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4083		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4084	};
4085	uart3_rxd_pw7 {
4086		nvidia,pins = "uart3_rxd_pw7";
4087		nvidia,function = "uartc";
4088		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4089		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4090		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4091	};
4092	spi2_sck_px2 {
4093		nvidia,pins = "spi2_sck_px2";
4094		nvidia,function = "gmi";
4095		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4096		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4097		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4098	};
4099	spi1_mosi_px4 {
4100		nvidia,pins = "spi1_mosi_px4";
4101		nvidia,function = "spi1";
4102		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4103		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4104		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4105	};
4106	spi1_sck_px5 {
4107		nvidia,pins = "spi1_sck_px5";
4108		nvidia,function = "spi1";
4109		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4110		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4111		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4112	};
4113	spi1_cs0_n_px6 {
4114		nvidia,pins = "spi1_cs0_n_px6";
4115		nvidia,function = "spi1";
4116		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4117		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4118		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4119	};
4120	spi1_miso_px7 {
4121		nvidia,pins = "spi1_miso_px7";
4122		nvidia,function = "spi1";
4123		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4124		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4125		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4126	};
4127	ulpi_clk_py0 {
4128		nvidia,pins = "ulpi_clk_py0";
4129		nvidia,function = "uartd";
4130		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4131		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4132		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4133	};
4134	ulpi_dir_py1 {
4135		nvidia,pins = "ulpi_dir_py1";
4136		nvidia,function = "uartd";
4137		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4138		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4139		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4140	};
4141	ulpi_nxt_py2 {
4142		nvidia,pins = "ulpi_nxt_py2";
4143		nvidia,function = "uartd";
4144		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4145		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4146		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4147	};
4148	ulpi_stp_py3 {
4149		nvidia,pins = "ulpi_stp_py3";
4150		nvidia,function = "uartd";
4151		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4152		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4153		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4154	};
4155	sdmmc1_dat3_py4 {
4156		nvidia,pins = "sdmmc1_dat3_py4";
4157		nvidia,function = "sdmmc1";
4158		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4159		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4160		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4161	};
4162	sdmmc1_dat2_py5 {
4163		nvidia,pins = "sdmmc1_dat2_py5";
4164		nvidia,function = "sdmmc1";
4165		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4166		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4167		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4168	};
4169	sdmmc1_dat1_py6 {
4170		nvidia,pins = "sdmmc1_dat1_py6";
4171		nvidia,function = "sdmmc1";
4172		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4173		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4174		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4175	};
4176	sdmmc1_dat0_py7 {
4177		nvidia,pins = "sdmmc1_dat0_py7";
4178		nvidia,function = "sdmmc1";
4179		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4180		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4181		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4182	};
4183	sdmmc1_clk_pz0 {
4184		nvidia,pins = "sdmmc1_clk_pz0";
4185		nvidia,function = "sdmmc1";
4186		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4187		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4188		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4189	};
4190	sdmmc1_cmd_pz1 {
4191		nvidia,pins = "sdmmc1_cmd_pz1";
4192		nvidia,function = "sdmmc1";
4193		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4194		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4195		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4196	};
4197	lcd_sdin_pz2 {
4198		nvidia,pins = "lcd_sdin_pz2";
4199		nvidia,function = "displaya";
4200		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4201		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4202		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4203	};
4204	lcd_wr_n_pz3 {
4205		nvidia,pins = "lcd_wr_n_pz3";
4206		nvidia,function = "displaya";
4207		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4208		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4209		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4210	};
4211	lcd_sck_pz4 {
4212		nvidia,pins = "lcd_sck_pz4";
4213		nvidia,function = "displaya";
4214		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4215		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4216		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4217	};
4218	sys_clk_req_pz5 {
4219		nvidia,pins = "sys_clk_req_pz5";
4220		nvidia,function = "sysclk";
4221		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4222		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4223		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4224	};
4225	pwr_i2c_scl_pz6 {
4226		nvidia,pins = "pwr_i2c_scl_pz6";
4227		nvidia,function = "i2cpwr";
4228		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4229		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4230		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4231		nvidia,open-drain = <TEGRA_PIN_ENABLE>;
4232	};
4233	pwr_i2c_sda_pz7 {
4234		nvidia,pins = "pwr_i2c_sda_pz7";
4235		nvidia,function = "i2cpwr";
4236		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4237		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4238		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4239		nvidia,open-drain = <TEGRA_PIN_ENABLE>;
4240	};
4241	sdmmc4_dat0_paa0 {
4242		nvidia,pins = "sdmmc4_dat0_paa0";
4243		nvidia,function = "sdmmc4";
4244		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4245		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4246		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4247		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4248	};
4249	sdmmc4_dat1_paa1 {
4250		nvidia,pins = "sdmmc4_dat1_paa1";
4251		nvidia,function = "sdmmc4";
4252		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4253		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4254		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4255		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4256	};
4257	sdmmc4_dat2_paa2 {
4258		nvidia,pins = "sdmmc4_dat2_paa2";
4259		nvidia,function = "sdmmc4";
4260		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4261		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4262		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4263		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4264	};
4265	sdmmc4_dat3_paa3 {
4266		nvidia,pins = "sdmmc4_dat3_paa3";
4267		nvidia,function = "sdmmc4";
4268		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4269		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4270		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4271		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4272	};
4273	sdmmc4_dat4_paa4 {
4274		nvidia,pins = "sdmmc4_dat4_paa4";
4275		nvidia,function = "sdmmc4";
4276		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4277		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4278		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4279		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4280	};
4281	sdmmc4_dat5_paa5 {
4282		nvidia,pins = "sdmmc4_dat5_paa5";
4283		nvidia,function = "sdmmc4";
4284		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4285		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4286		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4287		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4288	};
4289	sdmmc4_dat6_paa6 {
4290		nvidia,pins = "sdmmc4_dat6_paa6";
4291		nvidia,function = "sdmmc4";
4292		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4293		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4294		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4295		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4296	};
4297	sdmmc4_dat7_paa7 {
4298		nvidia,pins = "sdmmc4_dat7_paa7";
4299		nvidia,function = "sdmmc4";
4300		nvidia,pull = <TEGRA_PIN_PULL_UP>;
4301		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4302		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4303		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4304	};
4305	pbb0 {
4306		nvidia,pins = "pbb0";
4307		nvidia,function = "i2s4";
4308		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4309		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4310		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4311	};
4312	cam_i2c_scl_pbb1 {
4313		nvidia,pins = "cam_i2c_scl_pbb1";
4314		nvidia,function = "i2c3";
4315		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4316		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4317		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4318		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4319	};
4320	cam_i2c_sda_pbb2 {
4321		nvidia,pins = "cam_i2c_sda_pbb2";
4322		nvidia,function = "i2c3";
4323		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4324		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4325		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4326		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4327	};
4328	pbb3 {
4329		nvidia,pins = "pbb3";
4330		nvidia,function = "vgp3";
4331		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4332		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4333		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4334	};
4335	pbb4 {
4336		nvidia,pins = "pbb4";
4337		nvidia,function = "vgp4";
4338		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4339		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4340		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4341	};
4342	pbb5 {
4343		nvidia,pins = "pbb5";
4344		nvidia,function = "vgp5";
4345		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4346		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4347		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4348	};
4349	pbb6 {
4350		nvidia,pins = "pbb6";
4351		nvidia,function = "vgp6";
4352		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4353		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4354		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4355	};
4356	pbb7 {
4357		nvidia,pins = "pbb7";
4358		nvidia,function = "i2s4";
4359		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4360		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4361		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4362	};
4363	cam_mclk_pcc0 {
4364		nvidia,pins = "cam_mclk_pcc0";
4365		nvidia,function = "vi_alt3";
4366		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4367		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4368		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4369	};
4370	pcc1 {
4371		nvidia,pins = "pcc1";
4372		nvidia,function = "i2s4";
4373		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4374		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4375		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4376	};
4377	pcc2 {
4378		nvidia,pins = "pcc2";
4379		nvidia,function = "i2s4";
4380		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4381		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4382		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4383	};
4384	sdmmc4_rst_n_pcc3 {
4385		nvidia,pins = "sdmmc4_rst_n_pcc3";
4386		nvidia,function = "sdmmc4";
4387		nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
4388		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4389		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4390		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4391	};
4392	sdmmc4_clk_pcc4 {
4393		nvidia,pins = "sdmmc4_clk_pcc4";
4394		nvidia,function = "sdmmc4";
4395		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4396		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4397		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4398		nvidia,io-reset = <TEGRA_PIN_DISABLE>;
4399	};
4400	clk2_req_pcc5 {
4401		nvidia,pins = "clk2_req_pcc5";
4402		nvidia,function = "dap";
4403		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4404		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4405		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4406	};
4407	pex_l2_rst_n_pcc6 {
4408		nvidia,pins = "pex_l2_rst_n_pcc6";
4409		nvidia,function = "pcie";
4410		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4411		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4412		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4413	};
4414	pex_l2_clkreq_n_pcc7 {
4415		nvidia,pins = "pex_l2_clkreq_n_pcc7";
4416		nvidia,function = "pcie";
4417		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4418		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4419		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4420	};
4421	pex_l0_prsnt_n_pdd0 {
4422		nvidia,pins = "pex_l0_prsnt_n_pdd0";
4423		nvidia,function = "pcie";
4424		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4425		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4426		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4427	};
4428	pex_l0_rst_n_pdd1 {
4429		nvidia,pins = "pex_l0_rst_n_pdd1";
4430		nvidia,function = "pcie";
4431		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4432		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4433		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4434	};
4435	pex_l0_clkreq_n_pdd2 {
4436		nvidia,pins = "pex_l0_clkreq_n_pdd2";
4437		nvidia,function = "pcie";
4438		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4439		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4440		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4441	};
4442	pex_wake_n_pdd3 {
4443		nvidia,pins = "pex_wake_n_pdd3";
4444		nvidia,function = "pcie";
4445		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4446		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4447		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4448	};
4449	pex_l1_prsnt_n_pdd4 {
4450		nvidia,pins = "pex_l1_prsnt_n_pdd4";
4451		nvidia,function = "pcie";
4452		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4453		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4454		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4455	};
4456	pex_l1_rst_n_pdd5 {
4457		nvidia,pins = "pex_l1_rst_n_pdd5";
4458		nvidia,function = "pcie";
4459		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4460		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4461		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4462	};
4463	pex_l1_clkreq_n_pdd6 {
4464		nvidia,pins = "pex_l1_clkreq_n_pdd6";
4465		nvidia,function = "pcie";
4466		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4467		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4468		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4469	};
4470	pex_l2_prsnt_n_pdd7 {
4471		nvidia,pins = "pex_l2_prsnt_n_pdd7";
4472		nvidia,function = "pcie";
4473		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4474		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4475		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4476	};
4477	clk3_out_pee0 {
4478		nvidia,pins = "clk3_out_pee0";
4479		nvidia,function = "extperiph3";
4480		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4481		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4482		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4483	};
4484	clk3_req_pee1 {
4485		nvidia,pins = "clk3_req_pee1";
4486		nvidia,function = "dev3";
4487		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4488		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4489		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4490	};
4491	clk1_req_pee2 {
4492		nvidia,pins = "clk1_req_pee2";
4493		nvidia,function = "dap";
4494		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4495		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4496		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4497	};
4498	hdmi_cec_pee3 {
4499		nvidia,pins = "hdmi_cec_pee3";
4500		nvidia,function = "cec";
4501		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4502		nvidia,tristate = <TEGRA_PIN_DISABLE>;
4503		nvidia,enable-input = <TEGRA_PIN_ENABLE>;
4504		nvidia,open-drain = <TEGRA_PIN_DISABLE>;
4505	};
4506	owr {
4507		nvidia,pins = "owr";
4508		nvidia,function = "owr";
4509		nvidia,pull = <TEGRA_PIN_PULL_NONE>;
4510		nvidia,tristate = <TEGRA_PIN_ENABLE>;
4511		nvidia,enable-input = <TEGRA_PIN_DISABLE>;
4512	};
4513	drive_groups {
4514		nvidia,pins = "drive_gma",
4515			      "drive_gmb",
4516			      "drive_gmc",
4517			      "drive_gmd";
4518		nvidia,pull-down-strength = <9>;
4519		nvidia,pull-up-strength = <9>;
4520		nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
4521		nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
4522	};
4523};
4524
4525&emc_icc_dvfs_opp_table {
4526	/delete-node/ opp@900000000,1350;
4527};
4528
4529&emc_bw_dfs_opp_table {
4530	/delete-node/ opp@900000000;
4531};
4532