1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Intel Smart Sound Technology
4  *
5  * Copyright (C) 2013, Intel Corporation. All rights reserved.
6  */
7 
8 #ifndef __SOUND_SOC_SST_DSP_PRIV_H
9 #define __SOUND_SOC_SST_DSP_PRIV_H
10 
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/firmware.h>
15 
16 #include "../skylake/skl-sst-dsp.h"
17 
18 /*
19  * DSP Operations exported by platform Audio DSP driver.
20  */
21 struct sst_ops {
22 	/* Shim IO */
23 	void (*write)(void __iomem *addr, u32 offset, u32 value);
24 	u32 (*read)(void __iomem *addr, u32 offset);
25 
26 	/* IRQ handlers */
27 	irqreturn_t (*irq_handler)(int irq, void *context);
28 
29 	/* SST init and free */
30 	int (*init)(struct sst_dsp *sst);
31 	void (*free)(struct sst_dsp *sst);
32 };
33 
34 /*
35  * Audio DSP memory offsets and addresses.
36  */
37 struct sst_addr {
38 	u32 sram0_base;
39 	u32 sram1_base;
40 	u32 w0_stat_sz;
41 	u32 w0_up_sz;
42 	void __iomem *lpe;
43 	void __iomem *shim;
44 };
45 
46 /*
47  * Audio DSP Mailbox configuration.
48  */
49 struct sst_mailbox {
50 	void __iomem *in_base;
51 	void __iomem *out_base;
52 	size_t in_size;
53 	size_t out_size;
54 };
55 
56 /*
57  * Generic SST Shim Interface.
58  */
59 struct sst_dsp {
60 
61 	/* Shared for all platforms */
62 
63 	/* runtime */
64 	struct sst_dsp_device *sst_dev;
65 	spinlock_t spinlock;	/* IPC locking */
66 	struct mutex mutex;	/* DSP FW lock */
67 	struct device *dev;
68 	void *thread_context;
69 	int irq;
70 	u32 id;
71 
72 	/* operations */
73 	struct sst_ops *ops;
74 
75 	/* debug FS */
76 	struct dentry *debugfs_root;
77 
78 	/* base addresses */
79 	struct sst_addr addr;
80 
81 	/* mailbox */
82 	struct sst_mailbox mailbox;
83 
84 	/* SST FW files loaded and their modules */
85 	struct list_head module_list;
86 
87 	/* SKL data */
88 
89 	const char *fw_name;
90 
91 	/* To allocate CL dma buffers */
92 	struct skl_dsp_loader_ops dsp_ops;
93 	struct skl_dsp_fw_ops fw_ops;
94 	int sst_state;
95 	struct skl_cl_dev cl_dev;
96 	u32 intr_status;
97 	const struct firmware *fw;
98 	struct snd_dma_buffer dmab;
99 };
100 
101 #endif
102