1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * tegra_cif.h - TEGRA Audio CIF Programming 4 * 5 * Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved. 6 * 7 */ 8 9 #ifndef __TEGRA_CIF_H__ 10 #define __TEGRA_CIF_H__ 11 12 #include <linux/regmap.h> 13 14 #define TEGRA_ACIF_CTRL_FIFO_TH_SHIFT 24 15 #define TEGRA_ACIF_CTRL_AUDIO_CH_SHIFT 20 16 #define TEGRA_ACIF_CTRL_CLIENT_CH_SHIFT 16 17 #define TEGRA_ACIF_CTRL_AUDIO_BITS_SHIFT 12 18 #define TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT 8 19 #define TEGRA_ACIF_CTRL_EXPAND_SHIFT 6 20 #define TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT 4 21 #define TEGRA_ACIF_CTRL_REPLICATE_SHIFT 3 22 #define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT 1 23 #define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT 0 24 25 /* AUDIO/CLIENT_BITS values */ 26 #define TEGRA_ACIF_BITS_8 1 27 #define TEGRA_ACIF_BITS_16 3 28 #define TEGRA_ACIF_BITS_24 5 29 #define TEGRA_ACIF_BITS_32 7 30 31 #define TEGRA_ACIF_UPDATE_MASK 0x3ffffffb 32 33 struct tegra_cif_conf { 34 unsigned int threshold; 35 unsigned int audio_ch; 36 unsigned int client_ch; 37 unsigned int audio_bits; 38 unsigned int client_bits; 39 unsigned int expand; 40 unsigned int stereo_conv; 41 unsigned int replicate; 42 unsigned int truncate; 43 unsigned int mono_conv; 44 }; 45 tegra_set_cif(struct regmap * regmap,unsigned int reg,struct tegra_cif_conf * conf)46static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg, 47 struct tegra_cif_conf *conf) 48 { 49 unsigned int value; 50 51 value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) | 52 ((conf->audio_ch - 1) << TEGRA_ACIF_CTRL_AUDIO_CH_SHIFT) | 53 ((conf->client_ch - 1) << TEGRA_ACIF_CTRL_CLIENT_CH_SHIFT) | 54 (conf->audio_bits << TEGRA_ACIF_CTRL_AUDIO_BITS_SHIFT) | 55 (conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) | 56 (conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) | 57 (conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) | 58 (conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) | 59 (conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) | 60 (conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT); 61 62 regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value); 63 } 64 65 #endif 66