1/* SPDX-License-Identifier: (BSD-2-Clause AND MIT) */ 2/* 3 * Copyright (c) 2014, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2008-2010 Travis Geiselbrecht 31 * 32 * Permission is hereby granted, free of charge, to any person obtaining 33 * a copy of this software and associated documentation files 34 * (the "Software"), to deal in the Software without restriction, 35 * including without limitation the rights to use, copy, modify, merge, 36 * publish, distribute, sublicense, and/or sell copies of the Software, 37 * and to permit persons to whom the Software is furnished to do so, 38 * subject to the following conditions: 39 * 40 * The above copyright notice and this permission notice shall be 41 * included in all copies or substantial portions of the Software. 42 * 43 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 44 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 45 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 46 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 47 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 48 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 49 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 50 */ 51 52#include <mm/core_mmu.h> 53#include <platform_config.h> 54#include <util.h> 55 56/* 57 * TEE_RAM_VA_START: The start virtual address of the TEE RAM 58 * TEE_TEXT_VA_START: The start virtual address of the OP-TEE text 59 */ 60#define TEE_RAM_VA_START TEE_RAM_START 61#define TEE_TEXT_VA_START (TEE_RAM_VA_START + \ 62 (TEE_LOAD_ADDR - TEE_RAM_START)) 63 64/* 65 * Note: 66 * Clang 11 (ld.lld) generates non-relocatable reference when using ROUNDDOWN() 67 * from <util.h>, which does not work with ASLR. 68 */ 69#define LD_ROUNDDOWN(x, y) ((x) - ((x) % (y))) 70 71OUTPUT_FORMAT(CFG_KERN_LINKER_FORMAT) 72OUTPUT_ARCH(CFG_KERN_LINKER_ARCH) 73 74ENTRY(_start) 75SECTIONS 76{ 77 . = TEE_TEXT_VA_START; 78#ifdef ARM32 79 ASSERT(!(TEE_TEXT_VA_START & 31), "text start should align to 32bytes") 80#endif 81#ifdef ARM64 82 ASSERT(!(TEE_TEXT_VA_START & 127), "text start should align to 128bytes") 83#endif 84 __text_start = .; 85 86 /* 87 * Memory between TEE_TEXT_VA_START and page aligned rounded down 88 * value will be mapped with unpaged "text" section attributes: 89 * likely to be read-only/executable. 90 */ 91 __flatmap_unpg_rx_start = LD_ROUNDDOWN(__text_start, SMALL_PAGE_SIZE); 92 93 .text : { 94 KEEP(*(.text._start)) 95 __identity_map_init_start = .; 96 *(.identity_map .identity_map.* \ 97 /* 98 * The one below is needed because it's a weak 99 * symbol that may be overridden by platform 100 * specific code. 101 */ 102 .text.get_core_pos_mpidr) 103 __identity_map_init_end = .; 104 KEEP(*(.text.init .text.plat_cpu_reset_early \ 105 .text.reset .text.reset_primary .text.unhandled_cpu \ 106 .text.__assert_flat_mapped_range)) 107 108#ifdef CFG_WITH_PAGER 109 *(.text) 110/* Include list of sections needed for paging */ 111#include <text_unpaged.ld.S> 112#else 113 *(.text .text.*) 114#endif 115 *(.sram.text.glue_7* .gnu.linkonce.t.*) 116 . = ALIGN(8); 117 } 118 __text_end = .; 119 120#ifdef CFG_CORE_RODATA_NOEXEC 121 . = ALIGN(SMALL_PAGE_SIZE); 122#endif 123 __flatmap_unpg_rx_size = . - __flatmap_unpg_rx_start; 124 __flatmap_unpg_ro_start = .; 125 126 .rodata : ALIGN(8) { 127 __rodata_start = .; 128 *(.gnu.linkonce.r.*) 129#ifdef CFG_WITH_PAGER 130 *(.rodata .rodata.__unpaged .rodata.__unpaged.*) 131#include <rodata_unpaged.ld.S> 132#else 133 *(.rodata .rodata.*) 134 . = ALIGN(8); 135 KEEP(*(SORT(.scattered_array*))); 136#endif 137 . = ALIGN(8); 138 __rodata_end = .; 139 } 140 141 .got : { *(.got.plt) *(.got) } 142 .note.gnu.property : { *(.note.gnu.property) } 143 .plt : { *(.plt) } 144 145 .ctors : ALIGN(8) { 146 __ctor_list = .; 147 KEEP(*(.ctors .ctors.* .init_array .init_array.*)) 148 __ctor_end = .; 149 } 150 .dtors : ALIGN(8) { 151 __dtor_list = .; 152 KEEP(*(.dtors .dtors.* .fini_array .fini_array.*)) 153 __dtor_end = .; 154 } 155 156 /* .ARM.exidx is sorted, so has to go in its own output section. */ 157 .ARM.exidx : { 158 __exidx_start = .; 159 *(.ARM.exidx* .gnu.linkonce.armexidx.*) 160 __exidx_end = .; 161 } 162 163 .ARM.extab : { 164 __extab_start = .; 165 *(.ARM.extab*) 166 __extab_end = .; 167 } 168 169 /* Start page aligned read-write memory */ 170#ifdef CFG_CORE_RWDATA_NOEXEC 171 . = ALIGN(SMALL_PAGE_SIZE); 172#endif 173 __flatmap_unpg_ro_size = . - __flatmap_unpg_ro_start; 174 175#ifdef CFG_VIRTUALIZATION 176 __flatmap_nex_rw_start = . ; 177 .nex_data : ALIGN(8) { 178 *(.nex_data .nex_data.*) 179 } 180 181 .nex_bss : ALIGN(8) { 182 __nex_bss_start = .; 183 *(.nex_bss .nex_bss.*) 184 __nex_bss_end = .; 185 } 186 187 /* 188 * We want to keep all nexus memory in one place, because 189 * it should be always mapped and it is easier to map one 190 * memory region than two. 191 * Next section are NOLOAD ones, but they are followed 192 * by sections with data. Thus, this NOLOAD section will 193 * be included in the resulting binary, filled with zeroes 194 */ 195 .nex_stack (NOLOAD) : { 196 __nozi_stack_start = .; 197 KEEP(*(.nozi_stack.stack_tmp .nozi_stack.stack_abt)) 198 . = ALIGN(8); 199 __nozi_stack_end = .; 200 } 201 202 .nex_heap (NOLOAD) : { 203 __nex_heap_start = .; 204 . += CFG_CORE_NEX_HEAP_SIZE; 205 . = ALIGN(16 * 1024); 206 __nex_heap_end = .; 207 } 208 .nex_nozi (NOLOAD) : { 209 ASSERT(!(ABSOLUTE(.) & (16 * 1024 - 1)), "align nozi to 16kB"); 210 KEEP(*(.nozi.mmu.base_table .nozi.mmu.l2)) 211 } 212 213 . = ALIGN(SMALL_PAGE_SIZE); 214 215 __flatmap_nex_rw_size = . - __flatmap_nex_rw_start; 216 __flatmap_nex_rw_end = .; 217#endif 218 219 __flatmap_unpg_rw_start = .; 220 221 .data : ALIGN(8) { 222 /* writable data */ 223 __data_start_rom = .; 224 /* in one segment binaries, the rom data address is on top 225 of the ram data address */ 226 __data_start = .; 227 *(.data .data.* .gnu.linkonce.d.*) 228 . = ALIGN(8); 229 } 230 231 /* unintialized data */ 232 .bss : { 233 __data_end = .; 234 __bss_start = .; 235 *(.bss .bss.*) 236 *(.gnu.linkonce.b.*) 237 *(COMMON) 238 . = ALIGN(8); 239 __bss_end = .; 240 } 241 242 .heap1 (NOLOAD) : { 243 /* 244 * We're keeping track of the padding added before the 245 * .nozi section so we can do something useful with 246 * this otherwise wasted memory. 247 */ 248 __heap1_start = .; 249#ifndef CFG_WITH_PAGER 250 . += CFG_CORE_HEAP_SIZE; 251#endif 252#ifdef CFG_WITH_LPAE 253 . = ALIGN(4 * 1024); 254#else 255 . = ALIGN(16 * 1024); 256#endif 257 __heap1_end = .; 258 } 259 /* 260 * Uninitialized data that shouldn't be zero initialized at 261 * runtime. 262 * 263 * L1 mmu table requires 16 KiB alignment 264 */ 265 .nozi (NOLOAD) : { 266 __nozi_start = .; 267 KEEP(*(.nozi .nozi.*)) 268 . = ALIGN(16); 269 __nozi_end = .; 270 /* 271 * If virtualization is enabled, abt and tmp stacks will placed 272 * at above .nex_stack section and thread stacks will go there 273 */ 274 __nozi_stack_start = .; 275 KEEP(*(.nozi_stack .nozi_stack.*)) 276 . = ALIGN(8); 277 __nozi_stack_end = .; 278 } 279 280#ifdef CFG_WITH_PAGER 281 .heap2 (NOLOAD) : { 282 __heap2_start = .; 283 /* 284 * Reserve additional memory for heap, the total should be 285 * at least CFG_CORE_HEAP_SIZE, but count what has already 286 * been reserved in .heap1 287 */ 288 . += CFG_CORE_HEAP_SIZE - (__heap1_end - __heap1_start); 289 . = ALIGN(SMALL_PAGE_SIZE); 290 __heap2_end = .; 291 } 292 293 /* Start page aligned read-only memory */ 294 __flatmap_unpg_rw_size = . - __flatmap_unpg_rw_start; 295 296 __init_start = .; 297 __flatmap_init_rx_start = .; 298 299 ASSERT(!(__flatmap_init_rx_start & (SMALL_PAGE_SIZE - 1)), 300 "read-write memory is not paged aligned") 301 302 .text_init : { 303/* 304 * Include list of sections needed for boot initialization, this list 305 * overlaps with unpaged.ld.S but since unpaged.ld.S is first all those 306 * sections will go into the unpaged area. 307 */ 308#include <text_init.ld.S> 309 KEEP(*(.text.startup.*)); 310 /* Make sure constructor functions are available during init */ 311 KEEP(*(.text._GLOBAL__sub_*)); 312 . = ALIGN(8); 313 } 314 315#ifdef CFG_CORE_RODATA_NOEXEC 316 . = ALIGN(SMALL_PAGE_SIZE); 317#endif 318 __flatmap_init_rx_size = . - __flatmap_init_rx_start; 319 __flatmap_init_ro_start = .; 320 321 .rodata_init : { 322#include <rodata_init.ld.S> 323 324 . = ALIGN(8); 325 KEEP(*(SORT(.scattered_array*))); 326 327 . = ALIGN(8); 328 __rodata_init_end = .; 329 } 330 331 __init_end = ALIGN(__rodata_init_end, SMALL_PAGE_SIZE); 332 __get_tee_init_end = __init_end; 333 __init_size = __init_end - __init_start; 334 335 /* vcore flat map stops here. No need to page align, rodata follows. */ 336 __flatmap_init_ro_size = __init_end - __flatmap_init_ro_start; 337 338 .rodata_pageable : ALIGN(8) { 339 *(.rodata*) 340 } 341 342#ifdef CFG_CORE_RODATA_NOEXEC 343 . = ALIGN(SMALL_PAGE_SIZE); 344#endif 345 346 .text_pageable : ALIGN(8) { 347 *(.text*) 348 . = ALIGN(SMALL_PAGE_SIZE); 349 } 350 351 __pageable_part_end = .; 352 __pageable_part_start = __init_end; 353 __pageable_start = __init_start; 354 __pageable_end = __pageable_part_end; 355 356 ASSERT(TEE_LOAD_ADDR >= TEE_RAM_START, 357 "Load address before start of physical memory") 358 ASSERT(TEE_LOAD_ADDR < (TEE_RAM_START + TEE_RAM_PH_SIZE), 359 "Load address after end of physical memory") 360 ASSERT((TEE_RAM_VA_START + TEE_RAM_PH_SIZE - __init_end) > 361 SMALL_PAGE_SIZE, "Too few free pages to initialize paging") 362 363 364#endif /*CFG_WITH_PAGER*/ 365 366#ifdef CFG_CORE_SANITIZE_KADDRESS 367 . = TEE_RAM_VA_START + (TEE_RAM_VA_SIZE * 8) / 9 - 8; 368 . = ALIGN(8); 369 .asan_shadow : { 370 __asan_shadow_start = .; 371 . += TEE_RAM_VA_SIZE / 9; 372 __asan_shadow_end = .; 373 __asan_shadow_size = __asan_shadow_end - __asan_shadow_start; 374 } 375#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 376 377 __end = .; 378 379#ifndef CFG_WITH_PAGER 380 __init_size = __data_end - TEE_TEXT_VA_START; 381#endif 382 /* 383 * Guard against moving the location counter backwards in the assignment 384 * below. 385 */ 386 ASSERT(. <= (TEE_RAM_VA_START + TEE_RAM_VA_SIZE), 387 "TEE_RAM_VA_SIZE is too small") 388 . = TEE_RAM_VA_START + TEE_RAM_VA_SIZE; 389 390 _end_of_ram = .; 391 392#ifndef CFG_WITH_PAGER 393 __flatmap_unpg_rw_size = _end_of_ram - __flatmap_unpg_rw_start; 394 __get_tee_init_end = .; 395#endif 396 397 /* 398 * These regions will not become a normal part of the dumped 399 * binary, instead some are interpreted by the dump script and 400 * converted into suitable format for OP-TEE itself to use. 401 */ 402 .dynamic : { *(.dynamic) } 403 .hash : { *(.hash) } 404 .dynsym : { *(.dynsym) } 405 .dynstr : { *(.dynstr) } 406 407 .rel : { 408 *(.rel.*) 409 } 410 .rela : { 411 *(.rela.*) 412 } 413#ifndef CFG_CORE_ASLR 414 ASSERT(SIZEOF(.rel) == 0, "Relocation entries not expected") 415 ASSERT(SIZEOF(.rela) == 0, "Relocation entries not expected") 416#endif 417 418 /DISCARD/ : { 419 /* Strip unnecessary stuff */ 420 *(.comment .note .eh_frame .interp) 421 /* Strip meta variables */ 422 *(__keep_meta_vars*) 423 } 424 425} 426 427/* Unpaged read-only memories */ 428__vcore_unpg_rx_start = __flatmap_unpg_rx_start; 429__vcore_unpg_ro_start = __flatmap_unpg_ro_start; 430#ifdef CFG_CORE_RODATA_NOEXEC 431__vcore_unpg_rx_size = __flatmap_unpg_rx_size; 432__vcore_unpg_ro_size = __flatmap_unpg_ro_size; 433#else 434__vcore_unpg_rx_size = __flatmap_unpg_rx_size + __flatmap_unpg_ro_size; 435__vcore_unpg_ro_size = 0; 436#endif 437__vcore_unpg_rx_end = __vcore_unpg_rx_start + __vcore_unpg_rx_size; 438__vcore_unpg_ro_end = __vcore_unpg_ro_start + __vcore_unpg_ro_size; 439 440/* Unpaged read-write memory */ 441__vcore_unpg_rw_start = __flatmap_unpg_rw_start; 442__vcore_unpg_rw_size = __flatmap_unpg_rw_size; 443__vcore_unpg_rw_end = __vcore_unpg_rw_start + __vcore_unpg_rw_size; 444 445#ifdef CFG_VIRTUALIZATION 446/* Nexus read-write memory */ 447__vcore_nex_rw_start = __flatmap_nex_rw_start; 448__vcore_nex_rw_size = __flatmap_nex_rw_size; 449__vcore_nex_rw_end = __vcore_nex_rw_start + __vcore_nex_rw_size; 450#endif 451 452#ifdef CFG_WITH_PAGER 453/* 454 * Core init mapping shall cover up to end of the physical RAM. 455 * This is required since the hash table is appended to the 456 * binary data after the firmware build sequence. 457 */ 458#define __FLATMAP_PAGER_TRAILING_SPACE \ 459 (TEE_RAM_START + TEE_RAM_PH_SIZE - \ 460 (__flatmap_init_ro_start + __flatmap_init_ro_size)) 461 462/* Paged/init read-only memories */ 463__vcore_init_rx_start = __flatmap_init_rx_start; 464__vcore_init_ro_start = __flatmap_init_ro_start; 465#ifdef CFG_CORE_RODATA_NOEXEC 466__vcore_init_rx_size = __flatmap_init_rx_size; 467__vcore_init_ro_size = __flatmap_init_ro_size + __FLATMAP_PAGER_TRAILING_SPACE; 468#else 469__vcore_init_rx_size = __flatmap_init_rx_size + __flatmap_init_ro_size + 470 __FLATMAP_PAGER_TRAILING_SPACE; 471__vcore_init_ro_size = 0; 472#endif /* CFG_CORE_RODATA_NOEXEC */ 473__vcore_init_rx_end = __vcore_init_rx_start + __vcore_init_rx_size; 474__vcore_init_ro_end = __vcore_init_ro_start + __vcore_init_ro_size; 475#endif /* CFG_WITH_PAGER */ 476 477#ifdef CFG_CORE_SANITIZE_KADDRESS 478__asan_map_start = (__asan_shadow_start / SMALL_PAGE_SIZE) * 479 SMALL_PAGE_SIZE; 480__asan_map_end = ((__asan_shadow_end - 1) / SMALL_PAGE_SIZE) * 481 SMALL_PAGE_SIZE + SMALL_PAGE_SIZE; 482__asan_map_size = __asan_map_end - __asan_map_start; 483#endif /*CFG_CORE_SANITIZE_KADDRESS*/ 484