1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2019, HiSilicon Technologies Co., Ltd.
4  */
5 
6 #ifndef __HI3519AV100_H__
7 #define __HI3519AV100_H__
8 
9 #include <mm/generic_ram_layout.h>
10 
11 /* PL011 */
12 #define PL011_UART0_BASE		0x04540000
13 #define PL011_BAUDRATE			115200
14 #define PL011_UART0_CLK_IN_HZ		24000000
15 
16 /* BootSRAM */
17 #define BOOTSRAM_BASE			0x04200000
18 #define BOOTSRAM_SIZE			0x1000
19 
20 /* CPU Reset Control */
21 #define CPU_CRG_BASE			0x04510000
22 #define CPU_CRG_SIZE			0x1000
23 
24 /* Sysctrl Register */
25 #define SYS_CTRL_BASE			0x04520000
26 #define SYS_CTRL_SIZE			0x1000
27 
28 #endif	/* __HI3519AV100_H__ */
29