1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef PLAT_ROCKCHIP_COMMON_H 7 #define PLAT_ROCKCHIP_COMMON_H 8 9 /* For SMP cpu bootup, they are common for rockchip platforms */ 10 #define LOCK_TAG 0xDEADBEAF 11 #define LOCK_ADDR_OFFSET 4 12 #define BOOT_ADDR_OFFSET 8 13 14 /* 15 * Some register has write-mask bits, it means if you want to set the bits, 16 * you need set the write-mask bits at the same time, the write-mask bits is 17 * in high 16-bits. The following macro definition helps you access register 18 * efficiently. 19 */ 20 #define REG_MSK_SHIFT 16 21 #define WMSK_BIT(nr) BIT((nr) + REG_MSK_SHIFT) 22 #define BIT_WITH_WMSK(nr) (BIT(nr) | WMSK_BIT(nr)) 23 #define BITS_WMSK(msk, shift) SHIFT_U32(msk, (shift) + REG_MSK_SHIFT) 24 #define BITS_WITH_WMASK(bits, msk, shift) \ 25 (SHIFT_U32(bits, shift) | BITS_WMSK(msk, shift)) 26 27 #endif 28