1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (c) 2017-2021, STMicroelectronics
4 */
5
6 #include <drivers/stm32_i2c.h>
7 #include <drivers/stm32mp1_pmic.h>
8 #include <drivers/stpmic1.h>
9 #include <io.h>
10 #include <keep.h>
11 #include <kernel/delay.h>
12 #include <kernel/dt.h>
13 #include <kernel/boot.h>
14 #include <kernel/panic.h>
15 #include <kernel/pm.h>
16 #include <libfdt.h>
17 #include <mm/core_memprot.h>
18 #include <platform_config.h>
19 #include <stdbool.h>
20 #include <stm32_util.h>
21 #include <trace.h>
22 #include <util.h>
23
24 #define MODE_STANDBY 8
25
26 #define PMIC_I2C_TRIALS 1
27 #define PMIC_I2C_TIMEOUT_BUSY_MS 5
28
29 #define PMIC_REGU_SUPPLY_NAME_LEN 12
30
31 #define PMIC_REGU_COUNT 14
32
33 /* Expect a single PMIC instance */
34 static struct i2c_handle_s i2c_handle;
35 static uint32_t pmic_i2c_addr;
36
37 /* CPU voltage supplier if found */
38 static char cpu_supply_name[PMIC_REGU_SUPPLY_NAME_LEN];
39
stm32mp_with_pmic(void)40 bool stm32mp_with_pmic(void)
41 {
42 return i2c_handle.dt_status & DT_STATUS_OK_SEC;
43 }
44
dt_get_pmic_node(void * fdt)45 static int dt_get_pmic_node(void *fdt)
46 {
47 static int node = -FDT_ERR_BADOFFSET;
48
49 if (node == -FDT_ERR_BADOFFSET)
50 node = fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
51
52 return node;
53 }
54
dt_pmic_status(void)55 static int dt_pmic_status(void)
56 {
57 void *fdt = get_embedded_dt();
58
59 if (fdt) {
60 int node = dt_get_pmic_node(fdt);
61
62 if (node > 0)
63 return _fdt_get_status(fdt, node);
64 }
65
66 return -1;
67 }
68
stm32mp_dt_pmic_status(void)69 int stm32mp_dt_pmic_status(void)
70 {
71 return dt_pmic_status();
72 }
73
dt_pmic_is_secure(void)74 static bool dt_pmic_is_secure(void)
75 {
76 int status = dt_pmic_status();
77
78 return status == DT_STATUS_OK_SEC &&
79 i2c_handle.dt_status == DT_STATUS_OK_SEC;
80 }
81
82 /*
83 * struct regu_bo_config - Boot on configuration for a regulator
84 * @flags: Operations expected when entering a low power sequence
85 * @cfg: Boot-on configuration to apply during low power sequences
86 */
87 struct regu_bo_config {
88 uint8_t flags;
89 struct stpmic1_bo_cfg cfg;
90 };
91
92 #define REGU_BO_FLAG_ENABLE_REGU BIT(0)
93 #define REGU_BO_FLAG_SET_VOLTAGE BIT(1)
94 #define REGU_BO_FLAG_PULL_DOWN BIT(2)
95 #define REGU_BO_FLAG_MASK_RESET BIT(3)
96
97 static struct regu_bo_config *regu_bo_config;
98 static size_t regu_bo_count;
99
100 /* boot-on mandatory? if so: caller panic() on error status */
dt_get_regu_boot_on_config(void * fdt,const char * regu_name,int regu_node)101 static void dt_get_regu_boot_on_config(void *fdt, const char *regu_name,
102 int regu_node)
103 {
104 const fdt32_t *cuint = NULL;
105 struct regu_bo_config regu_cfg = { };
106 uint16_t mv = 0;
107
108 if ((!fdt_getprop(fdt, regu_node, "regulator-boot-on", NULL)) &&
109 (!fdt_getprop(fdt, regu_node, "regulator-always-on", NULL)))
110 return;
111
112 regu_cfg.flags |= REGU_BO_FLAG_ENABLE_REGU;
113 if (stpmic1_bo_enable_cfg(regu_name, ®u_cfg.cfg)) {
114 EMSG("PMIC regulator %s not supported", regu_name);
115 panic();
116 }
117
118 if (fdt_getprop(fdt, regu_node, "regulator-pull-down", NULL)) {
119 if (stpmic1_bo_pull_down_cfg(regu_name, ®u_cfg.cfg)) {
120 DMSG("No pull down mode for regu %s", regu_name);
121 panic();
122 }
123 regu_cfg.flags |= REGU_BO_FLAG_PULL_DOWN;
124 }
125
126 if (fdt_getprop(fdt, regu_node, "st,mask-reset", NULL)) {
127 if (stpmic1_bo_mask_reset_cfg(regu_name, ®u_cfg.cfg)) {
128 DMSG("No reset mode for regu %s", regu_name);
129 panic();
130 }
131 regu_cfg.flags |= REGU_BO_FLAG_MASK_RESET;
132 }
133
134 cuint = fdt_getprop(fdt, regu_node,
135 "regulator-min-microvolt", NULL);
136 if (cuint) {
137 /* DT uses microvolts and driver awaits millivolts */
138 mv = fdt32_to_cpu(*cuint) / 1000;
139
140 if (stpmic1_bo_voltage_cfg(regu_name, mv, ®u_cfg.cfg))
141 DMSG("Ignore regulator-min-microvolt for %s",
142 regu_name);
143 else
144 regu_cfg.flags |= REGU_BO_FLAG_SET_VOLTAGE;
145 }
146
147 /* Save config in the Boot On configuration list */
148 regu_bo_count++;
149 regu_bo_config = realloc(regu_bo_config,
150 regu_bo_count * sizeof(regu_cfg));
151 if (!regu_bo_config)
152 panic();
153
154 regu_bo_config[regu_bo_count - 1] = regu_cfg;
155 }
156
stm32mp_pmic_apply_boot_on_config(void)157 void stm32mp_pmic_apply_boot_on_config(void)
158 {
159 size_t i = 0;
160
161 for (i = 0; i < regu_bo_count; i++) {
162 struct regu_bo_config *regu_cfg = ®u_bo_config[i];
163
164 if (regu_cfg->flags & REGU_BO_FLAG_SET_VOLTAGE)
165 if (stpmic1_bo_voltage_unpg(®u_cfg->cfg))
166 panic();
167
168 if (regu_cfg->flags & REGU_BO_FLAG_ENABLE_REGU)
169 if (stpmic1_bo_enable_unpg(®u_cfg->cfg))
170 panic();
171
172 if (regu_cfg->flags & REGU_BO_FLAG_PULL_DOWN)
173 if (stpmic1_bo_pull_down_unpg(®u_cfg->cfg))
174 panic();
175
176 if (regu_cfg->flags & REGU_BO_FLAG_MASK_RESET)
177 if (stpmic1_bo_mask_reset_unpg(®u_cfg->cfg))
178 panic();
179 }
180 }
181
182 /*
183 * @flags: Operations expected when entering a low power sequence
184 * @voltage: Target voltage to apply during low power sequences
185 */
186 struct regu_lp_config {
187 uint8_t flags;
188 struct stpmic1_lp_cfg cfg;
189 };
190
191 #define REGU_LP_FLAG_LOAD_PWRCTRL BIT(0)
192 #define REGU_LP_FLAG_ON_IN_SUSPEND BIT(1)
193 #define REGU_LP_FLAG_OFF_IN_SUSPEND BIT(2)
194 #define REGU_LP_FLAG_SET_VOLTAGE BIT(3)
195 #define REGU_LP_FLAG_MODE_STANDBY BIT(4)
196
197 /*
198 * struct regu_lp_state - Low power configuration for regulators
199 * @name: low power state identifier string name
200 * @cfg_count: number of regulator configuration instance in @cfg
201 * @cfg: regulator configurations for low power state @name
202 */
203 struct regu_lp_state {
204 const char *name;
205 size_t cfg_count;
206 struct regu_lp_config *cfg;
207 };
208
209 enum regu_lp_state_id {
210 REGU_LP_STATE_DISK = 0,
211 REGU_LP_STATE_STANDBY,
212 REGU_LP_STATE_MEM,
213 REGU_LP_STATE_MEM_LOWVOLTAGE,
214 REGU_LP_STATE_COUNT
215 };
216
217 static struct regu_lp_state regu_lp_state[REGU_LP_STATE_COUNT] = {
218 [REGU_LP_STATE_DISK] = { .name = "standby-ddr-off", },
219 [REGU_LP_STATE_STANDBY] = { .name = "standby-ddr-sr", },
220 [REGU_LP_STATE_MEM] = { .name = "lp-stop", },
221 [REGU_LP_STATE_MEM_LOWVOLTAGE] = { .name = "lplv-stop", },
222 };
223
regu_lp_state2idx(const char * name)224 static unsigned int regu_lp_state2idx(const char *name)
225 {
226 unsigned int i = 0;
227
228 for (i = 0; i < ARRAY_SIZE(regu_lp_state); i++)
229 if (!strcmp(name, regu_lp_state[i].name))
230 return i;
231
232 panic();
233 }
234
dt_get_regu_low_power_config(void * fdt,const char * regu_name,int regu_node,const char * lp_state)235 static void dt_get_regu_low_power_config(void *fdt, const char *regu_name,
236 int regu_node, const char *lp_state)
237 {
238 unsigned int state_idx = regu_lp_state2idx(lp_state);
239 struct regu_lp_state *state = regu_lp_state + state_idx;
240 const fdt32_t *cuint = NULL;
241 int regu_state_node = 0;
242 struct regu_lp_config *regu_cfg = NULL;
243
244 state->cfg_count++;
245 state->cfg = realloc(state->cfg,
246 state->cfg_count * sizeof(*state->cfg));
247 if (!state->cfg)
248 panic();
249
250 regu_cfg = &state->cfg[state->cfg_count - 1];
251
252 memset(regu_cfg, 0, sizeof(*regu_cfg));
253
254 if (stpmic1_regu_has_lp_cfg(regu_name)) {
255 if (stpmic1_lp_cfg(regu_name, ®u_cfg->cfg)) {
256 DMSG("Cannot setup low power for regu %s", regu_name);
257 panic();
258 }
259 /*
260 * Always copy active configuration (Control register)
261 * to PWRCTRL Control register, even if regu_state_node
262 * does not exist.
263 */
264 regu_cfg->flags |= REGU_LP_FLAG_LOAD_PWRCTRL;
265 }
266
267 /* Parse regulator stte node if any */
268 regu_state_node = fdt_subnode_offset(fdt, regu_node, lp_state);
269 if (regu_state_node <= 0)
270 return;
271
272 if (fdt_getprop(fdt, regu_state_node,
273 "regulator-on-in-suspend", NULL))
274 regu_cfg->flags |= REGU_LP_FLAG_ON_IN_SUSPEND;
275
276 if (fdt_getprop(fdt, regu_state_node,
277 "regulator-off-in-suspend", NULL))
278 regu_cfg->flags |= REGU_LP_FLAG_OFF_IN_SUSPEND;
279
280 cuint = fdt_getprop(fdt, regu_state_node,
281 "regulator-suspend-microvolt", NULL);
282 if (cuint) {
283 uint32_t mv = fdt32_to_cpu(*cuint) / 1000U;
284
285 if (stpmic1_lp_voltage_cfg(regu_name, mv, ®u_cfg->cfg)) {
286 DMSG("Cannot set voltage for %s", regu_name);
287 panic();
288 }
289 regu_cfg->flags |= REGU_LP_FLAG_SET_VOLTAGE;
290 }
291
292 cuint = fdt_getprop(fdt, regu_state_node,
293 "regulator-mode", NULL);
294 if (cuint && fdt32_to_cpu(*cuint) == MODE_STANDBY)
295 regu_cfg->flags |= REGU_LP_FLAG_MODE_STANDBY;
296 }
297
298 /*
299 * int stm32mp_pmic_set_lp_config(char *lp_state)
300 *
301 * Load the low power configuration stored in regu_lp_state[].
302 */
stm32mp_pmic_apply_lp_config(const char * lp_state)303 void stm32mp_pmic_apply_lp_config(const char *lp_state)
304 {
305 unsigned int state_idx = regu_lp_state2idx(lp_state);
306 struct regu_lp_state *state = ®u_lp_state[state_idx];
307 size_t i = 0;
308
309 if (stpmic1_powerctrl_on())
310 panic();
311
312 for (i = 0; i < state->cfg_count; i++) {
313 struct stpmic1_lp_cfg *cfg = &state->cfg[i].cfg;
314
315 if ((state->cfg[i].flags & REGU_LP_FLAG_LOAD_PWRCTRL) &&
316 stpmic1_lp_load_unpg(cfg))
317 panic();
318
319 if ((state->cfg[i].flags & REGU_LP_FLAG_ON_IN_SUSPEND) &&
320 stpmic1_lp_on_off_unpg(cfg, 1))
321 panic();
322
323 if ((state->cfg[i].flags & REGU_LP_FLAG_OFF_IN_SUSPEND) &&
324 stpmic1_lp_on_off_unpg(cfg, 0))
325 panic();
326
327 if ((state->cfg[i].flags & REGU_LP_FLAG_SET_VOLTAGE) &&
328 stpmic1_lp_voltage_unpg(cfg))
329 panic();
330
331 if ((state->cfg[i].flags & REGU_LP_FLAG_MODE_STANDBY) &&
332 stpmic1_lp_mode_unpg(cfg, 1))
333 panic();
334 }
335 }
336
337 /* Return a libfdt compliant status value */
save_cpu_supply_name(void)338 static int save_cpu_supply_name(void)
339 {
340 void *fdt = NULL;
341 int node = 0;
342 const fdt32_t *cuint = NULL;
343 const char *name = NULL;
344
345 fdt = get_embedded_dt();
346 if (!fdt)
347 panic();
348
349 node = fdt_path_offset(fdt, "/cpus/cpu@0");
350 if (node < 0)
351 return -FDT_ERR_NOTFOUND;
352
353 cuint = fdt_getprop(fdt, node, "cpu-supply", NULL);
354 if (!cuint)
355 return -FDT_ERR_NOTFOUND;
356
357 node = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*cuint));
358 if (node < 0)
359 return -FDT_ERR_NOTFOUND;
360
361 name = fdt_get_name(fdt, node, NULL);
362 assert(strnlen(name, sizeof(cpu_supply_name)) <
363 sizeof(cpu_supply_name));
364
365 strncpy(cpu_supply_name, name, sizeof(cpu_supply_name));
366
367 return 0;
368 }
369
stm32mp_pmic_get_cpu_supply_name(void)370 const char *stm32mp_pmic_get_cpu_supply_name(void)
371 {
372 return cpu_supply_name;
373 }
374
375 /* Preallocate not that much regu references */
376 static char *nsec_access_regu_name[PMIC_REGU_COUNT];
377
stm32mp_nsec_can_access_pmic_regu(const char * name)378 bool stm32mp_nsec_can_access_pmic_regu(const char *name)
379 {
380 size_t n = 0;
381
382 for (n = 0; n < ARRAY_SIZE(nsec_access_regu_name); n++)
383 if (nsec_access_regu_name[n] &&
384 !strcmp(nsec_access_regu_name[n], name))
385 return true;
386
387 return false;
388 }
389
register_nsec_regu(const char * name_ref)390 static void register_nsec_regu(const char *name_ref)
391 {
392 size_t n = 0;
393
394 assert(!stm32mp_nsec_can_access_pmic_regu(name_ref));
395
396 for (n = 0; n < ARRAY_SIZE(nsec_access_regu_name); n++) {
397 if (!nsec_access_regu_name[n]) {
398 nsec_access_regu_name[n] = strdup(name_ref);
399
400 if (!nsec_access_regu_name[n])
401 panic();
402 break;
403 }
404 }
405
406 assert(stm32mp_nsec_can_access_pmic_regu(name_ref));
407 }
408
parse_regulator_fdt_nodes(void)409 static void parse_regulator_fdt_nodes(void)
410 {
411 int pmic_node = 0;
412 int regulators_node = 0;
413 int regu_node = 0;
414 void *fdt = NULL;
415
416 /* Expected called once */
417 assert(!regu_bo_config && !regu_bo_count);
418
419 fdt = get_embedded_dt();
420 if (!fdt)
421 panic();
422
423 pmic_node = dt_get_pmic_node(fdt);
424 if (pmic_node < 0)
425 panic();
426
427 regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators");
428 if (regulators_node < 0)
429 panic();
430
431 fdt_for_each_subnode(regu_node, fdt, regulators_node) {
432 int status = _fdt_get_status(fdt, regu_node);
433 const char *regu_name = NULL;
434 size_t n = 0;
435
436 if (status == DT_STATUS_DISABLED)
437 continue;
438
439 regu_name = fdt_get_name(fdt, regu_node, NULL);
440
441 assert(stpmic1_regulator_is_valid(regu_name));
442
443 if (status & DT_STATUS_OK_NSEC)
444 register_nsec_regu(regu_name);
445
446 dt_get_regu_boot_on_config(fdt, regu_name, regu_node);
447
448 for (n = 0; n < ARRAY_SIZE(regu_lp_state); n++)
449 dt_get_regu_low_power_config(fdt, regu_name, regu_node,
450 regu_lp_state[n].name);
451 }
452
453 if (save_cpu_supply_name())
454 DMSG("No CPU supply provided");
455 }
456
457 /*
458 * Get PMIC and its I2C bus configuration from the device tree.
459 * Return 0 on success, 1 if no PMIC node found and a negative value otherwise
460 */
dt_pmic_i2c_config(struct dt_node_info * i2c_info,struct stm32_pinctrl ** pinctrl,size_t * pinctrl_count,struct stm32_i2c_init_s * init)461 static int dt_pmic_i2c_config(struct dt_node_info *i2c_info,
462 struct stm32_pinctrl **pinctrl,
463 size_t *pinctrl_count,
464 struct stm32_i2c_init_s *init)
465 {
466 int pmic_node = 0;
467 int i2c_node = 0;
468 void *fdt = NULL;
469 const fdt32_t *cuint = NULL;
470
471 fdt = get_embedded_dt();
472 if (!fdt)
473 return -FDT_ERR_NOTFOUND;
474
475 pmic_node = dt_get_pmic_node(fdt);
476 if (pmic_node < 0)
477 return 1;
478
479 cuint = fdt_getprop(fdt, pmic_node, "reg", NULL);
480 if (!cuint)
481 return -FDT_ERR_NOTFOUND;
482
483 pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1;
484 if (pmic_i2c_addr > UINT16_MAX)
485 return -FDT_ERR_BADVALUE;
486
487 i2c_node = fdt_parent_offset(fdt, pmic_node);
488 if (i2c_node < 0)
489 return -FDT_ERR_NOTFOUND;
490
491 _fdt_fill_device_info(fdt, i2c_info, i2c_node);
492 if (!i2c_info->reg)
493 return -FDT_ERR_NOTFOUND;
494
495 if (stm32_i2c_get_setup_from_fdt(fdt, i2c_node, init,
496 pinctrl, pinctrl_count))
497 panic();
498
499 return 0;
500 }
501
502 /*
503 * PMIC and resource initialization
504 */
505
506 /* Return true if PMIC is available, false if not found, panics on errors */
initialize_pmic_i2c(void)507 static bool initialize_pmic_i2c(void)
508 {
509 int ret = 0;
510 struct dt_node_info i2c_info = { };
511 struct i2c_handle_s *i2c = &i2c_handle;
512 struct stm32_pinctrl *pinctrl = NULL;
513 size_t pin_count = 0;
514 struct stm32_i2c_init_s i2c_init = { };
515
516 ret = dt_pmic_i2c_config(&i2c_info, &pinctrl, &pin_count, &i2c_init);
517 if (ret < 0) {
518 EMSG("I2C configuration failed %d", ret);
519 panic();
520 }
521 if (ret)
522 return false;
523
524 /* Initialize PMIC I2C */
525 i2c->base.pa = i2c_info.reg;
526 i2c->base.va = (vaddr_t)phys_to_virt(i2c->base.pa, MEM_AREA_IO_SEC, 1);
527 assert(i2c->base.va);
528 i2c->dt_status = i2c_info.status;
529 i2c->clock = i2c_init.clock;
530 i2c->i2c_state = I2C_STATE_RESET;
531 i2c_init.own_address1 = pmic_i2c_addr;
532 i2c_init.analog_filter = true;
533 i2c_init.digital_filter_coef = 0;
534
535 i2c->pinctrl = pinctrl;
536 i2c->pinctrl_count = pin_count;
537
538 stm32mp_get_pmic();
539
540 ret = stm32_i2c_init(i2c, &i2c_init);
541 if (ret) {
542 EMSG("I2C init 0x%" PRIxPA ": %d", i2c_info.reg, ret);
543 panic();
544 }
545
546 if (!stm32_i2c_is_device_ready(i2c, pmic_i2c_addr,
547 PMIC_I2C_TRIALS,
548 PMIC_I2C_TIMEOUT_BUSY_MS))
549 panic();
550
551 stpmic1_bind_i2c(i2c, pmic_i2c_addr);
552
553 stm32mp_put_pmic();
554
555 return true;
556 }
557
558 /*
559 * Automated suspend/resume at system suspend/resume is expected
560 * only when the PMIC is secure. If it is non secure, only atomic
561 * execution context can get/put the PMIC resources.
562 */
pmic_pm(enum pm_op op,uint32_t pm_hint __unused,const struct pm_callback_handle * pm_handle __unused)563 static TEE_Result pmic_pm(enum pm_op op, uint32_t pm_hint __unused,
564 const struct pm_callback_handle *pm_handle __unused)
565 {
566 if (op == PM_OP_SUSPEND)
567 stm32_i2c_suspend(&i2c_handle);
568 else
569 stm32_i2c_resume(&i2c_handle);
570
571 return TEE_SUCCESS;
572 }
573 DECLARE_KEEP_PAGER(pmic_pm);
574
575 /* stm32mp_get/put_pmic allows secure atomic sequences to use non secure PMIC */
stm32mp_get_pmic(void)576 void stm32mp_get_pmic(void)
577 {
578 stm32_i2c_resume(&i2c_handle);
579 }
580
stm32mp_put_pmic(void)581 void stm32mp_put_pmic(void)
582 {
583 stm32_i2c_suspend(&i2c_handle);
584 }
585
register_non_secure_pmic(void)586 static void register_non_secure_pmic(void)
587 {
588 size_t n = 0;
589
590 /* Allow this function to be called when STPMIC1 not used */
591 if (!i2c_handle.base.pa)
592 return;
593
594 for (n = 0; n < i2c_handle.pinctrl_count; n++)
595 stm32mp_register_non_secure_gpio(i2c_handle.pinctrl[n].bank,
596 i2c_handle.pinctrl[n].pin);
597
598 stm32mp_register_non_secure_periph_iomem(i2c_handle.base.pa);
599 }
600
register_secure_pmic(void)601 static void register_secure_pmic(void)
602 {
603 size_t n = 0;
604
605 for (n = 0; n < i2c_handle.pinctrl_count; n++)
606 stm32mp_register_secure_gpio(i2c_handle.pinctrl[n].bank,
607 i2c_handle.pinctrl[n].pin);
608
609 stm32mp_register_secure_periph_iomem(i2c_handle.base.pa);
610 register_pm_driver_cb(pmic_pm, NULL, "stm32mp1-pmic");
611 }
612
initialize_pmic(void)613 static TEE_Result initialize_pmic(void)
614 {
615 unsigned long pmic_version = 0;
616
617 if (!initialize_pmic_i2c()) {
618 DMSG("No PMIC");
619 register_non_secure_pmic();
620 return TEE_SUCCESS;
621 }
622
623 stm32mp_get_pmic();
624
625 if (stpmic1_get_version(&pmic_version))
626 panic("Failed to access PMIC");
627
628 DMSG("PMIC version = 0x%02lx", pmic_version);
629 stpmic1_dump_regulators();
630
631 if (dt_pmic_is_secure())
632 register_secure_pmic();
633 else
634 register_non_secure_pmic();
635
636 parse_regulator_fdt_nodes();
637
638 stm32mp_put_pmic();
639
640 return TEE_SUCCESS;
641 }
642 driver_init(initialize_pmic);
643