1/* SPDX-License-Identifier: BSD-2-Clause */
2/*
3 * Copyright (C) 2017, Fuzhou Rockchip Electronics Co., Ltd.
4 * Copyright (C) 2018, Linaro Limited
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <asm.S>
31#include <arm.h>
32#include <arm32_macros.S>
33
34FUNC plat_cpu_reset_early , :
35        /* NSACR configuration */
36	read_nsacr  r0
37	orr     r0, r0, #NSACR_CP10
38	orr     r0, r0, #NSACR_CP11
39	orr     r0, r0, #NSACR_NS_SMP
40	write_nsacr r0
41
42	/* Enable SMP bit */
43        read_actlr  r0
44	orr     r0, r0, #ACTLR_SMP
45	write_actlr  r0
46
47	bx	lr
48END_FUNC plat_cpu_reset_early
49