1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2021, Arm Limited. All rights reserved. 4 */ 5 6 #ifndef PLATFORM_CONFIG_H 7 #define PLATFORM_CONFIG_H 8 9 #include <mm/generic_ram_layout.h> 10 11 /* Make stacks aligned to data cache line length */ 12 #define STACK_ALIGNMENT 64 13 14 #if defined(PLATFORM_FLAVOR_tc0) || defined(PLATFORM_FLAVOR_tc1) 15 #ifndef CFG_CORE_SEL2_SPMC 16 #define GIC_BASE 0x30000000 17 #define GICD_OFFSET 0x0 18 #define GICC_OFFSET 0x0 19 #endif 20 21 #define UART0_BASE 0x7FF70000 22 #define UART1_BASE 0x7FF80000 23 24 #define CONSOLE_UART_BASE UART0_BASE 25 26 #define DRAM0_BASE 0x80000000 27 #define DRAM0_SIZE 0x7d000000 28 29 #define DRAM1_BASE 0x8080000000ULL 30 #define DRAM1_SIZE 0x180000000ULL 31 32 #define TZCDRAM_BASE 0xff000000 33 #define TZCDRAM_SIZE 0x01000000 34 35 #else 36 #error "Unknown platform flavor" 37 #endif 38 39 #ifdef GIC_BASE 40 #define GICD_BASE (GIC_BASE + GICD_OFFSET) 41 #define GICC_BASE (GIC_BASE + GICC_OFFSET) 42 #endif 43 44 #define CONSOLE_UART_BAUDRATE 115200 45 #define CONSOLE_UART_CLK_IN_HZ 7372800 46 47 #endif /* PLATFORM_CONFIG_H */ 48