1 /* 2 * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef TSP_PRIVATE_H 8 #define TSP_PRIVATE_H 9 10 /* Definitions to help the assembler access the SMC/ERET args structure */ 11 #define TSP_ARGS_SIZE 0x40 12 #define TSP_ARG0 0x0 13 #define TSP_ARG1 0x8 14 #define TSP_ARG2 0x10 15 #define TSP_ARG3 0x18 16 #define TSP_ARG4 0x20 17 #define TSP_ARG5 0x28 18 #define TSP_ARG6 0x30 19 #define TSP_ARG7 0x38 20 #define TSP_ARGS_END 0x40 21 22 23 #ifndef __ASSEMBLER__ 24 25 #include <stdint.h> 26 27 #include <platform_def.h> /* For CACHE_WRITEBACK_GRANULE */ 28 29 #include <bl32/tsp/tsp.h> 30 #include <lib/cassert.h> 31 #include <lib/spinlock.h> 32 33 typedef struct work_statistics { 34 /* Number of s-el1 interrupts on this cpu */ 35 uint32_t sel1_intr_count; 36 /* Number of non s-el1 interrupts on this cpu which preempted TSP */ 37 uint32_t preempt_intr_count; 38 /* Number of sync s-el1 interrupts on this cpu */ 39 uint32_t sync_sel1_intr_count; 40 /* Number of s-el1 interrupts returns on this cpu */ 41 uint32_t sync_sel1_intr_ret_count; 42 uint32_t smc_count; /* Number of returns on this cpu */ 43 uint32_t eret_count; /* Number of entries on this cpu */ 44 uint32_t cpu_on_count; /* Number of cpu on requests */ 45 uint32_t cpu_off_count; /* Number of cpu off requests */ 46 uint32_t cpu_suspend_count; /* Number of cpu suspend requests */ 47 uint32_t cpu_resume_count; /* Number of cpu resume requests */ 48 } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t; 49 50 typedef struct tsp_args { 51 uint64_t _regs[TSP_ARGS_END >> 3]; 52 } __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t; 53 54 /* Macros to access members of the above structure using their offsets */ 55 #define read_sp_arg(args, offset) ((args)->_regs[offset >> 3]) 56 #define write_sp_arg(args, offset, val) (((args)->_regs[offset >> 3]) \ 57 = val) 58 /* 59 * Ensure that the assembler's view of the size of the tsp_args is the 60 * same as the compilers 61 */ 62 CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch); 63 64 uint128_t tsp_get_magic(void); 65 66 tsp_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl, 67 uint64_t arg1, 68 uint64_t arg2, 69 uint64_t arg3, 70 uint64_t arg4, 71 uint64_t arg5, 72 uint64_t arg6, 73 uint64_t arg7); 74 tsp_args_t *tsp_cpu_suspend_main(uint64_t arg0, 75 uint64_t arg1, 76 uint64_t arg2, 77 uint64_t arg3, 78 uint64_t arg4, 79 uint64_t arg5, 80 uint64_t arg6, 81 uint64_t arg7); 82 tsp_args_t *tsp_cpu_on_main(void); 83 tsp_args_t *tsp_cpu_off_main(uint64_t arg0, 84 uint64_t arg1, 85 uint64_t arg2, 86 uint64_t arg3, 87 uint64_t arg4, 88 uint64_t arg5, 89 uint64_t arg6, 90 uint64_t arg7); 91 92 /* Generic Timer functions */ 93 void tsp_generic_timer_start(void); 94 void tsp_generic_timer_handler(void); 95 void tsp_generic_timer_stop(void); 96 void tsp_generic_timer_save(void); 97 void tsp_generic_timer_restore(void); 98 99 /* S-EL1 interrupt management functions */ 100 void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3); 101 102 103 /* Data structure to keep track of TSP statistics */ 104 extern spinlock_t console_lock; 105 extern work_statistics_t tsp_stats[PLATFORM_CORE_COUNT]; 106 107 /* Vector table of jumps */ 108 extern tsp_vectors_t tsp_vector_table; 109 110 /* functions */ 111 int32_t tsp_common_int_handler(void); 112 int32_t tsp_handle_preemption(void); 113 114 tsp_args_t tsp_smc(uint32_t func, uint64_t arg0, 115 uint64_t arg1, uint64_t arg2, 116 uint64_t arg3, uint64_t arg4, 117 uint64_t arg5, uint64_t arg6); 118 119 tsp_args_t *tsp_abort_smc_handler(uint64_t func, 120 uint64_t arg1, 121 uint64_t arg2, 122 uint64_t arg3, 123 uint64_t arg4, 124 uint64_t arg5, 125 uint64_t arg6, 126 uint64_t arg7); 127 128 tsp_args_t *tsp_smc_handler(uint64_t func, 129 uint64_t arg1, 130 uint64_t arg2, 131 uint64_t arg3, 132 uint64_t arg4, 133 uint64_t arg5, 134 uint64_t arg6, 135 uint64_t arg7); 136 137 tsp_args_t *tsp_system_reset_main(uint64_t arg0, 138 uint64_t arg1, 139 uint64_t arg2, 140 uint64_t arg3, 141 uint64_t arg4, 142 uint64_t arg5, 143 uint64_t arg6, 144 uint64_t arg7); 145 146 tsp_args_t *tsp_system_off_main(uint64_t arg0, 147 uint64_t arg1, 148 uint64_t arg2, 149 uint64_t arg3, 150 uint64_t arg4, 151 uint64_t arg5, 152 uint64_t arg6, 153 uint64_t arg7); 154 155 #if SPMC_AT_EL3 156 tsp_args_t *tsp_main(uintptr_t secondary_ep); 157 #else 158 uint64_t tsp_main(void); 159 #endif 160 #endif /* __ASSEMBLER__ */ 161 162 #endif /* TSP_PRIVATE_H */ 163