1 /*
2  * Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef BL_COMMON_LD_H
8 #define BL_COMMON_LD_H
9 
10 #include <platform_def.h>
11 
12 #ifdef __aarch64__
13 #define STRUCT_ALIGN	8
14 #define BSS_ALIGN	16
15 #else
16 #define STRUCT_ALIGN	4
17 #define BSS_ALIGN	8
18 #endif
19 
20 #ifndef DATA_ALIGN
21 #define DATA_ALIGN	1
22 #endif
23 
24 #define CPU_OPS						\
25 	. = ALIGN(STRUCT_ALIGN);			\
26 	__CPU_OPS_START__ = .;				\
27 	KEEP(*(cpu_ops))				\
28 	__CPU_OPS_END__ = .;
29 
30 #define PARSER_LIB_DESCS				\
31 	. = ALIGN(STRUCT_ALIGN);			\
32 	__PARSER_LIB_DESCS_START__ = .;			\
33 	KEEP(*(.img_parser_lib_descs))			\
34 	__PARSER_LIB_DESCS_END__ = .;
35 
36 #define RT_SVC_DESCS					\
37 	. = ALIGN(STRUCT_ALIGN);			\
38 	__RT_SVC_DESCS_START__ = .;			\
39 	KEEP(*(rt_svc_descs))				\
40 	__RT_SVC_DESCS_END__ = .;
41 
42 #if SPMC_AT_EL3
43 #define EL3_LP_DESCS					\
44 	. = ALIGN(STRUCT_ALIGN);			\
45 	__EL3_LP_DESCS_START__ = .;			\
46 	KEEP(*(el3_lp_descs))				\
47 	__EL3_LP_DESCS_END__ = .;
48 #else
49 #define EL3_LP_DESCS
50 #endif
51 
52 #define PMF_SVC_DESCS					\
53 	. = ALIGN(STRUCT_ALIGN);			\
54 	__PMF_SVC_DESCS_START__ = .;			\
55 	KEEP(*(pmf_svc_descs))				\
56 	__PMF_SVC_DESCS_END__ = .;
57 
58 #define FCONF_POPULATOR					\
59 	. = ALIGN(STRUCT_ALIGN);			\
60 	__FCONF_POPULATOR_START__ = .;			\
61 	KEEP(*(.fconf_populator))			\
62 	__FCONF_POPULATOR_END__ = .;
63 
64 /*
65  * Keep the .got section in the RO section as it is patched prior to enabling
66  * the MMU and having the .got in RO is better for security. GOT is a table of
67  * addresses so ensure pointer size alignment.
68  */
69 #define GOT						\
70 	. = ALIGN(STRUCT_ALIGN);			\
71 	__GOT_START__ = .;				\
72 	*(.got)						\
73 	__GOT_END__ = .;
74 
75 /*
76  * The base xlat table
77  *
78  * It is put into the rodata section if PLAT_RO_XLAT_TABLES=1,
79  * or into the bss section otherwise.
80  */
81 #define BASE_XLAT_TABLE					\
82 	. = ALIGN(16);					\
83 	*(base_xlat_table)
84 
85 #if PLAT_RO_XLAT_TABLES
86 #define BASE_XLAT_TABLE_RO		BASE_XLAT_TABLE
87 #define BASE_XLAT_TABLE_BSS
88 #else
89 #define BASE_XLAT_TABLE_RO
90 #define BASE_XLAT_TABLE_BSS		BASE_XLAT_TABLE
91 #endif
92 
93 
94 #define RODATA_COMMON					\
95 	RT_SVC_DESCS					\
96 	FCONF_POPULATOR					\
97 	PMF_SVC_DESCS					\
98 	PARSER_LIB_DESCS				\
99 	CPU_OPS						\
100 	GOT						\
101 	BASE_XLAT_TABLE_RO		\
102 	EL3_LP_DESCS
103 
104 /*
105  * .data must be placed at a lower address than the stacks if the stack
106  * protector is enabled. Alternatively, the .data.stack_protector_canary
107  * section can be placed independently of the main .data section.
108  */
109 #define DATA_SECTION					\
110 	.data . : ALIGN(DATA_ALIGN) {			\
111 		__DATA_START__ = .;			\
112 		*(SORT_BY_ALIGNMENT(.data*))		\
113 		__DATA_END__ = .;			\
114 	}
115 
116 /*
117  * .rela.dyn needs to come after .data for the read-elf utility to parse
118  * this section correctly.
119  */
120 #if __aarch64__
121 #define RELA_DYN_NAME		.rela.dyn
122 #define RELOC_SECTIONS_PATTERN	*(.rela*)
123 #else
124 #define RELA_DYN_NAME		.rel.dyn
125 #define RELOC_SECTIONS_PATTERN	*(.rel*)
126 #endif
127 
128 #define RELA_SECTION					\
129 	RELA_DYN_NAME : ALIGN(STRUCT_ALIGN) {		\
130 		__RELA_START__ = .;			\
131 		RELOC_SECTIONS_PATTERN			\
132 		__RELA_END__ = .;			\
133 	}
134 
135 #if !(defined(IMAGE_BL31) && RECLAIM_INIT_CODE)
136 #define STACK_SECTION					\
137 	stacks (NOLOAD) : {				\
138 		__STACKS_START__ = .;			\
139 		*(tzfw_normal_stacks)			\
140 		__STACKS_END__ = .;			\
141 	}
142 #endif
143 
144 /*
145  * If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__
146  * will be zero. For this reason, the only two valid values for
147  * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value
148  * PLAT_PERCPU_BAKERY_LOCK_SIZE.
149  */
150 #ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE
151 #define BAKERY_LOCK_SIZE_CHECK				\
152 	ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) ||	\
153 	       (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \
154 	       "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements");
155 #else
156 #define BAKERY_LOCK_SIZE_CHECK
157 #endif
158 
159 /*
160  * Bakery locks are stored in normal .bss memory
161  *
162  * Each lock's data is spread across multiple cache lines, one per CPU,
163  * but multiple locks can share the same cache line.
164  * The compiler will allocate enough memory for one CPU's bakery locks,
165  * the remaining cache lines are allocated by the linker script
166  */
167 #if !USE_COHERENT_MEM
168 #define BAKERY_LOCK_NORMAL				\
169 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
170 	__BAKERY_LOCK_START__ = .;			\
171 	__PERCPU_BAKERY_LOCK_START__ = .;		\
172 	*(bakery_lock)					\
173 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
174 	__PERCPU_BAKERY_LOCK_END__ = .;			\
175 	__PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \
176 	. = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
177 	__BAKERY_LOCK_END__ = .;			\
178 	BAKERY_LOCK_SIZE_CHECK
179 #else
180 #define BAKERY_LOCK_NORMAL
181 #endif
182 
183 /*
184  * Time-stamps are stored in normal .bss memory
185  *
186  * The compiler will allocate enough memory for one CPU's time-stamps,
187  * the remaining memory for other CPUs is allocated by the
188  * linker script
189  */
190 #define PMF_TIMESTAMP					\
191 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
192 	__PMF_TIMESTAMP_START__ = .;			\
193 	KEEP(*(pmf_timestamp_array))			\
194 	. = ALIGN(CACHE_WRITEBACK_GRANULE);		\
195 	__PMF_PERCPU_TIMESTAMP_END__ = .;		\
196 	__PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \
197 	. = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
198 	__PMF_TIMESTAMP_END__ = .;
199 
200 
201 /*
202  * The .bss section gets initialised to 0 at runtime.
203  * Its base address has bigger alignment for better performance of the
204  * zero-initialization code.
205  */
206 #define BSS_SECTION					\
207 	.bss (NOLOAD) : ALIGN(BSS_ALIGN) {		\
208 		__BSS_START__ = .;			\
209 		*(SORT_BY_ALIGNMENT(.bss*))		\
210 		*(COMMON)				\
211 		BAKERY_LOCK_NORMAL			\
212 		PMF_TIMESTAMP				\
213 		BASE_XLAT_TABLE_BSS			\
214 		__BSS_END__ = .;			\
215 	}
216 
217 /*
218  * The xlat_table section is for full, aligned page tables (4K).
219  * Removing them from .bss avoids forcing 4K alignment on
220  * the .bss section. The tables are initialized to zero by the translation
221  * tables library.
222  */
223 #define XLAT_TABLE_SECTION				\
224 	xlat_table (NOLOAD) : {				\
225 		*(xlat_table)				\
226 	}
227 
228 #endif /* BL_COMMON_LD_H */
229