1 /*
2  * Copyright (c) 2017-2020, ARM Limited. All rights reserved.
3  * Copyright (c) 2018, Icenowy Zheng <icenowy@aosc.io>
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <errno.h>
9 #include <string.h>
10 
11 #include <arch_helpers.h>
12 #include <common/debug.h>
13 #include <drivers/allwinner/axp.h>
14 #include <drivers/allwinner/sunxi_rsb.h>
15 #include <lib/mmio.h>
16 
17 #include <sunxi_cpucfg.h>
18 #include <sunxi_def.h>
19 #include <sunxi_mmap.h>
20 #include <sunxi_private.h>
21 
22 #define AXP305_I2C_ADDR	0x36
23 #define AXP305_HW_ADDR	0x745
24 #define AXP305_RT_ADDR	0x3a
25 
26 static enum pmic_type {
27 	UNKNOWN,
28 	AXP305,
29 } pmic;
30 
axp_read(uint8_t reg)31 int axp_read(uint8_t reg)
32 {
33 	return rsb_read(AXP305_RT_ADDR, reg);
34 }
35 
axp_write(uint8_t reg,uint8_t val)36 int axp_write(uint8_t reg, uint8_t val)
37 {
38 	return rsb_write(AXP305_RT_ADDR, reg, val);
39 }
40 
rsb_init(void)41 static int rsb_init(void)
42 {
43 	int ret;
44 
45 	ret = rsb_init_controller();
46 	if (ret)
47 		return ret;
48 
49 	/* Switch to the recommended 3 MHz bus clock. */
50 	ret = rsb_set_bus_speed(SUNXI_OSC24M_CLK_IN_HZ, 3000000);
51 	if (ret)
52 		return ret;
53 
54 	/* Initiate an I2C transaction to switch the PMIC to RSB mode. */
55 	ret = rsb_set_device_mode(AXP20X_MODE_RSB << 16 | AXP20X_MODE_REG << 8);
56 	if (ret)
57 		return ret;
58 
59 	/* Associate the 8-bit runtime address with the 12-bit bus address. */
60 	ret = rsb_assign_runtime_address(AXP305_HW_ADDR, AXP305_RT_ADDR);
61 	if (ret)
62 		return ret;
63 
64 	return axp_check_id();
65 }
66 
sunxi_pmic_setup(uint16_t socid,const void * fdt)67 int sunxi_pmic_setup(uint16_t socid, const void *fdt)
68 {
69 	int ret;
70 
71 	INFO("PMIC: Probing AXP305 on RSB\n");
72 
73 	ret = sunxi_init_platform_r_twi(socid, true);
74 	if (ret) {
75 		INFO("Could not init platform bus: %d\n", ret);
76 		return ret;
77 	}
78 
79 	ret = rsb_init();
80 	if (ret) {
81 		INFO("Could not init RSB: %d\n", ret);
82 		return ret;
83 	}
84 
85 	pmic = AXP305;
86 	axp_setup_regulators(fdt);
87 
88 	/* Switch the PMIC back to I2C mode. */
89 	ret = axp_write(AXP20X_MODE_REG, AXP20X_MODE_I2C);
90 	if (ret)
91 		return ret;
92 
93 	return 0;
94 }
95 
sunxi_power_down(void)96 void sunxi_power_down(void)
97 {
98 	switch (pmic) {
99 	case AXP305:
100 		/* Re-initialise after rich OS might have used it. */
101 		sunxi_init_platform_r_twi(SUNXI_SOC_H616, true);
102 		rsb_init();
103 		axp_power_off();
104 		break;
105 	default:
106 		break;
107 	}
108 }
109 
sunxi_cpu_power_off_self(void)110 void sunxi_cpu_power_off_self(void)
111 {
112 	u_register_t mpidr = read_mpidr();
113 	unsigned int core  = MPIDR_AFFLVL0_VAL(mpidr);
114 
115 	/* Enable the CPUIDLE hardware (only really needs to be done once). */
116 	mmio_write_32(SUNXI_CPUIDLE_EN_REG, 0x16aa0000);
117 	mmio_write_32(SUNXI_CPUIDLE_EN_REG, 0xaa160001);
118 
119 	/* Trigger power off for this core. */
120 	mmio_write_32(SUNXI_CORE_CLOSE_REG, BIT_32(core));
121 }
122