1 /*
2 * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
3 * Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include <assert.h>
9
10 #include <arch.h>
11 #include <lib/pmf/pmf.h>
12 #include <lib/psci/psci.h>
13 #include <lib/utils_def.h>
14 #include <plat/common/platform.h>
15
16 #if ENABLE_PSCI_STAT && ENABLE_PMF
17 #pragma weak plat_psci_stat_accounting_start
18 #pragma weak plat_psci_stat_accounting_stop
19 #pragma weak plat_psci_stat_get_residency
20
21 /* Maximum time-stamp value read from architectural counters */
22 #ifdef __aarch64__
23 #define MAX_TS UINT64_MAX
24 #else
25 #define MAX_TS UINT32_MAX
26 #endif
27
28 /* Following are used as ID's to capture time-stamp */
29 #define PSCI_STAT_ID_ENTER_LOW_PWR 0
30 #define PSCI_STAT_ID_EXIT_LOW_PWR 1
31 #define PSCI_STAT_TOTAL_IDS 2
32
33 PMF_DECLARE_CAPTURE_TIMESTAMP(psci_svc)
PMF_DECLARE_GET_TIMESTAMP(psci_svc)34 PMF_DECLARE_GET_TIMESTAMP(psci_svc)
35 PMF_REGISTER_SERVICE(psci_svc, PMF_PSCI_STAT_SVC_ID, PSCI_STAT_TOTAL_IDS,
36 PMF_STORE_ENABLE)
37
38 /*
39 * This function calculates the stats residency in microseconds,
40 * taking in account the wrap around condition.
41 */
42 static u_register_t calc_stat_residency(unsigned long long pwrupts,
43 unsigned long long pwrdnts)
44 {
45 /* The divisor to use to convert raw timestamp into microseconds. */
46 u_register_t residency_div;
47 u_register_t res;
48
49 /*
50 * Calculate divisor so that it can be directly used to
51 * convert time-stamp into microseconds.
52 */
53 residency_div = read_cntfrq_el0() / MHZ_TICKS_PER_SEC;
54 assert(residency_div > 0U);
55
56 if (pwrupts < pwrdnts)
57 res = MAX_TS - pwrdnts + pwrupts;
58 else
59 res = pwrupts - pwrdnts;
60
61 return res / residency_div;
62 }
63
64 /*
65 * Capture timestamp before entering a low power state.
66 * Cache maintenance may be needed when reading these timestamps.
67 */
plat_psci_stat_accounting_start(__unused const psci_power_state_t * state_info)68 void plat_psci_stat_accounting_start(
69 __unused const psci_power_state_t *state_info)
70 {
71 assert(state_info != NULL);
72 PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR,
73 PMF_CACHE_MAINT);
74 }
75
76 /*
77 * Capture timestamp after exiting a low power state.
78 * Cache maintenance may be needed when reading these timestamps.
79 */
plat_psci_stat_accounting_stop(__unused const psci_power_state_t * state_info)80 void plat_psci_stat_accounting_stop(
81 __unused const psci_power_state_t *state_info)
82 {
83 assert(state_info != NULL);
84 PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR,
85 PMF_CACHE_MAINT);
86 }
87
88 /*
89 * Calculate the residency for the given level and power state
90 * information.
91 */
plat_psci_stat_get_residency(unsigned int lvl,const psci_power_state_t * state_info,unsigned int last_cpu_idx)92 u_register_t plat_psci_stat_get_residency(unsigned int lvl,
93 const psci_power_state_t *state_info,
94 unsigned int last_cpu_idx)
95 {
96 plat_local_state_t state;
97 unsigned long long pwrup_ts = 0, pwrdn_ts = 0;
98 unsigned int pmf_flags;
99
100 assert((lvl >= PSCI_CPU_PWR_LVL) && (lvl <= PLAT_MAX_PWR_LVL));
101 assert(state_info != NULL);
102 assert(last_cpu_idx <= PLATFORM_CORE_COUNT);
103
104 if (lvl == PSCI_CPU_PWR_LVL)
105 assert(last_cpu_idx == plat_my_core_pos());
106
107 /*
108 * If power down is requested, then timestamp capture will
109 * be with caches OFF. Hence we have to do cache maintenance
110 * when reading the timestamp.
111 */
112 state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL];
113 if (is_local_state_off(state) != 0) {
114 pmf_flags = PMF_CACHE_MAINT;
115 } else {
116 assert(is_local_state_retn(state) == 1);
117 pmf_flags = PMF_NO_CACHE_MAINT;
118 }
119
120 PMF_GET_TIMESTAMP_BY_INDEX(psci_svc,
121 PSCI_STAT_ID_ENTER_LOW_PWR,
122 last_cpu_idx,
123 pmf_flags,
124 pwrdn_ts);
125
126 PMF_GET_TIMESTAMP_BY_INDEX(psci_svc,
127 PSCI_STAT_ID_EXIT_LOW_PWR,
128 plat_my_core_pos(),
129 pmf_flags,
130 pwrup_ts);
131
132 return calc_stat_residency(pwrup_ts, pwrdn_ts);
133 }
134 #endif /* ENABLE_PSCI_STAT && ENABLE_PMF */
135
136 /*
137 * The PSCI generic code uses this API to let the platform participate in state
138 * coordination during a power management operation. It compares the platform
139 * specific local power states requested by each cpu for a given power domain
140 * and returns the coordinated target power state that the domain should
141 * enter. A platform assigns a number to a local power state. This default
142 * implementation assumes that the platform assigns these numbers in order of
143 * increasing depth of the power state i.e. for two power states X & Y, if X < Y
144 * then X represents a shallower power state than Y. As a result, the
145 * coordinated target local power state for a power domain will be the minimum
146 * of the requested local power states.
147 */
plat_get_target_pwr_state(unsigned int lvl,const plat_local_state_t * states,unsigned int ncpu)148 plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
149 const plat_local_state_t *states,
150 unsigned int ncpu)
151 {
152 plat_local_state_t target = PLAT_MAX_OFF_STATE, temp;
153 const plat_local_state_t *st = states;
154 unsigned int n = ncpu;
155
156 assert(ncpu > 0U);
157
158 do {
159 temp = *st;
160 st++;
161 if (temp < target)
162 target = temp;
163 n--;
164 } while (n > 0U);
165
166 return target;
167 }
168