1# 2# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7MTK_PLAT := plat/mediatek 8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9 10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11 -Iinclude/plat/arm/common/aarch64 \ 12 -I${MTK_PLAT_SOC}/drivers/crypt/ \ 13 -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ 14 -I${MTK_PLAT_SOC}/drivers/pmic/ \ 15 -I${MTK_PLAT_SOC}/drivers/rtc/ \ 16 -I${MTK_PLAT_SOC}/drivers/spm/ \ 17 -I${MTK_PLAT_SOC}/drivers/timer/ \ 18 -I${MTK_PLAT_SOC}/drivers/wdt/ \ 19 -I${MTK_PLAT_SOC}/include/ 20 21PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 22 lib/xlat_tables/aarch64/xlat_tables.c \ 23 plat/arm/common/arm_gicv2.c \ 24 plat/common/plat_gicv2.c \ 25 plat/common/aarch64/crash_console_helpers.S 26 27BL31_SOURCES += common/desc_image_load.c \ 28 drivers/arm/cci/cci.c \ 29 drivers/arm/gic/common/gic_common.c \ 30 drivers/arm/gic/v2/gicv2_main.c \ 31 drivers/arm/gic/v2/gicv2_helpers.c \ 32 drivers/delay_timer/delay_timer.c \ 33 drivers/delay_timer/generic_delay_timer.c \ 34 drivers/ti/uart/aarch64/16550_console.S \ 35 lib/cpus/aarch64/aem_generic.S \ 36 lib/cpus/aarch64/cortex_a53.S \ 37 lib/cpus/aarch64/cortex_a57.S \ 38 lib/cpus/aarch64/cortex_a72.S \ 39 ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \ 40 ${MTK_PLAT}/common/drivers/rtc/rtc_common.c \ 41 ${MTK_PLAT}/common/mtk_plat_common.c \ 42 ${MTK_PLAT}/common/mtk_sip_svc.c \ 43 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 44 ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 45 ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 46 ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \ 47 ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \ 48 ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \ 49 ${MTK_PLAT_SOC}/drivers/spm/spm.c \ 50 ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \ 51 ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \ 52 ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ 53 ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \ 54 ${MTK_PLAT_SOC}/drivers/wdt/wdt.c \ 55 ${MTK_PLAT_SOC}/plat_pm.c \ 56 ${MTK_PLAT_SOC}/plat_sip_calls.c \ 57 ${MTK_PLAT_SOC}/plat_topology.c \ 58 ${MTK_PLAT_SOC}/power_tracer.c \ 59 ${MTK_PLAT_SOC}/scu.c 60 61# Enable workarounds for selected Cortex-A53 erratas. 62ERRATA_A53_826319 := 1 63ERRATA_A53_836870 := 1 64ERRATA_A53_855873 := 1 65 66# indicate the reset vector address can be programmed 67PROGRAMMABLE_RESET_ADDRESS := 1 68 69$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE)) 70 71# Do not enable SVE 72ENABLE_SVE_FOR_NS := 0 73 74MULTI_CONSOLE_API := 1 75