1 /* 2 * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef DEVAPC_H 8 #define DEVAPC_H 9 10 #include <stdint.h> 11 #include <platform_def.h> 12 13 /****************************************************************************** 14 * FUNCTION DEFINITION 15 ******************************************************************************/ 16 void devapc_init(void); 17 18 /****************************************************************************** 19 * STRUCTURE DEFINITION 20 ******************************************************************************/ 21 enum DEVAPC_PERM_TYPE { 22 NO_PROTECTION = 0, 23 SEC_RW_ONLY, 24 SEC_RW_NS_R, 25 FORBIDDEN, 26 PERM_NUM, 27 }; 28 29 enum DOMAIN_ID { 30 DOMAIN_0 = 0, 31 DOMAIN_1, 32 DOMAIN_2, 33 DOMAIN_3, 34 DOMAIN_4, 35 DOMAIN_5, 36 DOMAIN_6, 37 DOMAIN_7, 38 DOMAIN_8, 39 DOMAIN_9, 40 DOMAIN_10, 41 DOMAIN_11, 42 DOMAIN_12, 43 DOMAIN_13, 44 DOMAIN_14, 45 DOMAIN_15, 46 }; 47 48 /* Slave Type */ 49 enum DEVAPC_SLAVE_TYPE_SIMPLE { 50 SLAVE_TYPE_INFRA = 0, 51 SLAVE_TYPE_PERI, 52 SLAVE_TYPE_PERI2, 53 SLAVE_TYPE_PERI_PAR, 54 }; 55 56 enum DEVAPC_SYS_INDEX { 57 DEVAPC_SYS0 = 0, 58 DEVAPC_SYS1, 59 DEVAPC_SYS2, 60 }; 61 62 enum DEVAPC_SLAVE_TYPE { 63 SLAVE_TYPE_INFRA_AO_SYS0 = 0, 64 SLAVE_TYPE_INFRA_AO_SYS1, 65 SLAVE_TYPE_INFRA_AO_SYS2, 66 SLAVE_TYPE_PERI_AO_SYS0, 67 SLAVE_TYPE_PERI_AO_SYS1, 68 SLAVE_TYPE_PERI_AO_SYS2, 69 SLAVE_TYPE_PERI_AO2_SYS0, 70 SLAVE_TYPE_PERI_PAR_AO_SYS0, 71 }; 72 73 /* Slave Num */ 74 enum DEVAPC_SLAVE_NUM { 75 SLAVE_NUM_INFRA_AO_SYS0 = 23, 76 SLAVE_NUM_INFRA_AO_SYS1 = 256, 77 SLAVE_NUM_INFRA_AO_SYS2 = 70, 78 SLAVE_NUM_PERI_AO_SYS0 = 105, 79 SLAVE_NUM_PERI_AO_SYS1 = 66, 80 SLAVE_NUM_PERI_AO_SYS2 = 1, 81 SLAVE_NUM_PERI_AO2_SYS0 = 115, 82 SLAVE_NUM_PERI_PAR_AO_SYS0 = 27, 83 }; 84 85 enum DEVAPC_SYS_DOM_NUM { 86 DOM_NUM_INFRA_AO_SYS0 = 16, 87 DOM_NUM_INFRA_AO_SYS1 = 4, 88 DOM_NUM_INFRA_AO_SYS2 = 4, 89 DOM_NUM_PERI_AO_SYS0 = 16, 90 DOM_NUM_PERI_AO_SYS1 = 8, 91 DOM_NUM_PERI_AO_SYS2 = 4, 92 DOM_NUM_PERI_AO2_SYS0 = 16, 93 DOM_NUM_PERI_PAR_AO_SYS0 = 16, 94 }; 95 96 enum DEVAPC_CFG_INDEX { 97 DEVAPC_DEBUGSYS_INDEX = 57, 98 }; 99 100 struct APC_INFRA_PERI_DOM_16 { 101 unsigned char d0_permission; 102 unsigned char d1_permission; 103 unsigned char d2_permission; 104 unsigned char d3_permission; 105 unsigned char d4_permission; 106 unsigned char d5_permission; 107 unsigned char d6_permission; 108 unsigned char d7_permission; 109 unsigned char d8_permission; 110 unsigned char d9_permission; 111 unsigned char d10_permission; 112 unsigned char d11_permission; 113 unsigned char d12_permission; 114 unsigned char d13_permission; 115 unsigned char d14_permission; 116 unsigned char d15_permission; 117 }; 118 119 struct APC_INFRA_PERI_DOM_8 { 120 unsigned char d0_permission; 121 unsigned char d1_permission; 122 unsigned char d2_permission; 123 unsigned char d3_permission; 124 unsigned char d4_permission; 125 unsigned char d5_permission; 126 unsigned char d6_permission; 127 unsigned char d7_permission; 128 }; 129 130 struct APC_INFRA_PERI_DOM_4 { 131 unsigned char d0_permission; 132 unsigned char d1_permission; 133 unsigned char d2_permission; 134 unsigned char d3_permission; 135 }; 136 137 #define DAPC_INFRA_AO_SYS0_ATTR(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ 138 PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \ 139 PERM_ATTR6, PERM_ATTR7, PERM_ATTR8, PERM_ATTR9, \ 140 PERM_ATTR10, PERM_ATTR11, PERM_ATTR12, PERM_ATTR13, \ 141 PERM_ATTR14, PERM_ATTR15) \ 142 {(unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \ 143 (unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, \ 144 (unsigned char)PERM_ATTR4, (unsigned char)PERM_ATTR5, \ 145 (unsigned char)PERM_ATTR6, (unsigned char)PERM_ATTR7, \ 146 (unsigned char)PERM_ATTR8, (unsigned char)PERM_ATTR9, \ 147 (unsigned char)PERM_ATTR10, (unsigned char)PERM_ATTR11, \ 148 (unsigned char)PERM_ATTR12, (unsigned char)PERM_ATTR13, \ 149 (unsigned char)PERM_ATTR14, (unsigned char)PERM_ATTR15} 150 151 #define DAPC_INFRA_AO_SYS1_ATTR(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ 152 PERM_ATTR2, PERM_ATTR3) \ 153 {(unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \ 154 (unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3} 155 156 #define DAPC_PERI_AO_SYS1_ATTR(DEV_NAME, PERM_ATTR0, PERM_ATTR1, \ 157 PERM_ATTR2, PERM_ATTR3, PERM_ATTR4, PERM_ATTR5, \ 158 PERM_ATTR6, PERM_ATTR7) \ 159 {(unsigned char)PERM_ATTR0, (unsigned char)PERM_ATTR1, \ 160 (unsigned char)PERM_ATTR2, (unsigned char)PERM_ATTR3, \ 161 (unsigned char)PERM_ATTR4, (unsigned char)PERM_ATTR5, \ 162 (unsigned char)PERM_ATTR6, (unsigned char)PERM_ATTR7} 163 164 #define DAPC_INFRA_AO_SYS2_ATTR(...) DAPC_INFRA_AO_SYS1_ATTR(__VA_ARGS__) 165 #define DAPC_PERI_AO_SYS0_ATTR(...) DAPC_INFRA_AO_SYS0_ATTR(__VA_ARGS__) 166 #define DAPC_PERI_AO_SYS2_ATTR(...) DAPC_INFRA_AO_SYS1_ATTR(__VA_ARGS__) 167 #define DAPC_PERI_AO2_SYS0_ATTR(...) DAPC_INFRA_AO_SYS0_ATTR(__VA_ARGS__) 168 #define DAPC_PERI_PAR_AO_SYS0_ATTR(...) DAPC_INFRA_AO_SYS0_ATTR(__VA_ARGS__) 169 170 /****************************************************************************** 171 * UTILITY DEFINITION 172 ******************************************************************************/ 173 #define devapc_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) 174 #define devapc_readl(REG) mmio_read_32((uintptr_t)REG) 175 176 /******************************************************************************/ 177 /* Device APC AO for INFRA AO */ 178 #define DEVAPC_INFRA_AO_SYS0_D0_APC_0 (DEVAPC_INFRA_AO_BASE + 0x0000) 179 #define DEVAPC_INFRA_AO_SYS1_D0_APC_0 (DEVAPC_INFRA_AO_BASE + 0x1000) 180 #define DEVAPC_INFRA_AO_SYS2_D0_APC_0 (DEVAPC_INFRA_AO_BASE + 0x2000) 181 182 #define DEVAPC_INFRA_AO_MAS_SEC_0 (DEVAPC_INFRA_AO_BASE + 0x0A00) 183 184 /******************************************************************************/ 185 /* Device APC AO for PERI AO */ 186 #define DEVAPC_PERI_AO_SYS0_D0_APC_0 (DEVAPC_PERI_AO_BASE + 0x0000) 187 #define DEVAPC_PERI_AO_SYS1_D0_APC_0 (DEVAPC_PERI_AO_BASE + 0x1000) 188 #define DEVAPC_PERI_AO_SYS2_D0_APC_0 (DEVAPC_PERI_AO_BASE + 0x2000) 189 190 #define DEVAPC_PERI_AO_MAS_SEC_0 (DEVAPC_PERI_AO_BASE + 0x0A00) 191 192 /******************************************************************************/ 193 /* Device APC AO for PERI AO2 */ 194 #define DEVAPC_PERI_AO2_SYS0_D0_APC_0 (DEVAPC_PERI_AO2_BASE + 0x0000) 195 196 /******************************************************************************/ 197 /* Device APC AO for PERI PAR AO */ 198 #define DEVAPC_PERI_PAR_AO_SYS0_D0_APC_0 (DEVAPC_PERI_PAR_AO_BASE + 0x0000) 199 200 #define DEVAPC_PERI_PAR_AO_MAS_SEC_0 (DEVAPC_PERI_PAR_AO_BASE + 0x0A00) 201 202 /******************************************************************************/ 203 204 205 /****************************************************************************** 206 * Variable DEFINITION 207 ******************************************************************************/ 208 #define MOD_NO_IN_1_DEVAPC 16 209 210 #endif /* DEVAPC_H */ 211 212