1 /*
2  * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <mt_lp_rm.h>
8 #include <mt_lp_irqremain.h>
9 #include <mtk_cirq.h>
10 #include <plat_mtk_lpm.h>
11 
12 #define EDMA0_IRQ_ID		U(448)
13 #define MDLA_IRQ_ID		U(446)
14 #define MALI4_IRQ_ID		U(399)
15 #define MALI3_IRQ_ID		U(398)
16 #define MALI2_IRQ_ID		U(397)
17 #define MALI1_IRQ_ID		U(396)
18 #define MALI0_IRQ_ID		U(395)
19 #define VPU_CORE1_IRQ_ID	U(453)
20 #define VPU_CORE0_IRQ_ID	U(452)
21 #define MD_WDT_IRQ_ID		U(110)
22 #define KEYPAD_IRQ_ID		U(106)
23 
24 #define MD_WDT_WAKESRC		0x2000000
25 #define KEYPAD_WAKESRC		0x4
26 
27 static struct mt_irqremain remain_irqs;
28 
mt_lp_irqremain_submit(void)29 int mt_lp_irqremain_submit(void)
30 {
31 	if (remain_irqs.count == 0) {
32 		return -1;
33 	}
34 
35 	set_wakeup_sources(remain_irqs.irqs, remain_irqs.count);
36 	mt_lp_rm_do_update(-1, PLAT_RC_UPDATE_REMAIN_IRQS, &remain_irqs);
37 
38 	return 0;
39 }
40 
mt_lp_irqremain_aquire(void)41 int mt_lp_irqremain_aquire(void)
42 {
43 	if (remain_irqs.count == 0) {
44 		return -1;
45 	}
46 
47 	mt_cirq_sw_reset();
48 	mt_cirq_clone_gic();
49 	mt_cirq_enable();
50 
51 	return 0;
52 }
53 
mt_lp_irqremain_release(void)54 int mt_lp_irqremain_release(void)
55 {
56 	if (remain_irqs.count == 0) {
57 		return -1;
58 	}
59 
60 	mt_cirq_flush();
61 	mt_cirq_disable();
62 
63 	return 0;
64 }
65 
mt_lp_irqremain_init(void)66 void mt_lp_irqremain_init(void)
67 {
68 	uint32_t idx;
69 
70 	remain_irqs.count = 0;
71 
72 	/* level edma0 */
73 	idx = remain_irqs.count;
74 	remain_irqs.irqs[idx] = EDMA0_IRQ_ID;
75 	remain_irqs.wakeupsrc_cat[idx] = 0;
76 	remain_irqs.wakeupsrc[idx] = 0;
77 	remain_irqs.count++;
78 
79 	/* level mdla */
80 	idx = remain_irqs.count;
81 	remain_irqs.irqs[idx] = MDLA_IRQ_ID;
82 	remain_irqs.wakeupsrc_cat[idx] = 0;
83 	remain_irqs.wakeupsrc[idx] = 0;
84 	remain_irqs.count++;
85 
86 	/* level mali4 */
87 	idx = remain_irqs.count;
88 	remain_irqs.irqs[idx] = MALI4_IRQ_ID;
89 	remain_irqs.wakeupsrc_cat[idx] = 0;
90 	remain_irqs.wakeupsrc[idx] = 0;
91 	remain_irqs.count++;
92 
93 	/* level mali3 */
94 	idx = remain_irqs.count;
95 	remain_irqs.irqs[idx] = MALI3_IRQ_ID;
96 	remain_irqs.wakeupsrc_cat[idx] = 0;
97 	remain_irqs.wakeupsrc[idx] = 0;
98 	remain_irqs.count++;
99 
100 	/* level mali2 */
101 	idx = remain_irqs.count;
102 	remain_irqs.irqs[idx] = MALI2_IRQ_ID;
103 	remain_irqs.wakeupsrc_cat[idx] = 0;
104 	remain_irqs.wakeupsrc[idx] = 0;
105 	remain_irqs.count++;
106 
107 	/* level mali1 */
108 	idx = remain_irqs.count;
109 	remain_irqs.irqs[idx] = MALI1_IRQ_ID;
110 	remain_irqs.wakeupsrc_cat[idx] = 0;
111 	remain_irqs.wakeupsrc[idx] = 0;
112 	remain_irqs.count++;
113 
114 	/* level mali0 */
115 	idx = remain_irqs.count;
116 	remain_irqs.irqs[idx] = MALI0_IRQ_ID;
117 	remain_irqs.wakeupsrc_cat[idx] = 0;
118 	remain_irqs.wakeupsrc[idx] = 0;
119 	remain_irqs.count++;
120 
121 	/* level vpu core1 */
122 	idx = remain_irqs.count;
123 	remain_irqs.irqs[idx] = VPU_CORE1_IRQ_ID;
124 	remain_irqs.wakeupsrc_cat[idx] = 0;
125 	remain_irqs.wakeupsrc[idx] = 0;
126 	remain_irqs.count++;
127 
128 	/* level vpu core0 */
129 	idx = remain_irqs.count;
130 	remain_irqs.irqs[idx] = VPU_CORE0_IRQ_ID;
131 	remain_irqs.wakeupsrc_cat[idx] = 0;
132 	remain_irqs.wakeupsrc[idx] = 0;
133 	remain_irqs.count++;
134 
135 	/* edge mdwdt */
136 	idx = remain_irqs.count;
137 	remain_irqs.irqs[idx] = MD_WDT_IRQ_ID;
138 	remain_irqs.wakeupsrc_cat[idx] = 0;
139 	remain_irqs.wakeupsrc[idx] = MD_WDT_WAKESRC;
140 	remain_irqs.count++;
141 
142 	/* edge keypad */
143 	idx = remain_irqs.count;
144 	remain_irqs.irqs[idx] = KEYPAD_IRQ_ID;
145 	remain_irqs.wakeupsrc_cat[idx] = 0;
146 	remain_irqs.wakeupsrc[idx] = KEYPAD_WAKESRC;
147 	remain_irqs.count++;
148 
149 	mt_lp_irqremain_submit();
150 }
151