1# 2# Copyright (c) 2021, MediaTek Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7MTK_PLAT := plat/mediatek 8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9 10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11 -I${MTK_PLAT}/common/drivers/gic600/ \ 12 -I${MTK_PLAT}/common/drivers/gpio/ \ 13 -I${MTK_PLAT}/common/drivers/rtc/ \ 14 -I${MTK_PLAT}/common/drivers/timer/ \ 15 -I${MTK_PLAT}/common/drivers/uart/ \ 16 -I${MTK_PLAT}/common/lpm/ \ 17 -I${MTK_PLAT_SOC}/drivers/dcm \ 18 -I${MTK_PLAT_SOC}/drivers/dp/ \ 19 -I${MTK_PLAT_SOC}/drivers/gpio/ \ 20 -I${MTK_PLAT_SOC}/drivers/mcdi/ \ 21 -I${MTK_PLAT_SOC}/drivers/pmic/ \ 22 -I${MTK_PLAT_SOC}/drivers/spmc/ \ 23 -I${MTK_PLAT_SOC}/drivers/ptp3/ \ 24 -I${MTK_PLAT_SOC}/include/ 25 26GICV3_SUPPORT_GIC600 := 1 27include drivers/arm/gic/v3/gicv3.mk 28include lib/xlat_tables_v2/xlat_tables.mk 29 30PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 31 ${XLAT_TABLES_LIB_SRCS} \ 32 plat/common/aarch64/crash_console_helpers.S \ 33 plat/common/plat_psci_common.c 34 35 36BL31_SOURCES += common/desc_image_load.c \ 37 drivers/delay_timer/delay_timer.c \ 38 drivers/gpio/gpio.c \ 39 drivers/delay_timer/generic_delay_timer.c \ 40 drivers/ti/uart/aarch64/16550_console.S \ 41 lib/bl_aux_params/bl_aux_params.c \ 42 lib/cpus/aarch64/cortex_a55.S \ 43 lib/cpus/aarch64/cortex_a78.S \ 44 plat/common/plat_gicv3.c \ 45 ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \ 46 ${MTK_PLAT}/common/drivers/gpio/mtgpio_common.c \ 47 ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init_v2.c \ 48 ${MTK_PLAT}/common/drivers/rtc/rtc_common.c \ 49 ${MTK_PLAT}/common/drivers/rtc/rtc_mt6359p.c \ 50 ${MTK_PLAT}/common/drivers/timer/mt_timer.c \ 51 ${MTK_PLAT}/common/drivers/uart/uart.c \ 52 ${MTK_PLAT}/common/lpm/mt_lp_rm.c \ 53 ${MTK_PLAT}/common/mtk_cirq.c \ 54 ${MTK_PLAT}/common/mtk_plat_common.c \ 55 ${MTK_PLAT}/common/mtk_sip_svc.c \ 56 ${MTK_PLAT}/common/params_setup.c \ 57 ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 58 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 59 ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 60 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \ 61 ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \ 62 ${MTK_PLAT_SOC}/drivers/dp/mt_dp.c \ 63 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 64 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \ 65 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \ 66 ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \ 67 ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c \ 68 ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 69 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \ 70 ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \ 71 ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \ 72 ${MTK_PLAT_SOC}/plat_pm.c \ 73 ${MTK_PLAT_SOC}/plat_sip_calls.c \ 74 ${MTK_PLAT_SOC}/plat_topology.c 75 76# Build SPM drivers 77include ${MTK_PLAT_SOC}/drivers/spm/build.mk 78 79# Configs for A78 and A55 80HW_ASSISTED_COHERENCY := 1 81USE_COHERENT_MEM := 0 82CTX_INCLUDE_AARCH32_REGS := 0 83ERRATA_A55_1530923 := 1 84 85# indicate the reset vector address can be programmed 86PROGRAMMABLE_RESET_ADDRESS := 1 87 88COLD_BOOT_SINGLE_CPU := 1 89 90MACH_MT8195 := 1 91$(eval $(call add_define,MACH_MT8195)) 92 93include lib/coreboot/coreboot.mk 94